CHAPTER THREE

D a t a A D D R E S S IN G MODE

• Addressing Mode:- The way of specifying data to be

operated by an instruction.
• An addressing mode:- specifies how to calculate the effective
memory address of an operand by using information held in
registers and/or constants contained within a machine instruction
or elsewhere.

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 Contents

Types of addressing: 12. Scaled-Index Addressing

1. Register Addressing
13. Relative Addressing
2. Immediate Addressing
Program Memory-Addressing Modes
3. Direct Addressing  Direct Program Memory Addressing
4. Register Indirect Addressing  Relative Program Memory
5. Based Addressing Addressing
6. Indexed addressing  Indirect Program Memory
7. Based Index Addressing Addressing
8. String addressing Stack Memory-Addressing Modes
9. I/O Direct & Indirect Addressing
10. Relative addressing
11. Implied Addressing
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 Types of addressing mode
1. Register direct Addressing mode
• The ins truction w ill s p ecify the na m e of the register which
holds the data to be operated by the instruction.
Exam ple:
MOV CL, D H
Th e con tent of 8-b it r e g is ter D H is m ov ed to another 8-bit register CL

(CL) <-- (D H)

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2. Immediate Addressing
• In immediate a ddr es s i n g mode, a n 8-bit or 16-bit data is
specified a s part of the instruction
Exa m p le:
M O V DL, 0 8 H
T he 8-bit d a t a (0 8 H ) g i v e n in the instruction i s
m o v e d to D L

(D L)  08 H
M O V AX, 0 A 9 F H

The 16-bit d a t a (0A9F H ) g i ven in the instruction

is m o v e d to A X register

(AX)  0A9F H

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 2 0 A d d r e s s buses ⟶ 8086 can address up
t o 2 = 1 M b y t e s of m e m o r y
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However, t he l a r g e s t re g i s t e r is o n l y 1 6 b i t s
P h y s ic a l A d d r e s s will h a v e t o b e calculated P h y s i c a l
A d d r e s s : Ac t u a l a d d r e s s of a b y t e in memory. i.e.
t he v a l u e which g o e s o u t o n t o t he a d d r e s s b u s .

M e m o r y A d d r e s s represen ted in the form –

S e g : Offset ( E g - 89AB:F012)
E a c h time the pr o c es sor w a n t s to a c c e s s
memory, it t a k e s the con ten t s of a s e g m e n t
register.
1 6 bytes of
contiguous memory

8 9 A B : F 0 1 2 ⟶ 8 9 A B ⟶ 8 9 A B 0 ( Pa ra g ra p h to b y t e ⟶ 8 9 A B x 1 0 = 8 9 A B 0 )
F012 ⟶ 0F012 (Offset i s a l r e a d y in b y t e unit)
+ -------
98AC2 (The a b s o l u t e
address)

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3. Direct Addressing
• Here, the effective a ddr es s of the memory location at which
the data operand is stored in the instruction.
• The effective address is just a 16-bit number written
directly in the instruction.

Exam ple:
M O V BX, [1354H]
M O V BL, [0400H]
• The square brackets around the 1354 H denotes
the contents of the m e m ory location. W h e n executed, this
instruction will copy the contents of the m em ory location into
B X register.
• This a d d re s s i n g m od e is called direct because the
displacement of the operand from the s e g m e n t b a s e is
specified directly in the instruction.

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 4. Register Indirect Addressing
• In R e g is ter ind irect a d d re s s ing , n a m e of the register which h olds the
effective a d d r e s s (EA) will be specified in the instruction.

Registers u s e d to hold EA are any of the

following registers:

BX, BP, DI and SI.

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Based indexed mode
In this the effective address is sum of base register
and index register.
Base register: BX, BP
Index register: SI, DI
The physical memory address is calculated according
to the base register.
Example: MOV AL, [BP+SI]
MOV AX, [BX+DI] 1
6. Indexed Addressing
• SI or DI register is used to hold an index value for
memory data and a signed 8-bit or unsigned 16- bit
displacement will be specified in the instruction.
• Displacement is a d d e d to the index value
in S I or D I register to obtain the EA.

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 9. I/O Direct & Indirect Addressing
• These a ddr es s i n g m o d e s are u s ed to access data from
standard I/O m a p p e d dev ices or ports.
• In d irect p ort a d d ress ing m od e, a n 8-b it p ort a ddres s is
directly specified in the instruction.
Example: I N AL, [09H]
Operations: PORT a d d r
= 09 H
(A L)  (P O RT)
• Content of port with address 09 H is moved to AL register
• In indirect port addressing mode, the instruction will
specify the name of the register which holds the port
address. In 8086, the 16-bit port address is stored in the D X
register.
Example: O UT [DX], A X

Operations: PORT a d d r = ( D X )
(P O RT) (A X )

• Content of A X is moved to port whose

address is specified by D X register.

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 10.Relative Addressing
• In this addressing mode, the effective address of a
program instruction is specified relative to Instruction
Pointer (IP) by an 8-bit signed displacement.
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 11.Implied Addressing

• Instructions using this mode have no operands.

The instruction itself will specify the data to be
operated by the instruction.
Example: CLC
• This clears the carry flag to zero.

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PROGRAM MEMORY-ADDRESSING MODES
• Consist of three distinct forms: direct, relative, and
indirect
Direct Program Memory Addressing
Used for all jumps(JMP) and calls by early microprocessor; also used
in high-level languages, such as BASIC.
 GOTO and GOSUB instructions
The microprocessor uses this form, but not as often as relative and
indirect program memory addressing.
The instructions for direct program memory addressing store the
address with the opcode.

Figure The 5-byte machine language version of a JMP [10000H] instruction.

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Program Memory Addressing Mode
The program memory addressing mode is used in branch
instructions. These branch instructions are instructions which are
responsible for changing the regular flow of the instruction execution
and shifting the control to some other location. In 8086
microprocessor, these instructions are usually JMP and CALL instruction
Types of Program Memory Addressing Mode
They are:
1.Direct Program memory Addressing
2.Indirect Program memory Addressing
3.Relative Program memory Addressing
Let us study each of them in detail about their instructions
and the way of processing by the microprocessor while
executing them.
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Direct Program Memory Addressing
In this addressing mode, the offset address where the control is to be
shifted is defined within the instruction.
This mode is called direct addressing mode because the required
address is directly present in the instruction rather than being stored
in some register.
Used for all jumps(JMP) and calls by early
microprocessor;
Example:- JMP 4032H
Here, the working of the above instruction will be as follows:
Now, the IP will be replaced by the mentioned value, i.e. IP <- 4032H
Now, the Memory address is calculated as: (Contents of CS) X 10H +
(contents of IP)

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Indirect Program Addressing mode

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Relative Program Memory Addressing
• Not available in all early
microprocessors, but it is available
to this family of microprocessors.
• The term relative means “relative
to the instruction pointer (IP)”.
• The JMP instruction is a 1-byte
instruction, with a 1-byte or a 2-
byte displacement that adds to the
instruction pointer. Figure 3–15 A JMP [2] instruction. This
instruction skips over the 2 bytes of
• An example is shown in Figure 3– memory that follow the JMP instruction.
15.

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Relative Program Memory Addressing
Not available in all early microprocessors, but it is available to this family of
microprocessors.
The term relative means “relative to the instruction pointer (IP)”.

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STACK MEMORY-ADDRESSING
MODES
• The stack plays an important role in all microprocessors.
• holds data temporarily and stores return addresses used by
procedures
• Stack memory is LIFO (last-in, first-out) memory
• describes the way data are stored and removed from the stack

• Data are placed on the stack with a PUSH instruction; removed

with a POP instruction.
• Stack memory is maintained by two registers:
• the stack pointer (SP or ESP)
• the stack segment register (SS)
• Whenever a word of data is pushed onto the stack, the high-
order 8 bits are placed in the location addressed by SP – 1.
• low-order 8 bits are placed in the location addressed by SP – 2

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• The SP is decremented by 2 so the next word is stored in the
next available stack location.
• the SP/ESP register always points to an area of memory located within the
stack segment.
• In protected mode operation, the SS register holds a selector
that accesses a descriptor for the base address of the stack
segment.
• When data are popped from the stack, the low-order 8 bits are
removed from the location addressed by SP.
• high-order 8 bits are removed; the SP register is incremented by 2

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END?

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