COMPUTER

ORGANIZATION
Functional Units of a Digital Computer: Von Neumann Architecture –
Operation and Operands of Computer Hardware Instruction –
Instruction Set Architecture (ISA): Memory Location, Address and
Operation – Instruction and Instruction Sequencing – Addressing
Modes, Encoding of Machine Instruction – Interaction between
Assembly and High Level Language.
FUNCTIONAL UNITS OF A DIGITAL COMPUTER: VON NEUMANN ARCHITECTURE
The modern day computer system’s functional unit is given by Von Neumann Architecture
Historically there have been 2 types of Computers:
1.Fixed Program Computers – Their function is very specific and they couldn’t be re-programmed, e.g.
Calculators.
2.Stored Program Computers – These can be programmed to carry out many different tasks, applications are
stored on them, hence the name.
The modern computers are based on a stored-program concept introduced by John Von Neumann. In this stored-
program concept, programs and data are stored in a separate storage unit called memories.
• A computer consists of five functionally independent main parts
input, memory, arithmetic logic unit (ALU), output and control unit.
• Input device accepts the coded information as source program i.e.
high level language. This is either stored in the memory or
immediately used by the processor to perform the desired
operations.
• Basically the computer converts one source program to an object
program. i.e. into machine language.
• Finally the results are sent to the outside world through output
device. All of these actions are coordinated by the control unit.
Input unit: -
• The source program/high level language program/coded
information/simply data is fed to a computer through input devices.
• keyboard is a most common type.
• Whenever a key is pressed, one corresponding word or number is
translated into its equivalent binary
code over a cable & fed either to memory or processor.
• Joysticks, trackballs, mouse, scanners etc are other input devices
Central Processing Unit (CPU)

• The CPU processes data transferred to it from one of the various

input devices.
• It then transfers either an intermediate or final result of the CPU to
one or more output devices.
• The CPU is the computing center of the system.
• It consists of a control section, an arithmetic-logic section, and an
internal storage section (memory unit).
• Each section within the CPU serves a specific function and has a
particular relationship with the other sections within the CPU.
Memory unit: -
• Its function is to store programs and data. It is basically to two types
Primary memory
Secondary memory
Primary memory: -
• It is a fast memory that operates at electronic speeds.
• The memory contains a large number of semiconductors storage
cells. Each capable of storing one bit of information.
• These are processed in a group of fixed size called word. (16 bits = 1
word)
• To provide easy access to a word in memory, a distinct address is
associated with each word location.
• The word length ranges from 16 to 64 bits. There are 3 types of
primary memory:
• RAM: Memory in which any location can be reached in short and fixed
amount of time after specifying its address is called RAM
• Cache Memory: The small, fast, RAM units are called Cache.
• Main Memory: The largest and the slowest unit is the main memory.
• Secondary memory: -
• It is used where large amounts of data & programs have to be stored,
particularly information that is accessed infrequently.
Examples: - Magnetic disks & tapes, optical disks (ie CD-ROM’s),
floppies etc.,
Arithmetic logic unit (ALU):-
Most of the computer operators are executed in ALU of the processor
like addition, subtraction, division, multiplication, etc.
• The operands are brought into the ALU from memory and stored in
high speed storage elements called register.
• The control and the ALU are many times faster than other devices
connected to a computer system.
• This control a number of external devices such as key boards, displays,
magnetic and optical disks, sensors and other mechanical controllers.
Output unit:-
• Its basic function is to send the processed results to the outside
world.
Examples:- Printer, speakers, monitor etc.

• Control unit:-
It sends signals to other units and senses their states. The actual
timing signals that govern the transfer of data between input unit,
processor, memory and output unit are generated by the control unit.
Basic operational concepts

Fig: Connections between the processor and the memory

The instruction register (IR):-
Holds the instructions that is currently being executed.

The program counter PC:-

It contains the memory address of the next instruction to be fetched
and executed.
Besides IR and PC, there are n-general purpose registers R0 through Rn-
The other two registers which facilitate communication with memory
are: -
1. MAR – (Memory Address Register):- It holds the address of the
location to be accessed.
2. MDR – (Memory Data Register):- It contains the data to be written
into or read out of the address location
Operating steps are

1. Programs reside in the memory & usually get these through the I/P
unit.
2. Execution of the program starts when the PC is set to point at the
first instruction of the program.
3. Contents of PC are transferred to MAR and a Read Control Signal is
sent to the memory.
4. The address word is read out of the memory and loaded into the
MDR.
5. Now contents of MDR are transferred to the IR & now the instruction
is ready to be decoded and executed.
6. If the instruction involves an operation by the ALU, it is necessary to
obtain the required operands.
7. An operand in the memory is fetched by sending its address to MAR
& Initiating a read cycle.
8. If the result of this operation is to be stored in the memory, the
result is sent to MDR.
9. Address of location where the result is stored is sent to MAR & a
write cycle is initiated.
10. The contents of PC are incremented so that PC points to the next
instruction that is to be executed.
Operations of Computer Hardware
• Every computer must be able to perform arithmetic. The MIPS
assembly language notation is:
add a, b, c #add b and c and put in a
Example : To add four variables (adding b,c,d and e and place in a)
Compiling Two C Assignment Statements into MIPS
This segment of a C program contains the five variables a, b, c, d, and e.
a = b + c;
d = a – e;
The translation from C to MIPS assembly language instructions is
performed by the compiler.
A MIPS instruction operates on two source operands and places the
result in one destination operand. Hence, the two simple statements
above compile directly into these two MIPS assembly language
instructions:
add a, b, c
sub d, a, e
Compiling a Complex C Assignment into MIPS
• A somewhat complex statement contains the five variables f, g, h, i,
and j:
f = (g + h) – (i + j);
What might a C compiler produce?
• The compiler must break this statement into several assembly
instructions, since only one operation is performed per MIPS
instruction.
add t0,g,h # temporary variable t0 contains g + h
add t1,i,j # temporary variable t1 contains i + j
sub f,t0,t1 # f gets t0 – t1, which is (g + h) – (i + j)
Operands of the Computer Hardware
• The operands of arithmetic instructions must be from special
locations built directly in hardware called registers.
• Registers are primitives used in hardware design. They are the bricks
of computer construction.
• The size of a register in the MIPS architecture is 32 bits; groups of 32
bits are said to be word.
• One major difference between the variables of a programming
language and registers is the limited number of registers
• Although we could simply write instructions using numbers for
registers, from 0 to 31, the MIPS convention is to use two-character
names following a dollar sign to represent a register.
• Use $s0, $s1, . . . for registers that correspond to variables in C and
Java programs and $t0, $t1, . . . for temporary registers needed to
compile the program into MIPS instructions.
Compiling a C Assignment Using Registers
• Example assignment statement:
f = (g + h) – (i + j);
• The variables f, g, h, i, and j are assigned to the registers $s0, $s1, $s2,
$s3, and $s4, respectively. What is the compiled MIPS code?

• Replace the variables with the register names and two temporary
registers, $t0 and $t1, which correspond to the temporary variables
above:
add $t0,$s1,$s2 # register $t0 contains g + h
add $t1,$s3,$s4 # register $t1 contains i + j
sub $s0,$t0,$t1 # f gets $t0 – $t1, which is (g + h)–(i + j)
Memory Operands
• The processor can keep only a small amount of data in registers, but
computer memory contains billions of data elements.
• MIPS must include instructions that transfer data between memory
and registers. Such instructions are called data transfer instructions.
• To access a word in memory, the instruction must supply the memory
address.
• Memory is just a large, single-dimensional array, with the address
acting as the index to that array, starting at 0. For example, the
address of the third data element is 2, and the value of Memory [2] is
10.
• The data transfer instruction that copies data from memory to a
register is traditionally called load.
• The format of the load instruction is the name of the operation
followed by the register to be loaded, then a constant and register
used to access memory.
• The sum of the constant portion of the instruction and the contents
of the second register forms the memory address.
• The actual MIPS name for this instruction is lw, standing for load
word.
• Compiling an Assignment When an Operand Is in Memory
• Let’s assume that A is an array of 100 words and that the compiler has
associated the variables g and h with the registers $s1 and $s2 as before.
• Let’s also assume that the starting address, or base address, of the array
is in $s3. Compile this C assignment statement:
g = h + A[8];
• The data should be placed in a temporary register for use in the next
instruction. The compiled instruction is
lw $t0,32($s3) # Temporary reg $t0 gets A[8]
# 8*4(4 bytes per word)
add $s1,$s2,$t0 # g = h + A[8]
• Th e constant in a data transfer instruction (8) is called the off set, and
the register added to form the address ($s3) is called the base register.
• Compiling Using Load and Store
• Assume variable h is associated with register $s2 and the base address of
the array A is in $s3. What is the MIPS assembly code for the C assignment
statement below?
A[12] = h + A[8];
lw $t0,32($s3) # Temporary reg $t0 gets A[8]
add $t0,$s2,$t0 # Temporary reg $t0 gets h + A[8]
• The final instruction stores the sum into A[12], using 48 (4 12) as the off
set and register $s3 as the base register.
sw $t0,48($s3) # Stores h + A[8] back into A[12]
• Load word and store word are the instructions that copy words between
memory and registers in the MIPS architecture. Other brands of computers
use other instructions along with load and store to transfer data
Constant or Immediate Operands
• Most of the MIPS arithmetic instructions have a constant as an
operand. We would have to load a constant from memory.
• For example, to add the constant 4 to register $s3, we could use the
code
lw $t0, AddrConstant4($s1) # $t0 = constant 4
add $s3,$s3,$t0 # $s3 = $s3 + $t0 ($t0 == 4)
assuming that $s1 + AddrConstant4 is the memory address of the
constant 4.
• This quick add instruction with one constant operand is called add
immediate or addi.
To add 4 to register $s3, we just write
addi $s3,$s3,4 # $s3 = $s3 + 4
 Memory Locations and Addresses
• The memory consists of many millions of storage cells, each of which
can store a bit of information having the value 0 or 1.
• The usual approach is to deal with them in groups of fixed size.
• The memory is organized so that a group of n bits can be stored or
retrieved in a single, basic operation.
• Each group of n bits is referred to as a word of information, and n is
called the word length.
• Modern computers have word lengths range from 16 to 64 bits.
• If the word length of a computer is 32 bits, a single word can store a
32-bit signed number. or four ASCII-encoded characters, each
occupying 8 bits.
• A unit of 8 bits is called a byte.
Byte Addressability
Three basic information quantities : bit, byte, and word.
• A byte is always 8 bits, but the word length typically ranges from 16
to 64 bits.
• It is difficult to assign distinct addresses to individual bit locations in
the memory rather assign byte locations in the memory.
• The term byte-addressable memory is used for this assignment.
• Byte locations have addresses 0, 1, 2, . . . . Thus, if the word length of
the machine is 32 bits, successive words are located at addresses 0, 4,
8, . . . , with each word consisting of four bytes.
Big-Endian and Little-Endian Assignments
There are two ways that byte addresses can be assigned:
• big-endian - used when lower byte addresses are used for the more
significant bytes (the leftmost bytes) of the word.
• little-endian - used when the lower byte addresses are used for the
less significant bytes (the rightmost bytes) of the word.
Word Alignment
• if the word length is 16 (2 bytes), aligned words begin at byte
addresses 0, 2, 4, . . . , and for a word length of 64 (23 bytes), aligned
words begin at byte addresses 0, 8, 16, . . . .
Accessing Numbers and Characters
• A number usually occupies one word, and can be accessed in the
memory by specifying its word address.
• Similarly, individual characters can be accessed by their byte address.
 Memory Operations
• Both program instructions and data operands are stored in the
memory.
• To execute an instruction, the processor control circuits must cause
the word containing the instruction to be transferred from the
memory to the processor.
• Operands and results must also be moved between the memory and
the processor. Thus, two basic operations involving the memory are
needed, namely, Read and Write.
• The Read operation transfers a copy of the contents of a specific
memory location to the processor.
• The Write operation transfers an item of information from the
processor to a specific memory location.
 Instructions and Instruction
Sequencing
A computer must have instructions capable of performing four types of
operations:
• Data transfers between the memory and the processor registers
• Arithmetic and logic operations on data
• Program sequencing and control
• I/O transfers
Register Transfer Notation
• Possible locations are memory locations, processor registers, or
registers in the I/O subsystem.
• Names that represent the addresses of memory locations may be
LOC, PLACE, A, or VAR2.
• Predefined names for the processor registers may be R0 or R5.
• Registers in the I/O subsystem may be identified by names such as
DATAIN or OUTSTATUS.
• To describe the transfer of information, the contents of any location
are denoted by placing square brackets around its name.
Thus, the expression
R2 ← [LOC]
means that the contents of memory location LOC are transferred
into processor register R2.
• As another example, consider the operation that adds the contents of
registers R2 and R3, and places their sum into register R4. This action
is indicated as
R4 ← [R2] + [R3]
• This type of notation is known as Register Transfer Notation (RTN).
• Transferring data from a source location A to a destination location B
means that the contents of location A are read and then written into
location B.
Assembly-Language Notation
• This is another type of notation to represent machine instructions and
programs.
• For this, we use assembly language. For example, transfer from
memory location LOC to processor register R2, is specified by the
statement
Load R2, LOC
• The second example of adding two numbers contained in processor
registers R2 and R3 and placing their sum in R4 can be specified by the
assembly-language statement
Add R4, R2, R3
• In this case, registers R2 and R3 hold the source operands, while R4 is
the destination.
RISC and CISC Instruction Sets
• The restriction that each instruction must fit into a single word
reduces the complexity and the number of different types of
instructions. Such computers are called Reduced Instruction Set
Computers (RISC).
• An alternative to the RISC approach is to make use of more complex
instructions which may span more than one word of memory, and
which may specify more complicated operations. Computers based on
this idea have been subsequently called Complex Instruction Set
Computers (CISC).
Introduction to RISC Instruction Sets
Two key characteristics of RISC instruction sets are:
• Each instruction fits in a single word.
• A load/store architecture is used, in which
– Memory operands are accessed only using Load and Store instructions.
– All operands involved in an arithmetic or logic operation must either be
in processor registers, or one of the operands may be given explicitly
within the instruction word.
• At the start of execution of a program, all instructions and data used in the
program are stored in the memory of a computer.
• If operands are expected to be in processor registers before they can be used
by an instruction, then it is necessary to first bring these operands into the
registers.
• This task is done by Load instructions which copy the contents of a memory
location into a processor register.
Load instructions are of the form
Load destination, source
or more specifically
Load processor_register, memory_location
• Let us now consider a typical arithmetic operation.

• The statement C=A+B in a high-level language

program instructs the computer to add the current values of the two
variables called A and B, and to assign the sum to a third variable, C.
• The three variables, A, B, and C, are assigned to distinct locations in the
memory.
• The contents of these locations represent the values of the three
variables.
C ← [A] + [B]
• The contents of memory locations A and B are fetched from the memory
and transferred into the processor where their sum is computed. This
result is then sent back to the memory and stored in location C.
• Using registers R2, R3, and R4 to perform the task with four instructions:
Load R2, A
Load R3, B
Add R4, R2, R3
Store R4, C
• Add is a three-operand, or a three-address, instruction of the form
Add destination, source1, source2
• The Store instruction is of the form
Store source, destination
where the source is a processor register and the destination is a memory
location.
• In the Store instruction the source and destination are specified in
the reverse order from the Load instruction.

• In this case the addition would be performed as

Add R3, R2, R3
and the last instruction would become
Store R3, C
Instruction Execution and Straight-Line Sequencing
• Here, C = A + B is implemented as C←[A] + [B].
• The figure shows a possible program segment for this task.
• Assume that the word length is 32 bits and the memory is byte-
addressable.
• The four instructions of the program are in successive word locations,
starting at location i.
• Since each instruction is 4 bytes long, the second, third, and fourth
instructions are at addresses i + 4, i + 8, and i + 12.
• For simplicity, we assume that a desired memory address can be
directly specified in Load and Store instructions, although this is not
possible if a full 32-bit address is involved.
• The processor contains a register called the program counter (PC),
which holds the address of the next instruction to be executed.
• To begin executing a program, the address of its first instruction (i in
our example) must be placed into the PC.
• Then, the processor control circuits use the information in the PC to
fetch and execute instructions, one at a time, in the order of
increasing addresses. This is called straight-line sequencing.
• During the execution of each instruction, the PC is incremented by 4
to point to the next instruction.
• Thus, after the Store instruction at location i + 12 is executed, the PC
contains the value i + 16, which is the address of the first instruction
of the next program segment.
Executing a given instruction is a two-phase procedure.
• In the first phase, called instruction fetch, the instruction is fetched
from the memory location whose address is in the PC.
• This instruction is placed in the instruction register (IR) in the
processor.
• At the start of the second phase, called instruction execute, the
instruction in IR is examined to determine which operation is to be
performed.
• The specified operation is then performed by the processor.
• This involves a small number of steps such as fetching operands from
the memory or from processor registers, performing an arithmetic or
logic operation, and storing the result in the destination location.
Branching
• Consider the task of adding a list of n numbers.
• The addresses of the memory locations containing the n numbers are
symbolically given as NUM1, NUM2, . . . , NUMn, and separate Load
and Add instructions are used to add each number to the contents of
register R2.
• After all the numbers have been added, the result is placed in
memory location SUM.
• Instead of using a long list of Load and Add instructions, it is possible to
implement a program loop in which the instructions read the next
number in the list and add it to the current sum.
• To add all numbers, the loop has to be executed as many times as there
are numbers in the list.
• Figure below shows the structure of the desired program.
• The body of the loop is a straight-line sequence of instructions executed
repeatedly.
• It starts at location LOOP and ends at the instruction Branch_if_[R2]>0.
• During each pass through this loop, the address of the next list entry is
determined, and that entry is loaded into R5 and added to R3.
• Assume that the number of entries in the list, n, is stored in memory
location N, as shown.
• Register R2 is used as a counter to determine the number of times the
loop is executed.
• Hence, the contents of location N are loaded into register R2 at the
beginning of the program. Then, within the body of the loop, the
instruction
Subtract R2, R2, #1
reduces the contents of R2 by 1 each time through the loop.
Execution of the loop is repeated as long as the contents of R2 are
greater than zero.
• branch instructions - This type of instruction loads a new address into
the program counter.
• As a result, the processor fetches and executes the instruction at this
new address, called the branch target, instead of the instruction at the
location that follows the branch instruction in sequential address order.
• A conditional branch instruction causes a branch only if a specified
condition is satisfied.
• If the condition is not satisfied, the PC is incremented in the normal
way, and the next instruction in sequential address order is fetched and
executed.
• In the program in Figure, the instruction Branch_if_[R2]>0 LOOP is a
conditional branch instruction that causes a branch to location LOOP if
the contents of register R2 are greater than zero.
• Generating Memory Addresses
• The purpose of the instruction block starting at LOOP is to add
successive numbers from the list during each pass through the loop.
• The memory operand address cannot be given directly in a single
Load instruction in the loop. The situations give rise to the need for
specifying the address of an operand. The instruction set of a
computer typically provides a number of such methods, called
addressing modes.
Addressing Modes
• When translating a high-level language program into assembly
language, the compiler generates appropriate sequences of low-level
instructions that implement the desired operations.
• The different ways for specifying the locations of instruction
operands are known as addressing modes.
• Implementation of Variables and Constants