Scribd
Upload
13 views

Basic Computer OrganizationInstruction Cycle

The instruction cycle for a basic computer has 4 main steps: 1. Fetch the instruction from memory and load it into the instruction register (IR) while incrementing the program counter (PC). 2. Decode the opcode of the instruction to determine the instruction type and load the effective address into the address register (AR). 3. For memory-reference instructions, fetch the effective address from memory during phase T3. 4. Execute the instruction based on its type during phase T4 and increment the sequence counter (SC) to begin the next instruction cycle.

Uploaded by

HARI HARAN REDDY
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
13 views

Basic Computer OrganizationInstruction Cycle

The instruction cycle for a basic computer has 4 main steps: 1. Fetch the instruction from memory and load it into the instruction register (IR) while incrementing the program counter (PC). 2. Decode the opcode of the instruction to determine the instruction type and load the effective address into the address register (AR). 3. For memory-reference instructions, fetch the effective address from memory during phase T3. 4. Execute the instruction based on its type during phase T4 and increment the sequence counter (SC) to begin the next instruction cycle.

Uploaded by

HARI HARAN REDDY
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 8

Basic Computer Organization

Instruction Cycle

Computer Organization and Design


Agenda
 Instruction Codes

 Computer Registers

 Common Bus System

 Computer Instructions

 Timing and Control

 Instruction Cycle

 Memory Reference Instructions

 Input-Output and Interrupt

 Complete Computer Description


Instruction Cycle
 A program is a sequence of instructions stored in memory. The
program is executed in the computer by going through a cycle for
each instruction (in most cases). Each instruction in turn is
subdivided into a sequence of sub-cycles or phases.
 In Basic Computer, a machine instruction is executed in the
following cycle:
1. Fetch an instruction from memory
2. Decode the instruction
3. Read the effective address from memory if the instruction has an indirect
address
4. Execute the instruction

 After an instruction is executed, the cycle starts again at step


1, for the next instruction

Note: Every different processor has its own (different) instruction cycle
 Initially, the Program Counter (PC) is loaded with the address of the first
instruction in the program.
 The sequence counter SC is cleared to 0, providing a decoded timing
signal T0.
 After each clock pulse, SC is incremented by one, so that the timing
signals go through a sequence T0, T1, T2, and so on.

FETCH AND DECODE PHASE


a) Fetch:
T0: AR←PC
The address of the instruction is moved to AR.

T1: IR←M[AR], PC←PC+1


The instruction is fetched from the memory to IR ,
and the PC is incremented.
b) Decode:
T2: D0,…, D7←Decode IR(12-14), AR←IR(0-11), I←IR(15)
Fetch and Decode
Fetch and Decode T0: AR PC (S0S1S2=010, T0=1)
T1: IR  M [AR], PC  PC + 1 (S0S1S2=111, T1=1)
T2: D0, . . . , D7  Decode IR(12-14), AR  IR(0-11), I  IR(15)

T1 S2

T0 S1 Bus

S0
Memory
unit 7
Address
Read

AR 1

LD
PC 2

INR

IR 5

LD Clock
Common bus
Common Bus System
S2
S1 Bus
S0
Memory unit 7
4096 x 16
Address
Write Read
AR 1

LD INR CLR
PC 2

LD INR CLR
DR 3

LD INR CLR
E
ALU AC 4

LD INR CLR

INPR

IR 5
LD
TR 6
LD INR CLR
OUTR
Clock
LD
Flow Chart (Instruction Cycle)
Start
SC <-- 0

T0
AR <-- PC

T1
IR <-- M[AR], PC <-- PC + 1

T2
Decode Opcode in IR(12-14),
AR <-- IR(0-11), I <-- IR(15)

(Register or I/O) = 1 = 0 (Memory-reference)


D7

(I/O) = 1 = 0 (register) (indirect) = 1 = 0 (direct)


I I

T3 T3 T3 T3
Execute Execute AR <-- M[AR] Nothing
input-output register-reference
instruction instruction
SC <-- 0 SC <-- 0 Execute T4
memory-reference
instruction
SC <-- 0
Determining Type of Instruction

D'7IT3: AR M[AR]
D'7I'T3: Nothing
D7I'T3: Execute a register-reference instr.
D7IT3: Execute an input-output instr.

You might also like