Module II
Module II
• Data Bus: The data bus is a set of wires that enable the
bidirectional transfer of data between the CPU and memory
module. The width of the data bus determines the amount of
data that can be transferred in a single operation. For instance,
a 32-bit data bus can transfer 32 bits (4 bytes) of data at a
time.
Key concepts in memory interfacing
The counter is initially loaded with the count value, and then
counts down on every clock cycle until 0 is reached, at which
point an output signal is generated, the count value is reloaded,
and the process repeats itself.
Timer
• To use a timer, we must configure it (write to its
registers), and respond to its output signal.
• When we use a timer in conjunction with a
general-purpose processor, we typically respond to
the timer signal by assigning it to an interrupt, so
we include the desired action in an interrupt
service routine.
• Many microcontrollers that include built-in timers
will have special interrupts just for its timers,
distinct from external interrupts.
• Knowing the number of cycles that each instruction
requires, we could write a loop that executed the
desired number of instructions; when this loop
completes, we know that the desired time passed. This
implementation of a timer on a dedicated general-
purpose processor is obviously quite inefficient in terms
of size.