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Module II

This document discusses various input/output interfacing techniques used in embedded systems, including memory interfacing, analog-to-digital conversion, timers, counters, and serial communication interfaces. It describes how memory is interfaced to allow communication between the CPU and different memory modules. Timers and counters are used to generate pulses at specific time intervals, while watchdog timers monitor software execution and can reset the CPU if a signal is not received within a set time.

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Pranith Reddy
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© © All Rights Reserved
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0% found this document useful (0 votes)
21 views

Module II

This document discusses various input/output interfacing techniques used in embedded systems, including memory interfacing, analog-to-digital conversion, timers, counters, and serial communication interfaces. It describes how memory is interfaced to allow communication between the CPU and different memory modules. Timers and counters are used to generate pulses at specific time intervals, while watchdog timers monitor software execution and can reset the CPU if a signal is not received within a set time.

Uploaded by

Pranith Reddy
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Module:2

I/O Interfacing Techniques


Overview
• Memory interfacing
• A/D, D/A,
• Timers
• Watch-dog timer
• Counters
• Encoder & Decoder,
• UART, Sensors and actuators interfacing
Memory interfacing
• Memory interfacing is a crucial aspect of computer
system design that involves connecting various
types of memory devices to the central processing
unit (CPU) and other peripheral devices.
• Memory is essential for storing data and
instructions that the CPU needs to process during
program execution.
• Different types of memory, such as RAM (Random
Access Memory), ROM (Read-Only Memory), and
various external storage devices, play specific roles
in the functioning of a computer system.
Memory interfacing
• The primary purpose of memory interfacing is to facilitate
the transfer of data between the CPU and memory
modules effectively.

• It involves managing data flow and addressing, and timing


requirements to ensure seamless communication and
reliable data storage.

• The CPU uses memory addresses to access specific


locations in memory, read data, and write data as needed.
Key concepts in memory interfacing
• Address Bus: The address bus is a set of wires that carry
memory addresses from the CPU to the memory module.
The number of address lines determines the maximum
memory capacity that can be addressed. For example, a 16-bit
address bus can address up to 64KB (2^16) of memory
locations.

• Data Bus: The data bus is a set of wires that enable the
bidirectional transfer of data between the CPU and memory
module. The width of the data bus determines the amount of
data that can be transferred in a single operation. For instance,
a 32-bit data bus can transfer 32 bits (4 bytes) of data at a
time.
Key concepts in memory interfacing

• Control Signals: These signals manage the flow of data


between the CPU and memory, indicating whether it is a
read operation, write operation or other control actions like
enabling memory access.

• Memory Decoding: Memory decoding is the process of


interpreting the address lines to select a specific memory
location. It ensures that the CPU can access the intended
memory device accurately.
Key concepts in memory interfacing
• Memory Types: Different memory
technologies, such as SRAM (Static RAM)
and DRAM (Dynamic RAM), have distinct
characteristics, including speed, cost, and
volatility.
– The memory interfacing design should consider
these aspects based on the system’s requirements.
Key concepts in memory interfacing
• Memory Hierarchy: Modern computer systems often
use a memory hierarchy to optimize performance.
This hierarchy includes multiple levels of memory,
such as cache, main memory, and secondary storage,
with varying access speeds and capacities.

• Interfacing with I/O Devices: Memory interfacing


also extends to communication between the CPU
and input/output (I/O) devices, such as hard drives,
solid-state drives, and peripherals.
Timers, counters, and watchdog timers
• A timer is a device that generates a signal pulse at specified
time intervals.

• A time interval is a "real-time" measure of time, such as 3


milliseconds.

• These devices are extremely useful in systems in which a


particular action, such as sampling an input signal or
generating an output signal, must be performed every X
time units.
Timer
• Internally, a simple timer may consist of a register,
counter, and an extremely simple controller.

• The register holds a count value representing the


number of clock cycles that equals the desired
real-time value.

• This number can be computed using the simple


formula:
Timer

For example, to obtain a duration of 3 milliseconds from a


clock cycle of 10 nanoseconds (100 MHz), we must count
(3x10-6 s / 10x10-9 s/cycle) = 300 cycles.

The counter is initially loaded with the count value, and then
counts down on every clock cycle until 0 is reached, at which
point an output signal is generated, the count value is reloaded,
and the process repeats itself.
Timer
• To use a timer, we must configure it (write to its
registers), and respond to its output signal.
• When we use a timer in conjunction with a
general-purpose processor, we typically respond to
the timer signal by assigning it to an interrupt, so
we include the desired action in an interrupt
service routine.
• Many microcontrollers that include built-in timers
will have special interrupts just for its timers,
distinct from external interrupts.
• Knowing the number of cycles that each instruction
requires, we could write a loop that executed the
desired number of instructions; when this loop
completes, we know that the desired time passed. This
implementation of a timer on a dedicated general-
purpose processor is obviously quite inefficient in terms
of size.

• One could alternatively incorporate the timer


functionality into a main program, but the timer
functionality then occupies much of the program’s run
time, leaving little time for other computations. Thus,
the benefit of assigning timer functionality to a special-
purpose processor becomes evident.
Counter

• A counter is nearly identical to a timer, except


that instead of counting clock cycles (pulses on
the clock signal), a counter counts pulses on
some other input signal.
Watchdog timer
• A watchdog timer can be thought of as having the inverse
functionality than that of a regular timer.

• We configure a watchdog timer with a real-time value, just


as with a regular timer.

• However, instead of the timer generating a signal for us every


X time units, we must generate a signal for the timer every X
time units.

• If we fail to generate this signal in time, then the timer


generates a signal indicating that we failed.
• We often connect this signal to the reset or
interrupt signal of a general-purpose processor.

• Thus, a watchdog timer provides a mechanism


of ensuring that our software is working
properly; every so often in the software, we
include a statement that generates a signal to
the watchdog timer (in particular, that resets
the timer).
• If something undesired happens in the software (e.g., we enter an
undesired infinite loop, we wait for an input signal that never arrives, a
part fails, etc.), the watchdog generates a signal that we can use to
restart or test parts of the system.

• Using an interrupt service routine, we may record information as to the


number of failures and the causes of each, so that a service technician
may later evaluate this information to determine if a particular part
requires replacement.

• Note that an embedded system often must recover from failures


whenever possible, as the user may not have the means to reboot the
system in the same manner that he/she might reboot a desktop system.

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