Microprocessor Lect 2 Final PWM
Microprocessor Lect 2 Final PWM
Lecture # 2 (Final)
Pulse Width Modulation (PWM)
Department of EEE
Microprocessor and Embedded Systems
PWM
Pulse Width Modulation, or PWM, is a technique for getting analog results with
digital means. Digital control is used to create a square wave, a signal switched
between on and off. This on-off pattern can simulate voltages in between the full VCC
of the board (e.g., 5 V on UNO) and off (0 Volts). The duration of "on time" is called
the pulse width. To get varying analog values, the pulse width can be varied. If this
on-off pattern is repeated fast enough with an LED, for example, the result is as if the
signal is a steady voltage between 0 and VCC controlling the brightness of the LED.
Duty Cycle is defined as the
ratio of ON pulse duration to
the time period.
TON TOFF Here, TON = ON pulse duration
T = Timer period = TON +
TOFF ,where TOFF = OFF pulse
duration
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Microprocessor and Embedded Systems
PWM
PWM
The Arduino’s programming language
makes PWM easy to use; simply call
the built-in function analogWrite(pin,
dutyCycle), where dutyCycle is a
value from 0 to 255, and pin is one of
the PWM pins (3, 5, 6, 9, 10, or 11).
The analogWrite() function provides
a simple interface to the hardware
PWM, but doesn’t provide any
control over frequency.
Note the tilde ~ sign with the pin
numbers of the image.
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Microprocessor and Embedded Systems
PWM
PWM
The main PWM modes are "Fast PWM" and "Phase-correct PWM“.
There are two Fast PWM modes for Timer/Counter 0 unit. These are modes 3 and 7,
which are selected using the waveform generation mode bits (WGM02, WGM01, and
WGM00). The WGM01 and WGM00 bits are located in the TCCR0A register. The
WGM02 bit is located in the TCCR0B register.
There are 2 types of Fast PWM modes: (a) Non-inverting and (b) Inverting Fast PWM
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Microprocessor and Embedded Systems
PWM
The difference between the mode 3 and mode 7 Fast PWMs is their TOP values.
For mode 3, the TOP value is fixed (0xFF), whereas that for mode 7 is OCRnA value.
So, if mode 7 is used then we have to load a count value into the OCRnA register.
Once a mode is selected, the timer/counter starts counting from BOTTOM to TOP
value and when the TOP value is reached the counting is repeated from BOTTOM.
The table in the right shows the WGM bits
combination for mode 3 and mode 7.
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Fast PWM Mode: Setting Microprocessor and Embedded Systems
Modes
In the fast PWM mode, the Compare Output Mode bits COM0A1, COM0A0 (in the
TCCR0A register) for the output at OC0A and bits COM0B1, COM0B0 (in the TCCR0A
register) for the output at OC0B, are used to configure the output as either non-
inverting or inverting mode of operation. Table 12-3 shows how to select COM0A1,
COM0A0 bits to generate non-inverting and inverting mode’s fast PWM waveform.
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Fast PWM Mode: Setting Microprocessor and Embedded Systems
Modes
In the fast PWM mode, the compare unit allows the generation of PWM waveforms
on the OC0x pins. Table 12.6 shows the COM0B1:0 bit functionality when the
WGM02:0 bits are set to the fast PWM mode.
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Fast PWM Mode: Setting Microprocessor and Embedded Systems
Modes
Setting the COM0x1:0 bits to 10 will produce a non-inverted PWM and an inverted
PWM output can be generated by setting the COM0x1:0 to 11.
Setting the COM0A1:0 bits to 01 allows the OC0A pin to toggle on Compare Matches
if the WGM02 bit is set. This option is not available for the OC0B pin (see Table 12-6 ).
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Microprocessor and Embedded Systems
Fast PWM Mode
• The Fast Pulse Width Modulation or Fast
PWM Mode (WGM02:0 = 3 or 7) provides
a high-frequency PWM waveform
generation option. The Fast PWM differs
from the other PWM option in its single-
slope operation.
• The counter starts counting from BOTTOM
to TOP and then restarts from BOTTOM.
• In Non-inverting Compare Output Mode,
the Output Compare (OC0x) is cleared on
the compare match between TCNT0 and
OCR0x, and set at BOTTOM.
• In Inverting Compare Output Mode, the
output is set on compare match and
cleared at BOTTOM.
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Microprocessor and Embedded Systems
Fast PWM Mode
• Due to the single-slope operation, the operating frequency of the Fast PWM mode
can be twice as high as the phase correct PWM mode that uses dual-slope
operation.
• This high frequency makes the fast PWM mode well suited for power regulation,
rectification, and DAC applications.
• High frequency allows physically small-sized external components (coils, capacitors),
and therefore reduces the total system cost.
• In fast PWM mode, the counter is incremented until the counter value matches the
TOP value, the register TCNTn counts from bottom value to maximum value stored in
the register OCRn. The counter is then cleared/reset to zero at the following timer
clock cycle. If the timer is configured in non-inverting mode, PWM output pin (OCn)
goes low when the value of the above two registers matches. The OCn pin becomes
high when the TCNTn register reaches at bottom value. In inverting mode, OCn pin
behaves opposite to non-inverting mode. 10
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Microprocessor and Embedded Systems
Fast PWM Mode
• The timing diagram for the Fast PWM Mode is shown in Figure 12.6.
• The TCNT0 value is in the timing diagram shown as a histogram for illustrating the single-slope
operation.
• The diagram includes non-inverted
and inverted PWM outputs.
The small horizontal line
marks on the TCNT0 slopes
represent compare matches
between OCR0x and TCNT0.
• The N variable represents the pre-scale factor (1, 8, 64, 256, or 1024).
• The waveform generated will have a maximum frequency of when OCR0A is set to
zero, otherwise the formula would be,
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Microprocessor and Embedded Systems
• where, D is the Duty cycle that range from 0% to 100%. This duty cycle value is the
count value that has to be loaded into the OCR0A (or OCR0B) register.
• Example: A PWM signal is to have 75% duty cycle. Compute the value for OCR0A.
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Microprocessor and Embedded Systems
• where, D is the Duty cycle that range from 0% to 100%. This duty cycle value is the
count value that has to be loaded into the OCR0A (or OCR0B) register.
• Example: A PWM signal is to have 75% duty cycle. Compute the value for OCR0A.
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Phase correct PWM Microprocessor and Embedded Systems
Mode
• The phase correct PWM mode (WGM02:0 = 1 or 5) provides a high-resolution phase
correct PWM waveform generation option. The phase correct PWM mode is based
on a dual-slope operation. The counter counts repeatedly from BOTTOM to TOP
and then from TOP to BOTTOM.
• In non-inverting Compare Output mode, the Output Compare (OC0x) is cleared on
the compare match between TCNT0 and OCR0x while up counting, and set on the
compare match while down counting.
• In inverting Output Compare mode, the operation is inverted.
• The dual-slope operation has a lower maximum operation frequency than the
single-slope operation.
• However, due to the symmetric feature of the dual-slope PWM modes, these modes
are preferred for motor control applications.
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Microprocessor and Embedded Systems
Phase correct PWM Mode
• In phase correct PWM mode, the counter is incremented until the counter value
matches TOP. When the counter reaches TOP, it changes the count direction.
• The TCNT0 value will be equal to TOP for one timer clock cycle. The timing diagram
for the phase correct PWM mode is shown on Figure 12.7.
• The TCNT0 value is in the timing diagram shown as a histogram for illustrating the
dual-slope operation.
• The diagram includes non-inverted and inverted PWM outputs.
• The small horizontal line marks on the TCNT0 slopes represent compare matches
between OCR0x and TCNT0.
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Microprocessor and Embedded Systems
Phase correct PWM Mode
• The diagram includes non-inverted
and inverted PWM outputs.
• The small horizontal line marks on
the TCNT0 slopes represent compare
matches between OCR0x and TCNT0.
• The Timer/Counter Overflow
Flag (TOV0) is set each time
the counter reaches BOTTOM.
• The Interrupt Flag can be used
to generate an interrupt each
time the counter reaches the
BOTTOM value. Figure 12.7 Timing Diagram of the Phase Correct PWM Mode
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Phase-Correct PWM Mode: Setting Microprocessor and Embedded Systems
Modes
The OCR0x Registers are double buffered when using any of the Pulse Width
Modulation (PWM) modes. For the normal and Clear Timer on Compare (CTC) modes
of operation, the double buffering is disabled.
The double buffering synchronizes the update of the OCR0x Compare Registers to
either top or bottom of the counting sequence.
Modes
• The Compare Output mode (COM0x1:0) bits have two functions. The Waveform
Generator uses the COM0x1:0 bits for defining the Output Compare (OC0x) state at the
next compare match.
• Also, the COM0x1:0 bits control the OC0x pin output source. Figure 12-4 shows a
simplified schematic of the logic affected by the COM0x1:0 bit setting.
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Microprocessor and Embedded Systems
Phase Correct PWM Mode
In Phase Correct PWM mode, the compare unit allows the generation of PWM
waveforms on the OC0x pins. Table 12.7 shows the COM0B1:0 bit functionality when
the WGM02:0 bits are set to Phase Correct PWM mode.
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Microprocessor and Embedded Systems
Phase Correct PWM Mode
• In phase correct PWM mode, the compare unit allows the generation of PWM
waveforms on the OC0x pins. Setting the COM0x1:0 bits to 10 will produce a non-
inverted PWM.
• An inverted PWM output can be generated by setting the COM0x1:0 to 11.
• Setting the COM0A0 bits to 01 allows the OC0A pin to toggle on Compare Matches
if the WGM02 bit is set. This option is not available for the OC0B pin (Table 12-7).
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Microprocessor and Embedded Systems
• The N variable represents the pre-scale factor (1, 8, 64, 256, or 1024).
• The waveform generated will have a maximum frequency of .
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Microprocessor and Embedded Systems
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Microprocessor and Embedded Systems
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Microprocessor and Embedded Systems
Important!
Note that in those WGM modes where OCR0A sets the frequency (modes 2, 5, and 7)
then you can't do PWM on channel A (because OCR0A couldn't be used for two
things at once, i.e., setting both PWM frequency and duty cycle!).
So, the only active PWM channel in those modes is channel B and you set the duty
cycle of that (as always) with OCR0B (set to some value between 0 and the OCR0A
upper limit). As such, the PWM output will be on pin 11 (PD5).
The PWM output for channel A with
OCR0A will be on pin 12 (PD6).
Timer Output Arduino Output Chip Pin Pin Name Port Name
OC0A 6 12 PD6 Port D
OC0B 5 11 PD5 Port D
OC1A 9 15 PB1 Port B
OC1B 10 16 PB2 Port B
OC2A 11 17 PB3 Port B
OC2B 3 5 PD3 Port D
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Microprocessor and Embedded Systems
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Microprocessor and Embedded Systems
int main() {
// OC0B pin is set as PWM output pin by sending a HIGH to Port D’s Data Direction Register, DDRD
DDRD |= (1<<PD5);
OCR0B= 191; // Load 191 into OCR0B for setting its duty cycle to 75% (See previous example)
// Configure TCCR0A and TCCR0B register for (i) non-inverting (10), (ii) Fast PWM mode 3 (011), (iii) No
// Pre-scalar (001) for frequency control. By default, 0s are there, but you may set them explicitly.
TCCR0A |= (1 << COM0B1) | (1<<WGM01) | (1<<WGM00); Timer Output Arduino Output Chip Pin Pin Name Port Name
TCCR0B |= (1<<CS00); OC0A 6 12 PD6 Port D
// TCC0A = 0b00100011; TCC0B = 0b00000001; OC0B 5 11 PD5 Port D
// TCC0A = 0x23; TCC0B = 0x01 OC1A 9 15 PB1 Port B
while(1); OC1B 10 16 PB2 Port B
int main() {
// OC0B pin is set as PWM output pin by sending a HIGH to Port D’s Data Direction Register, DDRD
DDRD |= (1<<PD5);
OCR0A = 200; // Top Value of 200 (must be equal or greater than the value in the OCR0B)
OCR0B= 191; // Load 191 into OCR0B for setting its duty cycle to 75% (See previous example)
// Configure TCCR0A and TCCR0B register for (i) non-inverting (10), (ii) Fast PWM mode 7 (111), (iii) No
// Pre-scalar (001) for frequency control. By default, 0s are there, but you may set them explicitly.
TCCR0A |= (1 << COM0B1) | (1 << COM0A0) | (1<<WGM01) | (1<<WGM00);
TCCR0B |= (1<<WGM02) | (1<<CS00);
// TCC0A = 0b01100011 = 0x63; TCC0B = 0b00001001 = 0x09;
while(1);
return 0;
} 30
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Microprocessor and Embedded Systems
int main() {
// OC0A pin is set as PWM output pin by sending a HIGH to Port D’s Data Direction Register, DDRD
DDRD |= (1<<PD6);
OCR0A= 63; // Load 63 into OCR0A for setting its duty cycle to 75% (See previous example)
// Configure TCCR0A and TCCR0B register for (i) inverting (11), (ii) Fast PWM mode 3 (011), (iii) No
// Pre-scalar (001) for frequency control. By default, 0s are there, but you may set them explicitly.
TCCR0A |= (1 << COM0A1) | (1 << COM0A0) | (1<<WGM01) | (1<<WGM00);
TCCR0B |= (1<<CS00);
// TCC0A = 0b11000011 = 0xC3; TCC0B = 0b00000011 = 0x03;
while(1);
return 0;
}
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Programming Arduino for Phase-Correct Microprocessor and Embedded Systems
PWM
The next code fragment sets up phase-correct PWM on pins 3 and 11 of the Timer 2
using the value of OCR2A as the TOP value for the timer. The waveform generation
mode bits WGM2x are set to 101 for phase-correct PWM (mode 5) with OCR2A
controlling the TOP limit. The OCR2A TOP limit is arbitrarily set to 180, and the
OCR2B compare register is arbitrarily set to 50 (this value must be less than or equal
to the value stored in the OCR2A. The mode of the OCR2A register is set to “Toggle
on Compare Match” by setting the COM2A bits to 01.
The timer can be configured in phase-correct PWM
mode to reset when it reaches OCRnA.
Phase-Correct
32 PWM with OCRA top
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Programming Arduino for Phase-Correct Microprocessor and Embedded Systems
PWM CS22 CS21 CS20
This is the program segment using Timer2:
The data direction register of port D must be set
DDRB |= (1<<PB3);
DDRD |= (1<<PD3);
pinMode(3, OUTPUT);
pinMode(11, OUTPUT);
TCCR2A = _BV(COM2A0) | _BV(COM2B1) | _BV(WGM20);
TCCR2B = _BV(WGM22) | _BV(CS22); Timer Output Arduino Output Chip Pin Pin Name Port Name
OC0A 6 12 PD6 Port D
OCR2A = 180; OC0B 5 11 PD5 Port D
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Programming Arduino for Phase-Correct Microprocessor and Embedded Systems
PWM
The PWM frequency of Output A for the Phase Correct PWM Mode:
Hz
The duty cycle of the Non-Inverting mode Phase-Correct PWM is calculated using the formula-
The duty cycle of the Inverting mode Phase-Correct PWM signal is calculated using the formula-
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Programming Arduino for Phase-Correct Microprocessor and Embedded Systems
PWM
The PWM frequency of Output B for the Phase Correct PWM Mode:
Hz
The duty cycle of the Non-Inverting mode Phase-Correct PWM is calculated using the formula-
The duty cycle of the Inverting mode Phase-Correct PWM signal is calculated using the formula-
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Microprocessor and Embedded Systems
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