Embedded Systems

What is Embedded System?

• A combination of computer hardware and software, and
perhaps additional mechanical and other parts, designed to
perform a dedicated function.

• Any computer whose end objective is not primarily

computational.

• Any computer system other than the traditional desktop or

laptop system.
Application areas of Embedded Systems
• Work Place
• Banks
• Hospitals
• Industry
• Agriculture
• Supermarkets
• Defense and space
• Transport
• Telecom
• Entertainment
• Convenience
• Razors, Noise cancellation headphones, Metro card
 Why Embedded Systems in home
appliances?

To enhance the performance of devices:

Example:
• Air conditioner
• Washing Machine
 Related terms-
• Physical Computing: A computing system
which is aware of the environment, analyse
and present the output

• Cyber physical system

• Internet of Things (IoT)

• Embedded Systems
Comparing Embedded System and General Purpose Computing Systems

• ES are dedicated to specific tasks.

• ES can be implemented using wide variety of
processors, even generic or custom. GP usually use
highest performance processor.
• ES are cost sensitive.
• ES are supposed to work under real-time constraints.
• ES are designed to operate under severe
environmental conditions.
• ES are infrequently reprogrammed.
• Es have hard reliability and correctness requirements.
 A few terminologies-
• Computer: CPU, Memory and I/O ports
• Microprocessor: CPU on a single chip
• Microcomputers: Microprocessor,
Memory and I/O ports on a single PCB
• Microcontroller: Microcomputer on a
single chip
• System on chip (SoC): Microcontroller
plus programmable analog
Ways to implement Embedded computer

• General Purpose Processor (GPP)

• Application Specific Processor (e.g.
Microcontroller, Digital Signal Processor)
• Single Purpose Computer
 Key Parameters-
• Time to market
• Overall system cost
 Choice of Microcontroller
• Is MC easy to use?
• High level language supported?
• How difficult to move to different device?
• Development tools
 Classification of Microcontroller
I. Memory Architecture
II. Bit handling Capacity
III. Instruction Architecture
 PIC Microcontrollers

• PIC are microcontrollers by Microchip

• PIC- Peripheral Interface Controllers
• RISC instruction set
• Harvard Architecture
• Available in 8-, 16-, 32- bit controllers
• PIC microcontrollers are of low cost, very fast and
easy for the programming and execution of the
program.
• Interfacing with other peripherals is also very easy.
8-Bit PIC Microcontrollers
 Comparison with PIC16F and PIC18F
Similarities-
• Similar packages and pinouts
• Similar special function register (SFR)
names and functions
• Similar peripheral devices
• Subset of PIC18F instruction set
• Similar development tools
 New in PIC18F
• Number of instructions doubled
• 16-bit instruction word
• More external interrupts
• Priority-based interrupts
• Enhanced status register
• Increased program and data memory size
• Bigger stack
• Phase-locked loop (PLL) clock generator
• Enhanced input-output port architecture
• Set of configuration registers
• Higher speed of operation
• Lower power operation
 Basic features of PIC18F-series microcontrollers
• 77 instructions
• PIC16 source code compatible
• Program memory addressing up to 2Mbytes
• Data memory addressing up to 4Kbytes
• DC to 40MHz operation
• Interrupt priority levels
• 16-bit-wide instructions, 8-bit-wide data path Up to two 8-bit
timers/counters
• Up to three 16-bit timers/counters
• Up to four external interrupts
• Master synchronous serial port module (SPI and I2C modes)
• Up to two USART modules Parallel slave port (PSP)
• Power-on reset (POR), power-up timer (PWRT), and oscillator
start-up timer (OST) Watchdog timer (WDT)
 Special features

• Direct CAN 2.0 bus interface

• Direct USB 2.0 bus interface
• Direct LCD control interface
• TCP/IP interface
• ZigBee interface
• Direct motor control interface
The 18FXX2 microcontroller family
Features of PIC18F4550
Pin Description
Block diagram/Architecture of the PIC18F452 microcontroller
• The program counter and program memory are shown in the
upper left portion of the diagram. Program memory addresses
consist of 21 bits, capable of accessing 2Mbytes of program
memory locations. The PIC18F452 has only 32Kbytes of program
memory, which requires only 15 bits. The remaining 6 address
bits are redundant and not used. A table pointer provides access
to tables and to the data stored in program memory. The program
memory contains a 31-level stack which is normally used to store
the interrupt and subroutine return addresses.

• The data memory can be seen at the top center of the diagram.
The data memory bus is 12 bits wide, capable of accessing
4Kbytes of data memory locations. As we shall see later, the data
memory consists of special function registers (SFR) and general
purpose registers, all organized in banks
• The bottom portion of the diagram shows the timers/counters,
capture/compare/PWM registers, USART, A/D converter, and EEPROM
data memory. The PIC18F452 consists of: 4 timers/counters 2
capture/compare/PWM modules 2 serial communication modules 8 10-
bit A/D converter channels 256 bytes EEPROM

• The oscillator circuit, located at the left side of the diagram, consists of:
Power-up timer Oscillator start-up timer Power-on reset Watchdog
timer Brown-out reset Low-voltage programming In-circuit debugger
PLL circuit Timing generation circuit

• The PLL circuit is new to the PIC18F series and provides the option of
multiplying up the oscillator frequency to speed up the overall operation.
The watchdog timer can be used to force a restart of the microcontroller
in the event of a program crash.
 Architecture
• Consists of memory organization (RAM, ROM,
stack), CPU, timers, counters, ADC, DAC, serial
communication and I/O ports.

• CPU- ALU, Memory Unit (MU), Control Unit

(CU), Accumulator
Memory Organization:
- Program Memory

- Data Memory:
General Purpose Registers (GPR)
Special Function Register (SFR)
- STATUS registers
- PORT registers
- TRIS registers

- Data EEPROM
• Serial Communication- USART, SPI Protocol, I2C
Protocol

• I/O ports

• CCP module: Capture Mode, Compare Mode,

PWM mode

• Timers: Timer0, Timer1, Timer2, Timer3

Memory organization
Program Memory Map
Data Memory Map
• The data memory map of the PIC18F452
microcontroller is shown in Figure. The data memory
address bus is 12 bits with the capability to address up
to 4Mbytes. The memory in general consists of sixteen
banks, each of 256 bytes, where only 6 banks are used.
The PIC18F452 has 1536 bytes of data memory (6
banks 256 bytes each) occupying the lower end of the
data memory.

• The special function register (SFR) occupies the upper

half of the top memory bank. SFR contains registers
which control operations such as peripheral devices,
timers/ counters, A/D converter, interrupts, and USART
 Status Register
-contains the arithmetic status of the ALU
Clocking Scheme
 Pipelining
Execution of most of the PIC18 instructions into two stages:
(instruction fetch and instruction execution) and then overlapped the execution of two
consecutive instructions. Each stage takes one instruction clock cycle to complete. The result of
the overlap of instruction execution is that most instructions take one instruction clock cycle to
complete. This scheme is called instruction pipelining.
 Instruction Set
• Contains about 77 instructions

• Instruction set is grouped into three categories-

o Byte-oriented operations
o Bit-oriented operations
o Literal and control operations

• Each midrange instruction is 14 bit word which is divided into opcode

which specifies the instruction type and one or more operands which
further specify the operation of the instruction.

• All instructions are executed in one single instruction cycle, unless a

conditional test is true or the program counter is changed as a result of
an instruction. In these cases, the execution takes two instruction cycles
with the second cycle executed as an NOP.
 Byte-oriented Instructions
Primarily for-
• Arithmetic and logical operations
• Data movement

Examples
• addwf f,d
Add contents of W with register f, if d=0 store result in W
else store in result f; e.g.: addwf 0x20,0

• clrf f
Contents of register f are cleared eg; clrf 0x30

• movwf f
Move data from W register to register f eg; movwf 0x04
• decfsz f,d conditional branching
Decrement register f, place result in f or w depending
on value of d; skip the next instruction if result is zero
NOP
e.g. decfsz 0x20,1

• decf f,d
Decrement f, place result depending on value of d
e.g. decf 0x30,1
 Literal Operations
• Immediate addressing mode
Examples
• addlw k
Add literal k to register W,
e.g. addlw 0x05

• movlw k
move literal k into register W
e.g: movlw 0x21
 Bit Oriented Operations
• Manipulate bits in control and status registers

Examples-
• bsf f,b
Set bit b (where b=0 to 7) in register f
eg: bsf 0x03, 5

• btfsc f,b
test bit b of register f, skip next instruction if bit is 0
eg. btfsc 0x03, 2

• Instructions bcf and bsf perform clear or set one bit anywhere in the memory

• Bit operations consists of following micro operations (read, modify, write)-

CPU reads the complete byte
CPU changes one it in it
Then writes the entire byte back
 Control Instructions
• goto (unconditional branch) and call (call subroutine)

• retfie
Return from interrupt service routine and re-enable interrupts

• sleep
Go to standby mode, i.e. when no useful operation is performed
it is put to sleep

• clrwdt
Clear Watchdog timer
 Example Code
• Decrement a 16 bit counter:
– upper byte of the counter COUNTH & lower byte
COUNTL

movf COUNTL,F ; Set Z if lower byte =0

btfsc STATUS,Z ; if so, decrement COUNTH
decf COUNTH,F
decf COUNTL,F ; decrement COUNTL
 Example Code
• This program puts out a square wave on PORTA pin0

clrf PORTA ; clear porta register

Clrf TRISA ; make pota all outputs
Loop bsf PORTA,0 ; turn on porta pin0
Nop ; delay
Nop ;
Bcf PORTA,0 ; TURN OFF PORTA PIN0
GOTO Loop ; loop back
 Example Code: branching
• Set EqualFlag if PORTA=PORTB

bcf EqualFlag, 7 ; First, clear the flag

movf PORTA, W ; Move PORTA>W
subwf PORTB, W ; W- PORTB> W
btfsc STATUS, Z ; Check Z bit
Bsf EqualFlag,7 ; Ports equal; set flag
 The PIC Family: Peripherals
Different PICs have different on-board
peripherals
Some common peripherals are:
– Tri-state (“floatable”) digital I/O pins
– Analog to Digital Converters (ADC)
– Serial communications: UART (RS-232C), SPI, I2C, CAN
– Pulse Width Modulation (PWM)
– Timers and counters
– Watchdog timers
 Interrupts: a review
• An interrupt is any service request that causes the CPU to
stop its current execution stream and to execute an
instruction stream that services the interrupt
• When the CPU finishes servicing the interrupt, it returns to
the original execution stream at the point where it left off.
Interrupts can be generated internally (by some event inside
the chip) or externally (by some external event). An example
of an internal interrupt is a timer overflowing or the A/D
completing a conversion. An example of an external
interrupt is an I/O pin changing state
• Interrupt driven I/O for interfacing with on chip peripherals
• Interrupts can be useful in many applications such as:
• Time critical applications. Applications which require the immediate attention of
the CPU can use interrupts. For example, in an emergency such as a power failure
or fire in a plant the CPU may have to shut down the system immediately in an
orderly manner. In such applications an external interrupt can force the CPU to
stop whatever it is doing and take immediate action.

• Performing routine tasks. Many applications require the CPU to perform routine
work at precise times, such as checking the state of a peripheral device exactly
every millisecond. A timer interrupt scheduled with the required timing can
divert the CPU from normal program execution to accomplish the task at the
precise time required.

• Task switching in multi-tasking applications. In multi-tasking applications, each

task may have a finite time to execute its code. Interrupt mechanisms can be
used to stop a task should it consume more than its allocated time.

• To service peripheral devices quickly. Some applications may need to know when
a task, such as an A/D conversion, is completed. This can be accomplished by
continuously checking the completion flag of the A/D converter. A more elegant
solution would be to enable the A/D completion interrupt so the CPU is forced to
 Interrupts in PIC
• Sources of interrupt are many
– INT pin interrupt from external source
– Port B change interrupt (RB7:RB4)
– Timer overflow interrupts
– USART interrupts
– A/D conversion interrupts
– LCD interrupt
– others
• The core interrupt sources are: External edge-
triggered interrupt on INT0, INT1, and INT2 pins.
PORTB pins change interrupts (any one of the
RB4–RB7 pins changing state)
Timer 0 overflow interrupt

• The peripheral interrupt sources are: Parallel slave

port read/write interrupt A/D conversion
complete interrupt USART receive interrupt
USART transmit interrupt Synchronous serial port
interrupt CCP1 interrupt TMR1 overflow interrupt
TMR2 overflow interrupt Comparator interrupt
• In the PIC18F452 microcontroller there are ten
registers that control interrupt operations.
These are:
• RCON
• INTCON
• INTCON2
• INTCON3
• PIR1, PIR2
• PIE1, PIE2
• IPR1, IPR2
RCON Register
INTCON Register
 Interrupt Management
• Use of register INTCON: Status and Control
– Bit 7: Global interrupt enable
• Enables (if set) all unmasked interrupts or disables all interrupts
– Bits 6,5,4,3: For enabling peripheral, timer0, external
interrupt, port B bit change interrupts respectively
– Bits 2,1,0 : Timer0, INT, port change interrupt flag
respectively
• Flag bits get set when interrupt occurs regardless of the value of
enable bit
 Peripheral Interrupts
• Managed using PIE (Peripheral Interface Enable)
and PIR (Peripheral Interface Register) registers
• PIE registers contain bits for enabling interrupts
from individual peripherals
• PIR registers contain flag bits for individual
peripheral interrupts
• Bit oriented instructions can be used to examine
and/or manipulate interrupt control and status
registers
 Interrupt Processing
• When interrupt is responded to
– GIE bit is cleared to disable other interrupts
– PC is pushed into stack
– PC is loaded with temporary address (eg. 0004h)
– Save STATUS & W register in temporary memory locations
– In the ISR (Interrupt Service Routine), source of interrupt
is determined by polling the interrupt flag bit
• Return from interrupt instruction (retfie) exits ISR,
sets GIE bit to allow pending interrupt to execute
 PIC Peripherals: Digital I/O
• All PICs have digital I/O pins, called ‘Ports’

• Ports used to control and monitor external devices

• Ports have 2 control registers

– TRISX sets whether each pin is an input or output
– PORTX sets their output bit levels

• Most pins have 25mA source/sink (directly drives LEDs)

 Typical Configuration: Port A
Setting a TRISA bit
put output drivers
in high impedance
state; clearing a
bit in TRISA puts
contents of
output latch on
the pin

Ref: PIC reference manual

 Example: Port A
• All pins are I/O with associated direction bits in TRISA
• Initialisation code:
clrf STATUS ;bank 0
clrf PORTA ; initialises by clearing
output latches
bsf STATUS, RP0 ; select bank1
movlw 0xCF ; value used to initialise data
direction
movlwf TRISA ; PortA<3:0>=input,
<5:4>=output
 Managing port read/write
• BCF/BSF PORTn does the following:
– Reads in the PORTn byte
– Clears/sets the bit
– Write the whole byte back.
– If external input pulls a different output pin low or high
during the READ, the read in value will not be what you
expect - WORSE, the WRITE will permanently change it that
way.
• Solution: Use Shadowed I/O (e.g.: set PORTA Bit 0)
bsf _PORTA, 0
movf _PORTA, W
movwf PORTA
 PIC Peripherals: Timers
• Available in all PICs. Used for
synchronization with other devices taking
care of various timing requirements.
• 14+ bit cores may generate interrupts on
timer overflow.
• Some 8 bits, some 16 bits, some have
prescalers, postscalers or both.
• Can use external pins as clock in/clock out
 PIC Timers / Timer 0
• 8 bit timer/counter with prescaler

• Readable and writeable

• 8-bit software programmable prescaler

– Prescaler is an option to divide incoming signal with
various factors. can divide the counter input by
2,4,8,16 …256

• Internal or external clock set

• Interrupt on overflow from 0xFF to 0x00
• Edge Select for external clock
 PIC Timers / Timer 1
• 16-bit timer/counter
• Interrupt on overflow
• Readable and writeable
• Different Operating modes
– External crystal can be used
• Programmable prescaler
 Timer1: Operating Modes
• Synchronised Timer
– Increments every instruction cycle
– Perfectly synchronized with the processor clock and can
count the no of instruction cycles executed.
• Synchronised Counter
– Timer increments on rising edge of external clock
– External clock is synchronised with internal phase clock
• Asynchronous Counter
– Timer increments independent of internal phase clock
 Typical Even when processor sleeps, timer1
Application: continues to count in asynchronous mode,
Real-time Clock on overflow could wake-up the device

Ref: PIC reference manual

 PIC Timers / Timer 2
• Readable & writable
timer/counter with
prescaler and
postscaler
• Interrupt on overflow

Ref: PIC reference manual

Timer 3
 Watchdog Timer

• Free running on chip RC oscillator which does not

require any external component
• A WDT time-out generates a device reset
• In sleep mode a WDT time-out causes the device to
wake-up
• To avoid unintended device reset, postscaler has to
be changed after clearing watchdog timer
• WDT is enabled/disabled by a device configuration
bit
 PIC Peripherals: CCP Modules
• Capture/Compare/PWM (CCP)
• Each module contains a 16 bit register which can
operate as 16-bit capture, 16-bit compare or as 10-
bit PWM master-slave duty cycle register
• Capture counts external pin changes
• Compare will interrupt when the timer equals the
value in a compare register
 Capture
• Capture mode records value of timer1 when
events like rising edge or falling edge occurs
on pin CCPx
• When capture is made, interrupt request flag
bit is set
• Recording events with respect to time. Not
available with other general purpose
processors.
 Compare
• Content of register compared with Timer1
register pair value
• When match occurs, voltage level at CCPx pin
is changed depending on the value of control
bits
 PWM

• Pulse Width Modulation

• Duty Cycle often expressed as a percentage of the period.
• Average DC voltage will be approximately the same
percentage of the “on” voltage.
• Typical uses:
– Intensity control
– Motor control
– Temperature control
 PWM: A simple application
• Speed control of a DC motor
– Vary the Thigh and Tlow of the output
waveform.
– When the duty ratio is changed the
speed of the Motor is changed as
average DC input changes
 PIC Peripherals: ADCs
• Converts an analog input signal to 8-bit digital
value
– Generates result via successive approximation
• Input analog channel, Conversion clock, Analog
reference voltage is software selectable
• Can operate even while the device in sleep mode.
• Can generate an interrupt on ADC conversion
done
– Result written on to ADRES register
 More PIC Peripherals
• Some devices have 8-bit parallel slave port
– Multiplexed onto one of devices I/O port
– For interfacing with 8-bit peripherals or microprocessors
• USART (universal synchronous and asynchronous
receiver transmitter)
– Can be configured as a full duplex channel for
communication with or peripheral devices like CRT
• LCD Module
– Generates timing control to drive LCD panel
– Also provides control of pixel data
 More PIC Peripherals
• EEPROM data memory
– Readable and writable under normal operations
– Not mapped directly in register file space
– Indirectly accessed using SFR
• In-circuit programmer
– Serial in-circuit programming support
 Summary
• We have studied PIC family of processors
– Architecture
– Instruction set
– Peripherals
• PIC processors are well suited for low-end and
mid-range applications