Register Transfer & -operations 1

REGISTER TRANSFER AND MICROOPERATIONS

• Register Transfer Language

• Register Transfer

• Bus and Memory Transfers

• Arithmetic Microoperations

• Logic Microoperations

• Shift Microoperations

• Arithmetic Logic Shift Unit

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Register Transfer & -operations 2

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Register Transfer & -operations 3

Digital Computer System

• A digital system is an interconnection of
digital hardware modules that accomplish a
specific information-processing task.
• The modules are constructed from such
digital components as –
– registers, decoders, multiplexers
– arithmetic elements, and
– control logic.
• The various modules are interconnected with
common data and control paths to form a
digital computer system.

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Register Transfer & -operations 4

Registers
• A register is a group of flip-flop with each flip-
flop capable of storing one bit of information.
• An n-bit register has a group of n flip-flop and is
capable of storing any binary information of n
bits.
• In addition to the flip-flops, a register may have
combinational gates that perform certain data-
processing tasks.
• Various types of registers are available
commercially.
• The transfer of new information into a register is
referred to as loading the register.

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Register Transfer & -operations 5 Register Transfer Language

MICROOPERATIONS
• The operations that are performed on the data stored in
registers are called microoperations.
• The result of the microoperation may replace the
previous binary information of a register or may be
transferred to another register.
• The functions built into registers are examples of
microoperations like-----
– Shift
– Load
– Clear
– Increment
–…

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Register Transfer & -operations 6 Register Transfer Language

MICROOPERATION Contd..

Microoperation is an elementary operation

performed (during one clock pulse), on the
information stored in one or more registers

Registers ALU 1 clock cycle

(R) (f)

R  f(R, R)
f: shift, load, clear, increment, add, subtract, complement,
and, or, xor, …
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Register Transfer & -operations 7 Register Transfer Language

ORGANIZATION OF A DIGITAL SYSTEM

• Definition of the (internal) organization of a
computer:- The internal hardware organization of
a digital computer is best defines by specifying:
-The Set of registers it contains and their
functions

-Microoperations set , the sequence of

microoperation performed on binary information
stored in the registers.
(Set of allowable microoperations provided
by the organization of the computer)

-The Control signals that initiate the sequence

of microoperations (to perform the functions)
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Register Transfer & -operations 8 Register Transfer Language

REGISTER TRANSFER LEVEL

• Viewing a computer, or any digital system, in this way is called the
register transfer level

• This is because we’re focusing on

– The system’s registers
– The data transformations in them, and
– The data transfers between them.
The term “register transfer” implies the availability of hardware logic
circuits that can perform the a stated microoperation and transfer
the result of the operation to the same or another register.

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Register Transfer & -operations 9 Register Transfer Language

REGISTER TRANSFER LANGUAGE (RTL)

• Rather than specifying a digital system in words, a specific
notation is used named register transfer language
• For any function of the computer, the register transfer
language can be used to describe the (sequence of)
microoperations
• Register transfer language is:
– A symbolic language
– A convenient tool for describing the internal organization
of digital computers
– Can also be used to facilitate the design process of digital
systems.
(The symbolic notation used to describe the microoperation
transfers among registers is called a register transfer
language)

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Register Transfer & -operations 10 Register Transfer Language

DESIGNATION OF REGISTERS
• Registers are designated by capital letters, sometimes followed
by numbers (e.g., A, R13, IR)
• Often the names indicate function:
– MAR - memory address register
– PC - program counter
– IR - instruction register

• Registers and their contents can be viewed and represented in

various ways
– A register can be viewed as a single entity:

MAR

– Registers may also be represented showing the bits of data

they contain
Register R
1 01 0 0 0 1 1

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Register Transfer & -operations 11 Register Transfer Language

DESIGNATION OF REGISTERS

• Designation of a register
- a register
- portion of a register
- a bit of a register

• Common ways of drawing the block diagram of a register

Register Showing individual bits

R1 7 6 5 4 3 2 1 0

15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields

0-7 are low byte , and 8-15 are

high bit

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Register Transfer & -operations 12 Register Transfer

REGISTER TRANSFER
• Information transfer (the contents) of one register to
another is a register transfer.

• A register transfer is indicated as

R2  R1
In this case the contents of register R1 are copied
(loaded) into register R2.
– A simultaneous transfer of all bits from the source R1 to
the destination register R2, during one clock pulse. (If
more then 1 bit, then there will be a parallel
communication)
– Note that this is a non-destructive; i.e. the contents of
R1 are not altered by copying (loading) them to R2 (the
content of the R1 does not change after the transfer).
-  Known as replacement operator.

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Register Transfer & -operations 13 Register Transfer

REGISTER TRANSFER
• A register transfer such as

R3  R5

Implies that the digital system has

– the data lines from the source register (R5)

to the destination register (R3)
– Parallel load capacity in the destination
register R3)
– Control lines to perform the action
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Register Transfer & -operations 14 Register Transfer

CONTROL FUNCTIONS
• Normally, we want the transfer to occur only under a
predetermined control condition. Often actions need to
only occur if a certain condition is true.
• This is similar to an “if” statement in a programming
language.
like ---- If (P= 1) then (R1  R2)
• In digital systems, this is often done via a control signal,
called a control function generated by control section. (P
is a Boolean variable equal 0 or 1)
– If the signal is 1, the action takes place
• This is represented as: P: R2  R1
Which means “if P = 1, then load the contents of register
R1 into register R2”, i.e., if (P = 1) then (R2  R1)

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Register Transfer & -operations 15 Register Transfer

HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS

Implementation of controlled transfer P: R2 R1

Registers are assumed to use positive-edge-triggered

flip-flops.

P is activated in the Control P Load

R2 Clock
control section by Circuit
n
rising edge of a clock R1

pulse at Block diagram

t t+1
time t.
Clock

Load
Transfer occurs here Timing diagram

The next positive transition of the clock at time t+1 finds the load input
active and the data inputs of R2 are then loaded into the register in
parallel. P may go back to 0 at time t+1, (transfer will occur with every
clock pulse while P is remains active).
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Register Transfer & -operations 17 Register Transfer

SIMULTANEOUS OPERATIONS
• If two or more operations are to
occur simultaneously, they are
separated with commas:
P: R3  R5, MAR  IR
• Here, if the control function P = 1,
load the contents of R5 into R3, and
at the same time (clock), load the
contents of register IR into register
MAR.
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Register Transfer & -operations 18 Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols Description Examples

Capital letters Denotes a register MAR, R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
Arrow  Denotes transfer of information R2 R1
Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A B, R1
R2

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Register Transfer & -operations 19 Register Transfer

CONNECTING REGISTRS
• In a digital system with many
registers, it is impractical to have
data and control lines to directly
allow each register to be loaded with
the contents of every possible other
registers.
• To completely connect n registers 
n(n-1) lines are required
• O(n2) cost.

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Register Transfer & -operations 20 Register Transfer

CONNECTING REGISTRS

• This is not a realistic approach to

use in a large digital system.
Instead, take a different approach.
• Have one centralized set of
circuits for data transfer – the bus.
• Have control circuits to select
which register is the source, and
which is the destination.

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Register Transfer & -operations 21

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Register Transfer & -operations 22 Bus and Memory Transfers

BUS AND MEMORY TRANSFERS

Bus is a path (of a group of wires) over which information is
transferred, from any of several sources to any of several destinations.
Register A Register B Register C Register D
From a register to bus:
BUS  R
Bus lines
X Y Register Select
Register A Register B Register C Register D
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4
0 0 A
0 1 B
1 0 C B1 C 1 D 1 B2 C 2 D 2 B3 C 3 D 3 B4 C 4 D 4

1 1 D
4 x1 4 x1 4 x1 4 x1
n bits = n MUX MUX1 MUX2 MUX3 MUX4
Size of MUX = k x 1
x
(k is the no of registers) select
y

Select lines will be depend of the k

(2s = k) s = no of select lines 4-line Common bus

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Register Transfer & -operations 23 Bus and Memory Transfers

TRANSFER FROM BUS TO A DESTINATION REGISTER

Bus lines
R1  BUS
BUS  C
Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3
R1  BUS
Means R1  C
D 0 D1 D2 D 3
z E (enable)
Select 2x
w 4
Decode
r
Three-State Bus Buffers: The bus system can be constructed with three
state gates instead of multiplexers. Two states are signals equivalent to logic
1 and 0. The third state is high-impedance state.
Output Y=A if C=1
Normal input A High-impedance if C=0
Control input C
Bus line with three-state buffers
Bus line for bit 0
A0
B0
C0
D0

S0 0
Select 2X4
1
S1 Decoder
2
Enable 3

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Register Transfer & -operations 24

Register Transfer (Block Dia)

Register A Register B Register C Register D

Bus lines
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D0 D1 D2 D3
z E (enable)
Select 2x4
w
Decoder

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Register Transfer & -operations 25

E (enable)
Reg. R3

D3
Reg. R2

D2

Decoder
2x4
D1
D0
Reg. R1

w
z
Select
Reg. R0
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Register Transfer & -operations 26 Bus and Memory Transfers

BUS TRANSFER IN RTL

• Depending on whether the bus is to be
mentioned explicitly or not, register
transfer can be indicated as either

or
R2 R1
R1the bus is implicit, but in
BUS case
• In the former
the latter,
R2it 
is explicitly
BUS indicated

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Register Transfer & -operations 27 Bus and Memory Transfers

MEMORY (RAM)
• Memory (RAM) can be thought as a sequential circuits containing
some number of registers.
• These registers hold the words of memory.
• Each of the r registers is indicated by an address.
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data.
• Assume the RAM contains r = 2k words n bit each. It needs the
following:
– n data input lines
data input lines
– n data output lines
– k address lines n

– A Read control line address lines

– A Write control line k
RAM
Read
unit
(128 x 8 RAM : 8 data input/output
Write
lines, 7 bit address lines for 128 words/registers) n
data output lines

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Register Transfer & -operations 28 Bus and Memory Transfers

MEMORY TRANSFER
• Collectively, the memory is viewed at the register level as
a device, M.
• Since it contains multiple locations, we must specify
which address in memory we will be using.
• This is done by indexing memory references.
• Memory is usually accessed in computer systems by
putting the desired address in a special register, the
Memory Address Register (MAR, or AR).
• When memory is accessed, the contents of the MAR get
sent to the memory unit’s address lines
M
Read
Memory
AR
unit
Write
Memory
Address Lines

Data out Data in

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Register Transfer & -operations 29 Bus and Memory Transfers

MEMORY READ
• To read a value from a location in memory and load it into a register,
the register transfer language notation looks like this:

or R1  M[AR]
R1  M[MAR]
• This causes the following to occur--
– The contents of the MAR/AR get sent to the memory address
lines.
– A Read (= 1) gets sent to the memory unit.
– The contents of the specified address are put on the memory’s
output data lines.
– These get sent over the bus to be loaded into register R1.

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Register Transfer & -operations 30 Bus and Memory Transfers

MEMORY WRITE
• To write a value from a register to a location in memory looks
like this in register transfer language:

 R1
M[MAR]
or M[AR]  R1
• This causes the following to occur
– The contents of the MAR/AR get sent to the memory address
lines.
– A Write (= 1) gets sent to the memory unit.
– The values in register R1 get sent over the bus to the data
input lines of the memory.
– The values get loaded into the specified address in the
memory.

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Register Transfer & -operations 31 Bus and Memory Transfers

SUMMARY OF R. TRANSFER MICROOPERATIONS

A B Transfer content of reg. B into reg. A

AR DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A  constant Transfer a binary constant into reg. A
ABUS R1, Transfer content of R1 into bus A and, at the same time,
R2 ABUS transfer content of bus A into R2
MAR/AR Memory Address Register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR  M Memory read operation: transfers content of
memory word specified by AR into DR
M  DR Memory write operation: transfers content of
DR into memory word specified by AR

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Register Transfer & -operations 32 Arithmetic Microoperations

MICROOPERATIONS

• Computer system microoperations

are of four types:
- Register transfer microoperations
- Arithmetic microoperations
- Logic microoperations
- Shift microoperations

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Register Transfer & -operations 33 Arithmetic Microoperations

ARITHMETIC MICROOPERATIONS
• The basic arithmetic microoperations are
– Addition
– Subtraction
– Increment
– Decrement

Typical Arithmetic Micro-Operations

R3  R1 + R2 Contents of R1 plus R2 transferred to R3

R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2
R3  R1 + R2’+ 1 Subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement

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Register Transfer & -operations 34

HALF Adder
A combinational circuit that performs the arithmetic addition of two
bits is called a half-adder . One that performs the addition of
three bits (two significant bits and a previous carry) is called a
full-adder. Two half adder are needed to implement a full adder.
HALF ADDER: The input variables x and y represents the two
significant bits to be added. The output variables the sum and
carry.

The Boolean function can be

obtained directly from the truth
table : S = x’y + xy’ = x y
C = xy

X Y
C S
0 0
0 0
0 1
0 1
1 0
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1 Computer Architectures
Register Transfer & -operations 35

FULL Adder
It consists of three inputs and two outputs . Two of the
inputs variables, denoted by x and y, represents the two
significant bits to be added . The third input z represents
the carry from the previous lower significant bit position.
The two Boolean expression for the full adder :
S = x y z
C = xy + (x y )z
x y z c
s
0 0 0 0
0
0 0 1 0
1
0 1 0 0
1
0 1 1 1
0
1 0 0 0
1
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Register Transfer & -operations 36 Arithmetic Microoperations

BINARY ADDER
Binary Adder (4 bit binary adder)

B3 A3 B2 A2 B1 A1 B0 A0

FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

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Register Transfer & -operations 37 Arithmetic Microoperations

BINARY ADDER / SUBTRACTOR

Binary Adder-Subtractor
When M =0 , then B 0 =B, When M = 1 then we have B 1 = B’ and carry C 0 = 1

B3 A3 B2 A2 B1 A1 B0 A0

C3 C2 C1 C0
FA FA FA FA
Mode input

C4 S3 S2 S1 S0 M=0 adder
M=1
subtractor
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Register Transfer & -operations 38 Arithmetic Microoperations

BINARY INCREMENTER
Binary Incrementer

A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0
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Register Transfer & -operations 39 Arithmetic Microoperations

ARITHMETIC CIRCUIT
Cin
S1
S0
A0 X0 C0
S1 D0
S0 FA
B0 0 4x1 Y0 C1
1 MUX
2
3
A1 X1 C1
Output can be
S1 FA D1 calculated
S0
B1 0 4x1 Y1 C2 from
1 MUX
2
3 D = A + Y + Cin
A2 X2 C2
S1 FA D2
S0
B2 0 4x1 Y2 C3
1 MUX
2
3
A3 X3 C3
S1 D3
S0 FA
B3 0 4x1 Y3 C4
1 MUX
2
3 Cout
0 1

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A
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Register Transfer & -operations 40 Arithmetic Microoperations

ARITHMETIC CIRCUIT

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Register Transfer & -operations 41 Logic Microoperations

LOGIC MICROOPERATIONS
• Specify binary operations on the strings of bits in registers
– Logic microoperations are bit-wise operations, i.e., they work on the
individual bits of data
– useful for bit manipulations on binary data
– useful for making logical decisions based on the bit value
• There are, in principle, 16 different logic functions that can
be defined over two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

• However, most systems only implement four of these

– AND (), OR (), XOR (), Complement/NOT
• The others can be created from combination of these

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Register Transfer & -operations 42 Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

• List of Logic Microoperations
- 16 different logic operations with 2 binary vars.
n
- n binary vars → 2 2 functions

• Truth tables for 16 functions of 2 variables and the

corresponding 16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' F  A  B’
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's

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Register Transfer & -operations 43 Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

Ai
There are 16 logic 0
Bi
microoperations,
most computers 1
4X1 Fi
use only four- MUX
AND, OR, XOR, 2
and complement.
3 Select

S1
S0

Function table
S1 S0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement

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Register Transfer & -operations 44 Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

• Logic microoperations can be used to manipulate individual
bits or a portions of a word in a register

• Consider the data in a register A. In another register, B, is bit

data that will be used to modify the contents of A

– Selective-set AA+B
– Selective-complement AAB
– Selective-clear A  A • B’
– Mask (Delete) AA•B
– Clear AAB
– Insert A  (A • B) + C
– Compare AAB
– ...

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Register Transfer & -operations 45 Logic Microoperations

SELECTIVE SET
• The selective set operation sets to 1 the bits in register A
where there are corresponding 1’s in register B .

1100 At
1010 B
1110 At+1 (A  A OR B)

• If a bit in B is set to 1, that same position in A gets set to

1, otherwise that bit in A keeps its previous value

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Register Transfer & -operations 46 Logic Microoperations

SELECTIVE COMPLEMENT
• The selective complement operation complement bits in A
where there are corresponding 1’s in B. It does not affect bit
positions that have 0’s in B.

1100 At
1010 B
0110 At+1 (A  A  B)

• If a bit in B is set to 1, that same position in A gets

complemented from its original value, otherwise it is unchanged

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Register Transfer & -operations 47 Logic Microoperations

SELECTIVE CLEAR
• The selective clear operation clears to 0 the bit in
A only where there are corresponding 1’s in B.

1100 At
1010 B
0100 At+1 (A  A  B’)

• If a bit in B is set to 1, that same position in A gets

set to 0, otherwise it is unchanged

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Register Transfer & -operations 48 Logic Microoperations

MASK OPERATION

• The mask operation is similar to the selective-clear

operation except that the bits of A are cleared only where
there are corresponding 0’s in B.

1100 At
1010 B
1000 At+1 (A  A  B)

• If a bit in B is set to 0, that same position in A gets set to 0,

otherwise it is unchanged

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Register Transfer & -operations 49 Logic Microoperations

CLEAR OPERATION
• The clear operation compares the
words in A and B and produces an all
0’s result if the two numbers are equal.

1 1 0 0 At
1010 B
0 1 1 0 At+1 (A  A  B)

1 0 1 0 At
1010 B
0 0 0 0 At+1 (A  A  B)
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Register Transfer & -operations 50 Logic Microoperations

INSERT OPERATION
• An insert operation is used to introduce a specific bit pattern into A
register, leaving the other bit positions unchanged
• This is done as
– A mask operation to clear the desired bit positions, followed by
– An OR operation to introduce the new bits into the desired
positions
– Example
» Suppose you wanted to introduce 1010 into the low order four
bits of A: 1101 1000 1011 0001 A (Original)
1101 1000 1011 1010 A
(Desired)

» 1101 1000 1011 0001 A (Original)

1111 1111 1111 0000 Mask
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits (OR)
1101 1000 1011 1010 A (Desired)
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Register Transfer & -operations 51 Shift Microoperations

SHIFT MICROOPERATIONS
• There are three types of shifts
– Logical shift (left and right)
– Circular shift (left and right)
– Arithmetic shift (left and right)
• What differentiates them is the information that goes into
the serial input

• A right shift operation

Serial
input

• A left shift operation Serial

input

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Register Transfer & -operations 52 Shift Microoperations

LOGICAL SHIFT
• In a logical shift the serial input to the shift is a 0.

• A right logical shift operation:

0

• A left logical shift operation:

0

• In a Register Transfer Language, the following notation

is used
– shl for a logical shift left
– shr for a logical shift right
– Examples:
» R2  shr R2 (R2 = 1010) after shr = 0101
» R3  shl R3
Computer Organization (R3 = 0110) after shl = Computer
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Register Transfer & -operations 53 Shift Microoperations

CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted out of
the other end of the register.

• A right circular shift operation:

• A left circular shift operation:

• In a RTL, the following notation is used

– cil for a circular shift left
– cir for a circular shift right
– Examples:
» R2  cir R2 (R2 = 1001 after cir = 1100)
» R3  cil R3 (R3 = 1011 after cil = 0111)
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Register Transfer & -operations 54 Shift Microoperations

ARITHMETIC SHIFT
• An arithmetic shift is meant for signed binary numbers
(integer)
• An arithmetic left shift multiplies a signed number by two
• An arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must keep
the sign of the number the same as it performs the
multiplication or division
• A right arithmetic shift operation:

sign
bit

• A left arithmetic shift operation:

0
sign
bit

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Register Transfer & -operations 55 Shift Microoperations

ARITHMETIC SHIFT
• An left arithmetic shift operation must be checked for the
overflow
0
sign
bit

Before the shift, if the leftmost two

V bits differ, the shift will result in an
Overflow (V s the overflow flip-flop )

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2 (R2 = 1001 after ashr = 1100)
» R3  ashl R3 (R3 = 0110 after ashl = 1100)

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Register Transfer & -operations 56 Shift Microoperations

HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

0 for shift right (down)

Serial Select 1 for shift left (up)
input (IR)

S
MUX H0 Function Table
0
1
Select Output
A0
S S H0 H1 H2 H3
A1 H1
0 MUX
1
0 IR A0 A1 A2
A2
1 A1 A2 A3 IL
A3
S
MUX H2
0
1

S
MUX H3
0
1

Serial
input (IL)

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Register Transfer & -operations 57 Shift Microoperations

ARITHMETIC LOGIC SHIFT UNIT

S3
S2 Ci
S1
S0

Arithmetic D i
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi Circuit
Ai
Ai-1 shr
Ai+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F = A + B + 1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with
borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=AB XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F
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