Computer
Components
and Functions
At a top level, a computer consists of :
➢ CPU (central processing unit),
➢ memory,
➢ I/O
The components are interconnected in order to execute
programs
(1) the external behavior of each component that is, the
data and control signals that it exchanges with other
components; and
(2) the interconnection structure and the controls required
to manage the use of the interconnection structure.
The major of computer components
➢ processor,
➢ main memory,
➢ I/O
The most popular means of interconnection is
the use of a shared system bus consisting of
multiple lines. In contemporary systems, there
typically is a hierarchy of buses to improve
performance.
Computer Components
Contemporary computer designs are based on concepts
developed by john von Neuman at the Institute for Advanced
Studies, Princeton
Referred to as the von Neumann architecture and is based on
three key concepts:
Data and instructions are stored in a single read–write memory.
The contents of this memory are addressable by location, without
regard to the type of data contained there.
Execution occurs in a sequential fashion (unless explicitly
modified) from one instruction to the next.
Hardwired program
The result of the process of connecting the various components in
the desired configuration
HARDWARE
AND
SOFTWARE
APPROACHES
SOFTWARE
A sequence of codes or instructions SOFTWARE
Part of the hardware interprets each instruction and generates
control signals
Provide a new sequence of codes for each new program
instead of rewiring the hardware
MAJOR COMPONENTS
CPU I/O
Instruction interpreter
Module of general-purpose arithmetic and logic function COMPONENTS
I/O components
Input module
Contains basic components for accepting data and instructions
and converting the into an internal form of signals usable by the system
Output model Means of reporting results
Memory address Memory buffer
register (MAR) register (MBR)
Specifies the address Contains the data to be
in memory for the written into memory or
next read or write receives the data read
from memory
I/O buffer register
I/O address (I/OBR)
register(I/OAR) Used for the
Specifies a particular exchange of data
I/O device between an I/O
module and the CPU
Figure 3.2 The CPU exchanges data with memory
(MAR) - specifies the address in memory for the next read or write
(MBR) - contains the data to be written into memory or receives the data read from memory
Figure 3.3 Basic Instruction Cycle
FETCH CYCLE
At the beginning of each instruction cycle the processor fetches an instruction
from memory
The program counter (PC) holds the address of the instruction to be fetched next
The processor increments the PC after each instruction fetch so that it will fetch
the next instruction in sequence
The fetched instruction is loaded into the instruction register (IR)
The processor interprets the instruction and performs the required action
ACTION CATEGORIES
Data transferred to or
Data transferred from
from peripheral device
processor to memory
by transferring
or from memory to
between the processor
processor Processor Processor and an I/O module
memory I/O
Data
An instruction Control The processor may
processing perform some
may specify that the
sequence of execution arithmetic or logic
be altered operation on data
Figure 3.5 Illustrates a partial program execution, showing the relevant portions of memory and
processor registers.
Execution resumes, when the
interrupt processing is
completed.
Does not have to contain any
special code to accommodate
interrupt; the PROCESSOR and
the OPERATING SYSTEM are
responsible for suspending the
user program and then
resuming it at the same point.
Processor
Based on the flow of control in Figures 3.7a and 3.7b
All Shaded Green = User Program Code Segments
All Shaded Gray = I/O Program Code Segments
Note that this figure shows the case >> Interrupts are NOT used.
Processor must wait while an I/O operation is performed.
The above figure shoes a revised instruction cycle state diagram that includes interrupt cycle processing.
Beginnin
g
I/O FUNCTION
I/O module can exchange data directly with the processor
Processor can read data from or write data to an I/O module
Processor identifies a specific device that is controlled by a particular I/O module
I/O instructions rather than memory referencing instructions
In some cases it is desirable to allow I/O exchanges to occur directly with memory
The processor grants to an I/O module the authority to read from
or write to memory so that the I/O memory transfer can occur without tying up
the processor
The I/O module issues read or write commands to memory relieving
the processor of responsibility for the exchange
This operation is known as direct memory access (DMA)
Thank
You!
