Chapter 3

Digital Transmission

4.1 Prepared By Mr. Arshad Ahmad

 Objectives

 Understand and differentiate between the signal elements and the

data elements.
 Learn various line coding schemes and to apply them under given
conditions.
 Study various transmission modes with their advantages and
disadvantages.

1.2
4-1 DIGITAL-TO-DIGITAL CONVERSION

In this section, we see how we can represent digital

data by using digital signals. The conversion involves
three techniques: line coding, block coding, and
scrambling. Line coding is always needed; block
coding and scrambling may or may not be needed.

Topics discussed in this section:

 Line Coding
 Line Coding Schemes
 Block Coding

4.3
 Line Coding

 Converting a string of 1’s and 0’s

(digital data) into a sequence of signals
that denote the 1’s and 0’s.
 For example a high voltage level (+V)
could represent a “1” and a low voltage
level (0 or -V) could represent a “0”.

4.4
 Figure 4.1 Line coding and decoding

4.5
 Figure 4.4 Line coding schemes

4.6
 Unipolar
 All signal levels are on one side of the time
axis - either above or below
 NRZ - Non Return to Zero scheme is an
example of this code. The signal level does
not return to zero during a symbol
transmission.
 Scheme is prone to baseline wandering and
DC components. It has no synchronization or
any error detection. It is simple but costly in
power consumption.

4.7
 Figure 4.5 Unipolar NRZ scheme

4.8
 Polar - NRZ
 The voltages are on both sides of the time
axis.
 Polar NRZ scheme can be implemented with
two voltages. E.g. +V for 1 and -V for 0.
 There are two versions:
 NZR - Level (NRZ-L) - positive voltage for one
symbol and negative for the other
 NRZ - Inversion (NRZ-I) - the change or lack of
change in polarity determines the value of a
symbol. E.g. a “1” symbol inverts the polarity a “0”
does not.
4.9
 Figure 4.6 Polar NRZ-L and NRZ-I schemes

4.10
 Note

In NRZ-L the level of the voltage

determines the value of the bit.
In NRZ-I the inversion
or the lack of inversion
determines the value of the bit.

4.11
 Polar - RZ
 The Return to Zero (RZ) scheme uses three
voltage values. +, 0, -.
 Each symbol has a transition in the middle.
Either from high to zero or from low to zero.
 This scheme has more signal transitions (two
per symbol) and therefore requires a wider
bandwidth.
 No DC components or baseline wandering.
 Self synchronization - transition indicates
symbol value.
 More complex as it uses three voltage level.
It has no error detection capability.
4.12
 Figure 4.7 Polar RZ scheme

4.13
 Polar - Biphase: Manchester and
Differential Manchester
 Manchester coding consists of combining the
NRZ-L and RZ schemes.
 Every symbol has a level transition in the middle:
from high to low or low to high. Uses only two
voltage levels.
 Differential Manchester coding consists of
combining the NRZ-I and RZ schemes.
 Every symbol has a level transition in the middle.
But the level at the beginning of the symbol is
determined by the symbol value. One symbol
causes a level change the other does not.

4.14
 Figure 4.8 Polar biphase: Manchester and differential Manchester schemes

4.15
 Note

In Manchester and differential

Manchester encoding, the transition
at the middle of the bit is used for
synchronization.

4.16
 Bipolar - AMI and Pseudoternary
 Code uses 3 voltage levels: - +, 0, -, to
represent the symbols (note not transitions to
zero as in RZ).
 Voltage level for one symbol is at “0” and the
other alternates between + & -.
 Bipolar Alternate Mark Inversion (AMI) - the
“0” symbol is represented by zero voltage and
the “1” symbol alternates between +V and -
V.
 Pseudoternary is the reverse of AMI.

4.17
 Figure 4.9 Bipolar schemes: AMI and pseudoternary

4.18
 Multilevel Schemes
 In these schemes we increase the number of
data bits per symbol thereby increasing the
bit rate.
 Since we are dealing with binary data we only
have 2 types of data element a 1 or a 0.
 We can combine the 2 data elements into a
pattern of “m” elements to create “2m”
symbols.
 If we have L signal levels, we can use “n”
signal elements to create Ln signal elements.

4.19
 Figure 4.10 Multilevel: 2B1Q scheme

4.20
 Multitransition Coding
 Because of synchronization requirements we force
transitions. This can result in very high bandwidth
requirements -> more transitions than are bits (e.g.
mid bit transition with inversion).
 Codes can be created that are differential at the bit
level forcing transitions at bit boundaries. This results
in a bandwidth requirement that is equivalent to the
bit rate.
 In some instances, the bandwidth requirement may
even be lower, due to repetitive patterns resulting in
a periodic signal.

4.21
 Figure 4.13 Multitransition: MLT-3 scheme

4.22
 Block Coding
 For a code to be capable of error detection, we need
to add redundancy, i.e., extra bits to the data bits.
 Synchronization also requires redundancy -
transitions are important in the signal flow and must
occur frequently.
 Block coding is done in three steps: division,
substitution and combination.
 It is distinguished from multilevel coding by use of
the slash - xB/yB.
 The resulting bit stream prevents certain bit
combinations that when used with line encoding
would result in DC components or poor sync. quality.

4.23
 Note

Block coding is normally referred to as

mB/nB coding;
it replaces each m-bit group with an
n-bit group.

4.24
 Figure 4.14 Block coding concept

4.25
 Figure 4.15 Using block coding 4B/5B with NRZ-I line coding scheme

4.26
 4-2 ANALOG-TO-DIGITAL CONVERSION

A digital signal is superior to an analog signal because

it is more robust to noise and can easily be recovered,
corrected and amplified. For this reason, the tendency
today is to change an analog signal to digital data. In
this section we describe two techniques, pulse code
modulation and delta modulation.

Topics discussed in this section:

 Pulse Code Modulation (PCM)

4.27
 PCM
 PCM consists of three steps to digitize an
analog signal:
1. Sampling
2. Quantization
3. Binary encoding
 Before we sample, we have to filter the
signal to limit the maximum frequency of
the signal as it affects the sampling rate.
 Filtering should ensure that we do not
distort the signal, ie remove high frequency
components that affect the signal shape.

4.28
 Figure 4.21 Components of PCM encoder

4.29
 Sampling
 Analog signal is sampled every TS secs.
 Ts is referred to as the sampling interval.
 fs = 1/Ts is called the sampling rate or
sampling frequency.
 There are 3 sampling methods:
 Ideal - an impulse at each sampling instant
 Natural - a pulse of short width with varying
amplitude
 Flattop - sample and hold, like natural but with
single amplitude value
 The process is referred to as pulse amplitude
modulation PAM and the outcome is a signal
with analog (non integer) values
4.30
 Figure 4.22 Three different sampling methods for PCM

4.31
 Quantization
 Sampling results in a series of pulses of
varying amplitude values ranging between
two limits: a min and a max.
 The amplitude values are infinite between the
two limits.
 We need to map the infinite amplitude values
onto a finite set of known values.
 This is achieved by dividing the distance
between min and max into L zones, each of
height 
 = (max - min)/L
4.32
 Figure 4.26 Quantization and encoding of a sampled signal

4.33
 PCM Decoder
 To recover an analog signal from a digitized
signal we follow the following steps:
 We use a hold circuit that holds the amplitude
value of a pulse till the next pulse arrives.
 We pass this signal through a low pass filter with
a cutoff frequency that is equal to the highest
frequency in the pre-sampled signal.
 The higher the value of L, the less distorted a
signal is recovered.

4.34
4-3 TRANSMISSION MODES

The transmission of binary data across a link can be

accomplished in either parallel or serial mode. In
parallel mode, multiple bits are sent with each clock
tick. In serial mode, 1 bit is sent with each clock tick.
While there is only one way to send parallel data, there
are three subclasses of serial transmission:
asynchronous, synchronous, and isochronous.

Topics discussed in this section:

 Parallel Transmission
 Serial Transmission

4.35
 Figure 4.31 Data transmission and modes

4.36
 Figure 4.32 Parallel transmission

4.37
 Figure 4.33 Serial transmission

4.38
 Note

In asynchronous transmission, we send

1 start bit (0) at the beginning and 1 or
more stop bits (1s) at the end of each
byte. There may be a gap between
each byte.

4.39
 Note

Asynchronous here means

“asynchronous at the byte level,”
but the bits are still synchronized;
their durations are the same.

4.40
 Figure 4.34 Asynchronous transmission

4.41
 Note

In synchronous transmission, we send

bits one after another without start or
stop bits or gaps. It is the responsibility
of the receiver to group the bits. The bits
are usually sent as bytes and many
bytes are grouped in a frame. A frame is
identified with a start and an end byte.

4.42
 Figure 4.35 Synchronous transmission

4.43
 Isochronous

 In isochronous transmission we cannot

have uneven gaps between frames.
 Transmission of bits is fixed with equal
gaps.

4.44