8051

microcontrolle
r
SOME EMBEDDED
PRODUCTS USING
MICROCONTROLL
ERS
8051 TRAINER KITS
8051 PIN
DIAGRAM
DIFFERENCE BETWEEN A MICROPROCESSOR AND A
MICROCONTROLLER
Block diagram of 8051
microcontroller
Comparison between 8051 family members
RAM and ROM allocation in the 8051
 • Find the ROM memory address of each of
the following 8051 chips
EXERCISE: 1. DS89C420 with 16KB
2. DS5000-32 with 32 KB
 Assembling
and running
8051 program
ASCII codes
(American
standard for
information
interchange)
8051 program memory
Placing the code in ROM
General
purpose RAM
and Special
Function
Registers
(SFR).
General purpose
8-bit registers of
8051
 MOV A, #23H
MOV R0, #0FFH

MOV R1, R2

MOV MOV A, R6

instruction MOV B, #F1H

MOV R3, #23

MOV R4, #823H

MOV R6, #1A3H

 ADD ADD A, R5

ADD ADD A, #2AH

ADD
INSTRUCTION
ADD ADD A, 30H

ADD ADD A, @R1

EXERCISE
• WRITE A PROGRAM TO ADD 45H, 32H, 52H, A1H
AND STORE RESULT IN R7.
8051 SFR
 Program Status Word Register
CY AC RS1 RS0 OV P

D7 D6 D5 D4 D3 D2 D1 D0

CY flag : if there is carry out from the D7 bit, it is set to 1

Auxiliary carry : if there is carry out of D3 to D4 during add/sub operation, bit is set to 1

Register bank selector bit 1 :

Register bank selector bit 0 :

Overflow flag : whenever the result of signed number operation is too large causing high order bit
to overflow into the sign bit.

Parity flag : reflects the number of 1’s in the accumulator, if the register has odd number of 1, then
bit is set to 1.
Register Bank Selection
 Subtract instruction
• Subtract with borrow (subb)
• This subtract the source byte and the carry flag from the accumulator
and puts the result back in the accumulator. The steps for subtraction
are as follows:
1. Take 2’s compliment of source byte
2. Add to register A
3. Invert the carry
• SUBB A,source byte
• CY = 0 for +ve n zero result, CY= 1 for negative result.
 Checking the status of the PSW register
1. Add 9CH and 64H and check the status of PSW
2. Subtract 45H from 55H and check the status of PSW
Instructions that
affect flag bits
 Program Counter (PC)
PC : 16 bits wide
• Points to address of the next instruction to be executed.
• As the CPU fetches the opcode from the program ROM , the
PC is incremented to point to the next instruction.
• The 8051 can access addresses from 0000H to FFFFH, a total
of 64K bytes of code.
 What happens when 8051 is powered up?
• What address does the CPU wake up upon applying power to it?
Each micro processor is different, for 8051 family it wakes up at
rom location 0000 when it is powered up. (after booting up)
ie. The PC register has the value of 0000 in it.
For this reason in the 8051 system, the first opcode must be burned in
the memory location 0000H of program ROM.
Placing the program code in ROM
 Assembler directives
• ORG : This directive is used to indicate the beginning of the address.
Number coming after org can be hex or decimal,
• END : Indicates to assembler the end of a source file, any source code
after the end directive will be ignored by the assembler.
Register Banks and their RAM address
 Register Bank selection
• SETB psw.4
• SETB psw.3
Load 05h,06h,07h in register bank 2 and
register bank3
 8051 stacks
• The stack is a section of RAM used by the CPU to store information
temporarily. This information could be data or an address. The CPU
needs this storage area since there are only a limited number of
registers.
• The special function register inside the CPU used to access the stack is
called the (SP) stack pointer register. (8 bits)
• When the 8051 is powered up, the SP register has 07 in it. This means
RAM location 08 is the first location used for the stack by the 8051.
• By default, location 08 to 1F can be used as stack location. i.e register
bank 1,2 and 3.
 PUSH & POP
• Storing of CPU register (content of register) onto the stack is called
PUSH
• Retrieving the contents of the stack back into the CPU register is
called a POP.
 Stack pointer
• The SP points to the last used location of the stack.
• When we push data onto the stack, the SP is incremented by 1.
• Increment and PUSH
• When we POP a data from the stack back into the given register, the
top byte of the stack is copied to the register specified by the
instruction and the SP is decremented once
examples
Examples:
examples
 Stack Pointer
• If we need more than 24 bytes of space for stack, we can use the RAM
location 30-7F using the instruction, MOV SP,#30H, the stack location
will start from RAM address 31H.
Exercise:

 Store the numbers 01H, 02H, 03H, 04H, 05H, 06H, 07H and 08H in RAM location 41 to
47
Conditional
jump
instructions
Conditional Jump instructions
 Jump and loop instructions

 DJNZ byte, target

 Decrement and jump if not zero, if zero flag is not set.
 Eg. DJNZ R3,label : this instruction will decrement R3 till R3 is zero, then it will stop
looping n will proceed to the next instruction.

 JB bit,target
 Jump if bit is set, this instruction is used to monitor a given bit and jump to target address
if the given bit is high or low.
 Eg. JB ACC.0,label
 Eg. JNB ACC.0,label
 Unconditional Jump instructions

 LJMP 16-bit address (3-byte instruction)

 SJMP 8-bit address (2-byte instruction)
 Transfer control unconditionally to the new address.
LJMP and SJMP
 Jump Address calculation
The target address is relative to the PC, the
second byte is added to the PC of the
instruction immediately below the jump.

For the instruction in 0015 80FE , here 0017 +

? = 0015 .. And the answer is FE
 example

Exercise: Write a program to add the first 30 natural numbers

 MACHINE CYCLE FOR 8051
• CPU takes a certain number of clock cycles to execute an
instruction. These clock cycles are referred to as machine cycles.
• The length of the machine cycle depends on the frequency of the
crystal oscillator connected to the 8085 system.
• The frequency of the oscillator can vary from 4 MHz to 30MHz.
• One machine cycle lasts 12 oscillator periods.
 Time delay calculation

12 CLOCK PERIODS EQUALS 1 MACHINE CYCLE

• Time period of the oscillator = 1/F

• If F = 4MHz, Tosc = 1/4MHz = .25µs
• Time taken by 1 machine cycle Tmachinecycle= 12 x .25 = 3µs
EXERCISE
8051 Machine cycles
Calculate the time delay caused by the following subroutine if the
crystal frequency is 11.0592 MHz
8051 ports
Write a test program to toggle all ports of the 8051
P0,P1,P2,P3 every ½ a second. Assume a crystal frequency of
11.0592 MHz
 8051 I/O port and interfacing
• IC FAN-OUT: when connecting IC chips together, we need to find out
how many input pins can be driven by a single output pin.
Discussion of the IC fan-out will be able to resolve this issue.

• In order to understand IC fan-out we must first understand the port

structure of 8051. This study is critical in order to prevent any
damage to the IC while we interface the IC with an external device.

• IC fan out must be addressed for both logic 0 and logic 1 outputs.
IC FAN-OUT FOR LOGIC LOW AND LOGIC HIGH

• Fan-out(of low) = IOL/IIL

• Fan-out(of high) = IOH/IIH

Current
sinking and
sourcing
Characteristics of STD TTL and LSTTL
8051 PORT STRUCTURE
HOW TO CONFIGURE THE INPUT PORT?
SEVERAL
TECHNIQUES TO
AVOID DAMAGING
THE 8051 PORTS
(AVOID DAMAGE TO
M1)
INSTRUCTIONS READING THE STATUS OF THE INPUT PORT
PROGRAMMING THE 8051 TIMERS

• 8051 has two 16 bit timers/counters.

• They can be used to generate time delays or as counters to count
events happening outside of the microcontroller.
• Each 16 bit register is accessed as two separate registers of low byte
and high byte.
• Crystals attached to 8051 is the source of the clock for the timer.
Usually 11.0592 MHz.
TIMER 0 REGISTER

• 16 bit register of Timer 0 is accessed

as low byte and high byte. TL0 as low
byte register and TH0 as high byte
register.
• Eg: MOV TL0, #4FH
• MOV R5, TH0
• 16 bit Timer1 can be accessed as TL1
and TH1
 TMOD REGISTER (TIMER MODE REGISTER)

• TMOD register is used to set the various timer operation modes.

• TMOD is an 8-bit register in which lower 4 bits are set aside for timer0 and upper 4 bits
are set aside for timer1.
• Lower 2 bits are used to set timer mode and upper 2 bits to specify the operation
TMOD REGISTER
 TMOD REGISTER

• M1, M0 selects the timer mode,

• C/T bit is used to decide whether the timer is used as delay generator or event counter ,
if C/T = 0, it is used as timer for delay generation. Clock source for the time delay is
crystal frequency of 8051.
• Gate bit is used for starting/stopping of 8051 timer, which can be done either by
hardware or software
 GATE BIT AND ITS PURPOSE

• The timer of 8051 have both hardware and software controls to start and stop. For
software gate bit has to be 0. for hardware gate bit has to be 1.
• If GATE=0, SETB TR1(to start timer) , CLR TR1(to stop timer) for timer 1
• SETB TR0, CLR TR0 for timer 0
TIMER
CONTROL
REGISTER
(TCON)
 MODE 2 PROGRAMMING

• It is an 8-bit timer therefore it allows only values of 00 to FFH to be loaded into timers register TH.
• After the TH is loaded with the 8-bit value, the 8051 gives a copy of it to TL. Then the timer must be
started, which is done by instruction SETB TR0 for timer 0 and SETB TR1 for timer1. (just like mode 1)
• After the timer is started it starts to count up by incrementing the TL register. It counts up until it
reaches its limit of FFH. When it rolls over from FFH to 00, it sets the TF (timer flag). If we are using
the timer 0, TF0 goes high, if we are using timer1, TF1 is raised
• When the TL register rolls from FFH to 00H and TF is set to 1, TL is reloaded automatically with the
original value kept by the TH register. To repeat the process, we must simply clear TF and let it go
without any need by the programmer to reload the original value. Mode2 is an auto reload.
 STEPS TO PROGRAM IN MODE 2

To generate a time delay using timer mode 2.

1. Load the TMOD value register indicating which timer (timer 0 or timer 1) is to be used, and select the
timer mode (mode 2)
2. Load the TH registers with the initial count value.
3. Start the timer.
4. Keep monitoring the timer flag (TF) with the JNB TFx, target instruction to see whether it is raised. Get
out of the loop when TF goes high.
5. Clear the TF flag
6. Go back to step 4 since mode 2 is auto reload
 COUNTER PROGRAMMING

• 8051 timers can be used as counters to count events happening outside of the 8051.
• When it is used as a counter, it is a pulse outside of the 8051 that increments the TL and
TH registers.
• In counter mode, the TMOD and TH,TL registers are the same as for the timer. The
timers modes are the same as well.
• C/T bit in the TMOD register decides the source of the clock for the timer. When C/T=1,
the timer is used as a counter and gets its pulses from outside of 8051.
 C/T BIT IN TMOD REGISTER

• C/T bit in the TMOD register decides the source of the clock for the timer.
If C/T is 0, the timer gets pulses from the crystal. When C/T = 1, the timer
is used as a counter and gets pulses from outside the 8051.
• When C/T= 1, the counter counts up as pulses are fed from pins 14 and 15.
these pins are called T0(timer 0 input) and T1(timer 1 input). These two
pins belong to port 3.
The timer of 8051 have both
hardware and software controls
to start and stop. For software
gate bit has to be 0. for hardware
gate bit has to be 1.
TF – timer flag, will indicate
whether the time set for the
counter is completed or not.
TF = 1 will mean that the
maximum time set for the
counter has elapsed and the
counter should stop the
count.
 8051 INTERRUPTS

1. A single microcontroller can serve several devices either by using Interrupts or polling.
2. In the interrupt method, whenever any device needs its service, the device notifies the
microcontroller by sending it an interrupt signal. upon receiving the signal the microcontroller
interrupts whatever it is doing and serves the device.
3. The program associated with the interrupt is called the interrupt service routine(ISR) or
interrupt handler.
 POLLING METHOD

1. In polling the microcontroller continuously monitor the status of a given device and when the
status condition is met, it performs the service. After that it moves on to monitor the next
device until each one is serviced.
2. Polling can monitor the status of several devices and serve each of them as certain conditions
are met, it is not an efficient use of the microcontroller.
3. Polling method cannot assign priority since it checks all devices in a round robin fashion. And
it cannot ignore a request for service.
4. Polling method is wasteful of the microcontroller’s time by polling device that do not need the
microcontroller service.
 INTERRUPT SERVICE ROUTINE

• For every interrupt there is an ISR or Interrupt handler.

• When an interrupt is invoked the microcontroller runs the ISR.
• For every interrupt, there is a fixed location the memory that holds the address of its ISR.
• The group of memory locations set aside to hold the addresses of the ISRs is called the interrupt
vector table.
 INTERRUPT VECTOR TABLE FOR 8051

INTERRUPT ROM PIN FLAG CLEARING

LOCATION
Reset 0000-0002 9 Auto
External hardware interrupt 0(INT0) 0003-000A P3.2 (12) Auto
Timer 0 interrupt (TF0) 000B-0012 Auto
External hardware interrupt (INT1) 0013-001A P3.3(13) Auto
Timer 1 interrupt (TF1) 001B-0022 Auto
Serial communication interrupt (R1 and T1) 0023-002F Programmer clears it

Note: A limited no. of bytes is set aside for each interrupt Service routine, if the ISR is short enough to fit in
the memory space allocated to it, it is placed in the vector table, otherwise an LJMP instruction is placed in the
table to point to the location of the ISR.
 6 INTERRUPTS OF 8051

1. One Reset: When the reset pin is activated, the 8051 jumps to location 0000 (power up reset)
2. Two Timer interrupts (timer 0 n timer 1 interrupts)
3. Two External hardware interrupts (INT0 and INT1 or EX1 and EX2)
4. One Serial interrupt for both receive and transmit.
 STEPS IN EXECUTING AN INTERRUPT

• Upon activation of an interrupt, the microcontroller goes through the following steps:

1. It finishes the instruction it is executing and saves the address of the next instruction (PC) on the stack.
2. It also saves the current status of all the interrupts internally (ie. Not on the stack)
3. It jumps to a fix location in memory called the interrupt vector table that holds the address of the
interrupt service routine.
4. The microcontroller gets the address of the ISR from the IVT and jumps to it. It starts to execute the
ISR until it reaches the last line of the ISR which is RET1.
5. Upon executing the RET1 instruction, the microcontroller returns to the place where it was interrupted.
(it gets the PC address from the stack)
 ENABLING AND DISABLING THE INTERRUPT

• Upon reset all interrupts are disabled, meaning that none will be responded to by the
microcontroller if they are activated.
• The interrupts must be enabled by the software in order for the microcontroller to respond to
them.
• The register interrupt enable (IE) is responsible for enabling and disabling the interrupts. IE is a
bit-addressable register.
 INTERRUPT ENABLE REGISTER

EA ET2 ES ET1 EX1 ET0 EX0

EA : IE7: disables all interrupts. If EA = 0, no interrupt is acknowledged. If EA = 1, each

interrupt is individually enabled or disabled by setting or clearing its enable bits.
ET2 : IE5 : enables or disables timer 2 overflow interrupt.(8052)
ES : IE4 : enables or disables serial port interrupt.
ET1 : IE3 : enables or disables timer 1 overflow interrupt.
EX1 : IE2 : enables or disables external interrupt 1.
ETO : IE1 : enables or disables timer 0 overflow interrupt 0.
EX0 : IE0 : enables or disables external interrupt 0.
• Assuming a crystal frequency of 20 MHz, write an ALP to generate a square wave of
………………… KHz frequency at one of bits of port 1. show calculations