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Digital Logic and Design: Dr. M. Najam Ul Islam PHD Electrical, Engineering

The document discusses digital logic gates and their uses. It states that NAND and NOR gates are universal gates that can be used to implement all basic logic functions. It provides examples of how to implement inverters, AND, OR, and NOT operations using only NAND gates or only NOR gates in multiple levels. Boolean functions in Sum of Products or Product of Sums form can be implemented in two levels using NAND or NOR gates respectively. Examples are given to show two-level implementations of logic functions in SOP or POS form.

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80 views26 pages

Digital Logic and Design: Dr. M. Najam Ul Islam PHD Electrical, Engineering

The document discusses digital logic gates and their uses. It states that NAND and NOR gates are universal gates that can be used to implement all basic logic functions. It provides examples of how to implement inverters, AND, OR, and NOT operations using only NAND gates or only NOR gates in multiple levels. Boolean functions in Sum of Products or Product of Sums form can be implemented in two levels using NAND or NOR gates respectively. Examples are given to show two-level implementations of logic functions in SOP or POS form.

Uploaded by

S.M.Abbas Zadi.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Digital Logic and Design

Dr. M. Najam ul Islam

PhD Electrical, Engineering

Logic Gates

Universal Gates
NAND and NOR are universal gates.

The small circle (bubble) at the output of the graphic


symbol of a NOT gate is formally called a negation indicator and designates the logical complement.

NAND Gate
Complement of AND

NOR Gate
Complement of OR

Universal Gates
NAND and NOR gates are economical, easy to
fabricate and used as the basic gates used in all IC digital logic families.

AND is implemented as an NAND gate followed by


inverter (Not the other way Round)

OR is implemented as a NOR gate followed by


inverter (Not the other way Round)

Universal Gates
To prove that any Boolean function can be
implemented using only NAND gates, it can be shown that the AND, OR, and NOT operations can be performed using only these gates.

Inverter using only NAND Gate


First Method

Inverter Using only NAND Gate


Second method

AND Using only NAND Gates


Using NAND as AND

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OR Using only NAND Gates


Using NAND implementing equivalent OR

Thus, the NAND gate is a universal gate since it can


implement the AND, OR and NOT functions.
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NOT, AND, OR Using NOR


To prove that any Boolean function can be
implemented using only NOR gates, it can be shown that the AND, OR, and NOT operations can be performed using only these gates.

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Inverter Using only NOR Gate


First Method:

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Inverter Using only NOR Gate


Second Method

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OR Using only NOR Gates

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AND Using only NOR Gates

Thus, the NOR gate is a universal gate since it can


implement the AND, OR and NOT functions.
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Equivalent Gates (1)


Some important cases of gate equivalence A NAND gate is equivalent to an inverted-input OR
gate.

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Equivalent Gates (2)

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Equivalent Gates (3)

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Two-Level Implementations
Boolean functions in either SOP or POS forms can
be implemented using 2-Level implementations.

For SOP forms AND gates will be in the first level


and a single OR gate will be in the second level.

For POS forms OR gates will be in the first level


and a single AND gate will be in the second level.

Note that using inverters to complement input


variables is not counted as a level.
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Two-Level Implementations
SOP forms can be implemented using only NAND
gates, while POS forms can be implemented using only NOR gates. Example 1: Implement the following SOP function F = XZ + YZ + XYZ Being an SOP expression, it is implemented in 2-levels as
shown in the figure.

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Example 1
Substitute and then remove the redundant gates Final result should have only two-levels.

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Example 1

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Example 2
Implement the following POS function
F = (X+Z) (Y+Z) (X+Y+Z)

It should be implemented in 2-levels

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Example 2
Do it your self !

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Answer!!!

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