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Microprocessors, Microcontrollers and Assembly Language

The document discusses different types of branch instructions in assembly language. It provides an example of using CMP and JNL instructions to check if a value in AX is less than 0 and conditionally negate the value. It also gives a example of using CMP, JNBE, and JMP to display the character with the earlier value from either AL or BL registers. Branch instructions allow changing the flow of execution based on conditional comparisons.

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0% found this document useful (0 votes)
28 views

Microprocessors, Microcontrollers and Assembly Language

The document discusses different types of branch instructions in assembly language. It provides an example of using CMP and JNL instructions to check if a value in AX is less than 0 and conditionally negate the value. It also gives a example of using CMP, JNBE, and JMP to display the character with the earlier value from either AL or BL registers. Branch instructions allow changing the flow of execution based on conditional comparisons.

Uploaded by

2003085
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 125

Team

ByteBlasters

Presentation Slide Prepared By 2003081 to 2003090

1
Sheikh Ismail
Hossain

2003081
2
Overview
· JUMP Instructions

· Comparison Instructions

· Loop Instructions

3
Before going through Logic and Compare instructions we must
know about JUMP instructions. So first, we are going to discuss
on JUMP instructions:

Jump Instructions are used for changing the flow of execution


of instructions in the processor. If we want to jump to any
instruction between the code, then these instructions can
achieve this. There are two types of Jump instructions:
• 1. Unconditional Jump Instructions
• 2. Conditional Jump Instructions
1. Unconditional Jump Instructions

These instructions are used to jump on a particular location unconditionally.

Syntax:
JMP Label

Let’s describe this with 2 example codes. 1 st one is in C++, our most familiar language and the 2 nd
one is in Assembly 8086 so that we can easily understand the unconditional jump instructions with
comparison.

5
Code in C++ Code in Assembly 8086

Output:
Output:
Comparison between the given C++ and
Assembly 8086 code

In this C++ code, we can see that as the condition (i>81) is


true, the ‘lb1’ is skipped and goes to ‘lb2’ and prints “others”.

In the output, we can see that ‘jmp2 lb2’ sends the pointer to ‘lb2’ skipping lea
dx,s. Then lb1 sends the pointer to tm label which terminates the program. So
though we write a code snippet for printing “ok”(s), it’s not printing.

7
2. Conditional Jumps
Comparison
Instructions (CMP)

For a conditional jump, first, we need to compare the data according to a


condition. If the condition is true, jump will be occurred, else normal top to
bottom flow will be continued.

In these types of instructions, the processor must check for the particular
condition. If it is true, then only the jump takes place else the normal flow
in the execution of the statements is maintained.

The ALU operations set flags in the status word (Flag register). The
conditional jump statements test the flag and jump is the flag is set.

8
CMP and JUMP Syntax and Jump Operation Chart

Syntax:
• i. CMP register, register
• ii. CMP register, constant
• iii. CMP register, [memory_location]
* Comparison calc = Destination -
Source

* Destination value doesn’t change for


this operation.

Syntax: JUMP_OPERATION Label

Note: Unsinged jumps should be used while comparing the extended ASCII character codes 80h to FFh (128 to 255).
9
Example code using CMP and Conditional Jump

10
CMP and Jump instructions are highly related to
Flag bits calculation.

Figure-1 11
We need these Jump instructions to find flag bits using
assembly 8086 language:

Note: There is no jump instruction for AUXILIARY FLAG bits. 12


Implementing Figure-1 using assembly 8086 code:

Both are same

Figure-1

13
Taking user input and finding the flag bits:

Output:

14
LOOP Instructions

Loops are used to do the same things for a number of times.

The number is specified in the CX register. The CX register is automatically


decremented by one, each time after execution of LOOP instruction. Until CX = 0,
execution will jump to a destination specified by a label in the instruction.

The destination address for the jump must be in the range of – 128 bytes to + 127
bytes from the address of the instruction after the iteration control instruction. For
LOOPE/LOOPZ and LOOPNE/LOOPNZ instructions there is one more condition for
exit from loop, which is given below. If the loop is not taken, execution simply goes
on to the next instruction after the iteration control instruction.

15
Syntax of single LOOP:

Syntax:

MOV CX,N ;N = Number of times Note: If N=0, there will be occured an


infinity loop. To avoid this, we should
Label: use JCXZ (Jump if CX is equal to Zero).

;necessary code snippet ;CX=N all the lines here MOV CX,0
JCXZ terminate_label
LOOP Label ; In this line CX decrements by 1.

16
Example code for LOOP:
Output:

17
Nested LOOP
Nested Loop: Nested loop means loop within loop.

Reason for using nested loop:

Reduce complexity

Maintained code

18
Syntax of Nested LOOP:
outer_loop:

; outer loop code

inner_loop:

; inner loop code

LOOP inner_loop

; code after inner loop

LOOP outer_loop
19
Example code on Nested LOOP:
Write a code to print: ***
***
***

Output:

20
Abu Shahadat
Rabby
2003082

21
General Purpose
Registers
in Microcontroller

22
What is general purpose register?

In AVR microcontrollers, general-purpose registers are temporary


storage locations within the CPU used for arithmetic, logic
operations, and data manipulation during program execution.

23
All the general purpose registers are 8 bit registers

They are ranges from D0 to D7

D0 is the LSB and D7 is the MSB

MSB LSB

24
There are 32 general purpose registers in AVR

They are named as R0 to R31

They are located at the lowest position of memory


address

They are the same as the accumulator in other


microprocessor

25
AVR General Purpose Registers and ALU 26
Two instructions of General Purpose Registers:

LDI

ADD

27
LDI Instruction: LDI Rd, k

LDI
Rd k

Destination Source value


GPR

LDI instruction copy 8 bit data to general purpose registers

Rd is any of the upper 16 GRP (R16 - R32)

K is a 8 bit value that can be 0-255 in decimal or 00-FF in Hex


28
When programming the GPRs of the AVR with an immediate value:

To present a number in Hex, we put a dollar sign ($) or 0x in front


of it. Otherwise it is regarded as decimal

If values of 0 to F are moved into GPRs, the rest of the bits are
assumed to to all zeros

Moving a value larger than 255 (FF in Hex) into the GPRs
will cause error

29
ADD Instruction: Add Rd, Rr

Add
Rd Rr

Destination Source
Register Register

The Add instruction add the value of Rr to Rd and then store


it to Rd
Value of Rd
+
Value of Rr

Rd 30
31
32
33
34
35
36
38
39
40
41
42
43
44
Ishtiaque ahmed SIR
Saikot-86

45
Branch instruction
Branch is like if else condition in high level language.

Example 1 :

Replace.the number in AX by its absolute value

Code :

cmp ax,0 ;ax < 0?

jnl end_if ;no exit

neg ax; yes,change sign

46
Explanation :
The condition AX < 0 is expressed by CMP AX,O. If AX Is not less than 0,
there is nothing to do, so we use a JNL (jump if not less) to jump around
the NEG AX. !f condition AX < 0 is true, the program goes on to execute
NEG AX.

Example 2 :
Suppose AL and BL contain extended ASCII characters.
Display the one that comes first in the character sequence.

47
Code :
Pseducode :
IF AL <o BL
TH:ON
Ji:.>play the character in AL
ELSE
display the charac~er in BL
END - IF

Emu code :
mov ah,2
;if AL <= BL
cmp al,bl
48
jnbe else_
;then

mov dl,al

jmp display

else_

mov dl,bl

display:

int 21h

end_if

49
Explanation :
The condition AL <= BL is expressed by CMP AL,BL. If It's false, the program
jumps around the true-branch statements to ELSE_. We use the unsigned
jump JNBE (jump If not below or equal), because we're· comparing
extended characters.
U AL <= BL ls true, the true-branch statements are done. Note that
JMP DISf>LAY is needed to skip the false branch. This ls different from the
high-level language IF-THEN-ELSE, in which the fal5e~branch statements are
automatically skipped if the true-branch statement$ are done. '

50
Loop The LOOP instruction can be used to implement a 1'0~ loop. It
Instruction has the form:

LOOP destination_label

The counter for the loop is the register CX which is initialized


to loop_count.

Execution of the LOOP Instruction causes CX to be


decremented automatically and if CX Is not 0, control transfers
to destination_label.If CX is 0,the next instruction after LOOP
is done.

Example :

Write a count-controlled loop to display a row of 80 stars.

51
Code :

mov cx,80 ;number of stars to display

mov ah,2 ;dispaly character function

mov dl,'*';;number of stars to display

top:

int 21h

loop top

52
Example :

Write some code to read characters until a blank


is read.

Code :

mov ah,1 ;prepare to read

repeat:

int 21h ;char in AL

cmp al,' ' ; a blank?

jne repeat ; no,keep going.

53
Explanation :
1. The assembly code sets up to read a character from standard input using DOS interrupt
21h.
2. It initializes the AH register with the value 1, indicating a request to read a character.
3. The code enters a loop labeled "repeat" using the `repeat:` statement.
4. Inside the loop, it uses interrupt 21h to read a character into the AL register.
5. It compares the value in AL with a space (' ') using the CMP instruction.
6. If the character is not a space, the code jumps back to the "repeat" label, continuing the loop
until a space character is encountered.

54
Time Delay
In creating time delay 2 factors should be noticed.

1 The crystal frequency :

The crystal frequency in the Intel 8086 microprocessor directly affects time delays in system
operations, with a higher frequency resulting in shorter instruction execution times. Adjusting
the crystal frequency dynamically influences the timing precision and overall responsiveness of
time-dependent processes in the 8086-based system.

2 Avr Design :

Avr can execute an instruction in one cycle using pipelining to overlap fetching and execution
instruction.

55
Pipelining
The idea of pipelining is to execute and fetch data by cpu at the same time.The
process of execution is split up and executed in parallel.The limitation of pipelining
is speed of execution is limited to slowest stage of pipelining.

Instruction cycle time for avr :

The certain amount of time for an execution is called machine cycle.As all
instructions are 1 or 2 bytes,it takes 1 or 2 machine cycle to complete an
execution.The length of a machine cycle depends on the frequency of avr system.

56
Branch penalty
For pipelining we need a queue where instructions are perfected and ready to
executed.When a branch is executed,the cpu starts to fetch code from new memory
locations and the codes in queue is discarded. This is branch penalty.

That’s why some instructions can take more than one machine cycle.They are
JMP,CALL,RET. The conditional branch instruction take 1 cycle if not jumped
else

They take more than one machine cycle.

57
Calculating time delay

58
59
60
61
2003088

62
Logic Shift and Rotation

Shift
Types of Shift ::
Logical Shift ::
1. Shift Left
2. Shift Right

Arithmetical Shift ::
3. Shift Arithmetical Left
4. Shift Arithmatical Right

63
Introduction

Shift operation move the bits in a pattern, changing


the bits. They can move bits to the left or to the
right. We can divide shift operation into two
categories:
1. Logical Shift
2. Arithmetic Shift

64
Logical Shift
A logical shift moves the bits within the cell one position to the right or to the left.

In a logical right shift, the least significant bit LSB is discarded and the most significant bit MSB is
assigned 0.

In a logical left shift, the LSB is assigned 0 and the MSB is discarded.

A shift instruction will have an operand that specifies how many times the one position shift is applied.

There are two kinds of Logical shift :

1. Shift Left
2. Shift Right

65
Shift Left
A shift left logical of one position moves each bit to the left by one. The low-order bit LSB is replaced
by a 0 bit and the high-order bit MSB move to CF (Carry Flag).

Shifting by two positions is the same performing a one-position shift two times. Shifting by 0 positions
leaves the pattern unchanged. Shifting an N-bit pattern left by N or more positions changes all the bits to 0.

The picture shows the operation performed on eight bits. The original pattern is 11010011. The
resulting pattern is 10100110.

1 1 0 1 0 0 1 1

1 1 0 1 0 0 1 1 0 0

66
Right Shift
A shift right logical of one position moves each bit to the right by one. The high-order bit MSB is
replaced by a 0 bit and the high-order bit LSB move to CF (Carry Flag).

Shifting by two positions is the same performing a one-position shift two times. Shifting by 0 positions
leaves the pattern unchanged. Shifting an N-bit pattern left by N or more positions changes all the bits to 0.

The picture shows the operation performed on eight bits. The original pattern is 11010011. The
resulting pattern is 01101001.

1 1 0 1 0 0 1 1

0 0 1 1 0 1 0 1 1 0 1 0 0 1 1 1

67
Arithmetic Shift
Arithmetic shift operations assume that the bit pattern is a signed integer two’s complement format.

Arithmetic right shift is used to divide integer by two(2), where arithmetic left shift is used to multiple
by two.

There are two kinds of arithmetic shift ::

1. Left Arithmetic Shift


2. Right Arithmetic Shift

68
Left Arithmetic Shift

A shift arithmetic left is the same as a logical left shift.

A shift arithmetic left of one position moves each bit to the left by one. The low-order bit LSB is
replaced by 0 bit and the high-order bit MSB move to CF.

A left arithmetic shift by N is equivalent to multiplying by 2^n. In 2’s complement positive or negative
a logical left shift, is equivalent to multiplication by two.

The picture shows the operation performed on eight bits. The original pattern is 11010011. The
resulting pattern is 10100110.
1 1 0 1 0 0 1 1

1 1 1 0 1 0 0 1 0 0

69
Right Arithmetic Shift

A shift arithmetic right is equivalent to integer division by two.

A shift arithmetic right of one position moves each bit to the left by one. The high-order bit MSB is
replaced by sign bit and the low-order bit LSB move to CF.

In 2’s complement positive or negative division by two is accomplished via an shift arithmetic right.

The picture shows the operation performed on eight bits. The original pattern is 00010111. The
resulting pattern is 00001011.

0 0 0 1 0 1 1 1

0 0 0 0 1 0 1 1

70
Types of Rotation
1. ROL Instruction
2. ROR Instruction
3. RCL Instruction
4. RCR Instruction

71
ROL Instruction
ROL shifts each bit to the left.

The highest bit is copied into both the carry flag into the lowest bit.

No bits are lost.

ROL is used for unsigned data.

72
ROR Instruction
ROR shifts each bit to the right.

The lowest bit is copied into both the carry flag into the highest bit.

No bits are lost.

ROR is used for unsigned data.

73
RCL Instruction
RCL shifts each bit to the left.

Copies the carry flag to the least significant bit.

Copies the most significant bit to the carry flag.

RCL is used for signed data.

74
RCR Instruction
RCR shifts each bit to the right.

Copies the carry flag to the most significant bit.

Copies the least significant bit to the carry flag.

RCR is used for signed data.

75
Rifat - 2003090

Starts from hereeee :’)

76
The AVR Data Memory

In AVR microcontrollers there are two kinds of Data Memory is composed of three parts.
memory space.
1. GPRs (general purpose registers)
1. Code Memory Space: Used to store 2. I/O memory
programs. 3. Internal data SRAM
2. Data Memory Space: Used to store data.

77
1.GPRs(General purpose registers) :
● The GPRs use 32 bytes of Data
memory Space.
● Always take the address location
$00 - $1F in the data memory space,
regardless the AVR chip number.

2. I/O memory(SFRs) :
● Dedicated to specific functions
such as status register, timers,
serial communication, I/O ports,
ADC, and so on.
● The function of each I/O memory is
fixed by the CPU designer because it
is used for control of the Figure : The Data Memory for AVRs with No
microcontroller of peripherals. Extended I/O Memory 78
● The AVR I/O memory is made of 8-bit registers.
● The number of locations in the data memory set aside for I/O memory depends on the pin
numbers and peripheral functions supported by that chip, although the number can vary
from chip to chip even among members of the same family.
● All of the AVRs have at least 64 bytes of I/O memory locations. This 64-byte section is
called standard I/O memory.
● In AVRs with more than 32 I/O pins (e.g., ATmega64, ATmega128, and ATmega256)
there is also an extended I/O memory, which contains the registers for controlling the
extra ports and the extra peripherals.
● In other microcontrollers the I/O registers are called SFRS (special function registers)
since each one is dedicated to a specific function.

In contrast to SFRS, the GPRS do not have any specific function and are used for storing
general data.

79
Figure : The data memory for the AVRs with Extended I/O memory
80
3. Internal data SRAM :
● Internal data SRAM is widely used for storing data and parameters by AVR programmers and
C compilers. Generally, this is called scratch pad.
● Each location of the SRAM can be accessed directly by its address.
● Each location is 8 bits wide and can be used to store any data we want as long as it is 8- bit.
● The size of SRAM can vary from chip to chip, even among members of the same family.

SRAM vs. EEPROM in AVR chips


● The AVR has an EEPROM memory that is used for storing data.
● EEPROM does not lose its data when power is off, whereas SRAM does.
● The EEPROM is used for storing data that should rarely be changed and should not be lost
when the power is off, whereas the SRAM is used for storing data and parameters that are
changed frequently.
● The three parts of the data memory (GPRS, SFRS, and the internal SRAM) are made of
SRAM. 81
● In AVR datasheets, EEPROM refers to the EEPROM's size, and SRAM is the internal SRAM size.
By adding the sizes of GPR, SFRS (I/O registers), and SRAMS we get the data memory size.

Data Memory = I/O Register + SRAM + General Purpose Register

82
THE Program counter in the AVR
PROGRAM ● The most important register in the AVR microcontroller is the PC
COUNTER (program counter). The program counter is used by the CPU to point to
AND the address of the next instruction to be executed.
● As the CPU fetches the opcode from the program ROM, the program
PROGRAM
counter is incremented automatically to point to the next instruction. The
ROM SPACE wider the program counter, the more memory locations a CPU can
IN THE AVR access. That means that a 14-bit program counter can access a
maximum of 16K (214 = 16K) program memory locations.

83
● In AVR microcontrollers each Flash memory location is 2 bytes wide. For example, in
ATmega32, whose Flash is 32K bytes, the Flash is organized 16K x 2, and its program
counter is 14 bits wide (214 = 16K memory locations). The ATmega64 has a 15-bit program
counter, so its Flash has 32K locations (215 = 32K), with each location containing 2 bytes
(32K x 2 bytes = 64K bytes).

● In the case of a 16-bit program counter, the code space is 64K(216 = 64K),. which occupies
the 0000-$FFFF address range. The program counter in the AVR family can be up to 22 bits
wide. This means that the AVR family can access program addresses 000000 to $3FFFFF, a
total of 4M locations. Because each Flash location is 2 bytes wide, the AVR can have a
maximum of 8M bytes of code. However, at the time of this writing, none of the members of
the AVR family have the entire 8M bytes of on-chip ROM installed.
84
Table : AVR On-chip ROM Size and Address Space On-chip Code ROM

Code Address Range

85
ROM memory map in the AVR ● The first location of program ROM inside
the AVR has the address of 000000, the
family last location can be different depending on
the size of the ROM on the chip.

● Some family members have only a few ● Among the AVR family members, the
kilobytes of on-chip ROM and some, such ATmega8 has 8K of on-chip ROM. This
as the ATmega128, have 128K of ROM. 8K ROM memory is organized as 4K x 2
bytes and has memory addresses of
00000 to $00FFF.

● No member of the AVR family can access ● The first location of on-chip ROM of this
more than 4M words of opcode because AVR has an address of 00000 and the
the program counter in the AVR can be a last location has the address of $00FFF.
maximum of 22 bits wide (000000 to
$3FFFFF address range).

86
Examples:

87
Figure. AVR On-Chip Program (code) ROM Address Range
88
Rifat - 2003090

Ends hereeee :’)

89
Microcontroller
History and Features
By Mahia Ribahna

Roll: 2003087 90
● A microcontroller is a chip optimized to control
electronic devices. It is stored in a VLSI (Very
Large Scale Integration) Integrated Circuit (IC)
which is dedicated to performing a particular task
and execute one specific application.

What is Microcontroller?
● It is specially designed circuits for embedded
applications and is widely used in automatically
controlled electronic devices such as home appliances,
automotive systems, medical devices, and industrial
control systems. They are also used in consumer
electronics products, such as gaming systems, digital
cameras, and audio players.

91
Microcontroller VS Microprocessor
Microprocessor Microcontroller

Since memory and I/O are connected externally, the Since memory and I/O are present together, the
circuit becomes large in size internal circuit is small in size.

It cannot be used in compact systems It can be used in compact systems

RAM, ROM, I/O units, and other peripherals are not RAM, ROM, CPU and other peripherals are
embedded on a single chip. embedded on a single chip.

Cost and speed is high Cost and speed is comparatively low

It is a central processing unit on a single silicon-based It is a byproduct of the development of


integrated chip. microprocessors with a CPU along with other
peripherals.

Based on the Von Neumann model Based on the Harvard architecture


92
AVR Microcontroller
Introduction
● Manufactured by Atmel
● Has several advantages over other types of
microcontroller such as easy programming and
debugging capabilities, as well as low power
consumption and high performance.
● Offers a wide range of models, from tiny to
mega, with different features and price points.

93
History of AVR Microcontroller

● Designed by Alf-Egil Bogen and Vegard Wollan, Norwegian Institute of Technology (NTH).
● Acquired and developed by Atmel in 1996.
● Generally a 8 bit microcontroller (exception: AVR32)
● AVRs are generally classified into four broad groups: Mega, Tiny, Special purpose, and Classic.

Compatibility Challenges:

● AVR microcontrollers may lack 100% software compatibility between families.


● Transitioning between families may require recompilation and register adjustments.

94
Features of AVR Microcontrollers

Standard Features: Additional Features:

● On-chip program (code) ROM. Most AVRs include:


● Data RAM.
● Data EEPROM. ● ADC (Analog-to-Digital Converter).
● Timers. ● PWM (Pulse Width Modulation).
● I/O ports. ● Various serial interfaces like USART,
SPF
● 12C(TWI), CAN, USB etc.

95
Fig: A simplified view of AVR microcontroller
96
Architecture of AVR
microcontrollers
● AVR Microcontroller is an 8-bit
RISC single-chip microcontroller
with Harvard architecture.
● Harvard architecture uses physically
separate memories for their
instructions and data, requiring
dedicated buses for each of them.
Instructions and operands can
therefore be fetched simultaneously.

97
Call Instructions ● A control transfer instruction that is used to call
a subroutine.
in AVR ● Makes program structured while saving memory
space.

4 type of call instruction in AVR:

1. CALL (Long call)


2. RCALL (Relative call)
3. ICALL (Indirect call to Z)
4. EICALL (Extended indirect call to Z)

98
CALL ● A 4 byte (32 bit) instruction
instruction: ● 10 bits for opcode and 22 bit for representing the address
of subroutine.
● Is used to call subroutine within 4Mb Address (000000
to $3FFFFF)

After the execution of subroutine, it is not compulsory that


AVR know the address where to come back. So the address of
the instruction is saved by the microcontroller on the STACK,
which exists just below the CALL instruction. When the
execution of a subroutine is completed, the control will be
transferred back to the caller with the help of RET instruction.
Hence, at the end of a subroutine, the RET instruction must be
placed every subroutine.

99
STACK and ❏ STACK is a memory area used to temporarily store
STACK register information.It is a part of RAM inside CPU.
❏ The value is stored in the temporary storage (Stack)
Operations when a function is called.
❏ The stack pointer (SP) register can access the stack.
❏ The stack grows up into the higher address when
something is pushed into it, and decreases when
something is popped from it.
❏ Two 8-bit registers are used if AVRs (Alf and Vegard's
RISC processor) contains more than 256 bytes.
❏ The stack pointer is made of SPL if AVR contains
memory with less than 256 bytes.

100
• Initial SP points to the top of the stack.

Pushing into Stack • Stores 64-bit register or constant onto the stack.

• Registers "rax" or "r8" are 64-bit and "eax" or "r8d"


are 32-bit.

• Data is saved at the stack pointer's location.

• Stack pointer decrements by 1.

101
Contrasts with pushing function.

Popping from stack • Pops content from stack and returns it to register.

• Top stack location copied back to register.

• Stack pointer incremented by 1.

• POP operation uses LIFO (Last in first out) method.

• retrieved last value popped out first from the stack.

102
Initializing • The SP register in AVR contains the address of RO, which
Stack Pointer must be initialized at the beginning of the program.

• The stack grows from higher memory location to lower


memory location, so it's common to initialize the SP to the
uppermost memory location.

• Different AVRs have different amounts of RAM, and


RAMEND represents the address of the last RAM location.

• To initialize the SP, RAMEND can be loaded into the SP,


which consists of two registers: SPH and SPL.

103
CALL instruction, RET
instruction, and role of stack

At the time of execution of a CALL instruction, the address of instructions that are
below the CALL instruction will be pushed onto the stack. The instructions, which
are below the CALL instruction, will be loaded into the PC and will be executed
when the subroutine execution is completed, and RET instruction is executed.

104
Md.Tameem Rahman
Microprocessor Assembly Language and Arithmetic
Instructions

105
Introduction
● A microprocessor is a multipurpose, programmable, clock-driven,
register-based electronic device that reads binary instructions from a
storage device called memory, accepts binary data as input and
processes data according to those instructions and provide results as
output
● Assembly language is a low-level language that helps to communicate
directly with computer hardware(microprocessor).

106
Creating and Running a Program

.ASM
Editor Assembler .OBJ File
File

.EXE
Linker
File
Assembly A code of assembly language can be divided into three parts.

Language 1. Head Section


2. Data Section
3. Code Section

1.Head Section:

.model small

.stack 100h

108
● .model small: This directive specifies the memory
model being used. In this case, it's the small
memory model, which is suitable for relatively small
programs.
● .stack 100h: This directive defines the size of the
stack segment for this program.

109
2. Data Section & Code Section

1. Operands: An operand is a subsection that specifies data that is


being operated or being manipulated

An operand has type that can either be a register, a memory


location, an immediate value or an address.

Example: AX, a, SI, etc

2.Operations:
1.MOV: It is used for moving a data from one operands to another.
But both operands should have same size.
Example:

MOV AX,A

Here the data from A is moved into AX

2. There are some more operations like ADD,


SUB, MUL, DIV, INC, DEC which will be
discussed in Arithmetic Instructions slides.

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3. Naming ● Names can be from 1 to 31 characters long
● Letter, digit and special characters( ? . @ _ $
Convention % ) can be used but digit can’t be used as first
of Variables character.
● Space is not allowed.
● Assembler doesn’t differentiate between upper
and lower case letter
● Examples of legal names: COUNTER1,
@character, sum_of_digits, $1000, DONE?
● Examples of illegal names: TWO WORDS,
2abc, you&me

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4. Data Types

● DB define byte
● DW define word (two consecutive bytes)
● DD define doubleword (two consecutive words)
● DQ define quardword (four consecutive words)
● DT define tenbytes (ten consecutive bytes)

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5. Input & 1. INPUT:

Output MOV AH, 1

INT 21H

2. OUTPUT:

MOV AH,2

INT 21H

For string:

MOV AH,9

INT 21H

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Code Format

.model small
Head Section
.stack 100h

.data
Data section

.code

main proc
code section

main endp

end main
Extra

1. semi -colon is used for writing a comment before the sentence


;this is a comment

2. Assembly Language is generally not case sensitive. But uppercase letter is used
to differentiate code from the rest of the text
Arithmetic Instructions
Addition
● For addition the keyword “ADD” is used

ADD AX,A
It adds together two operands, storing the result in its first operand.
In the above example, the data of A will be added with the data of AX and
the result will be stored in AX.

Subtraction: same as addition. Here the keyword is “SUB”


Multiplication
There is two types of multiplications in 8086 assembly language. Those
are:
1. Multiplication: Here two unsigned value is multiplied. The keyword is
“MUL”
2. Integer Multiplication: Here two signed values are multiplied. The
keyword is “IMUL”. The higher part of the result is stored in DX
register and the lower part is stored in AX register.
Multiplication Instructions
1. The first data have to be stored in AX register and second data in BX register
2. Then the instruction will be MUL BX / IMUL BX
3. The result will be stored in AX.

# In division similar procedure are applied to get the result


AAA: ASCII Adjust for Addition
The `AAA` instruction stands for "ASCII Adjust
After Addition". It is used to adjust the unpacked
decimal result after an addition operation
involving packed BCD (Binary Coded Decimal)
numbers.
There are also some instructions like AAA
● For Subtraction: AAS (ASCII Adjust for Subtraction)
● For Multiplication: AAM (ASCII Adjust for Multiplication)
● For Division: AAD (ASCII Adjust for Division)
Some Other Instructions
1. INC: It is used for incrementing an operand by one

A=10

INC A

A=11

2. DEC: It is used for decrementing an operand by one.

A=10

DEC A

A=9

3. NEG:It is used to perform bitwise negation on a register or a memory operand. NEG does this by replacing
the contents by its two’s complement.

A=0002 h

NEG A

A=FFFE h
THE END
Team ByteBlasters

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