Arithmetic Instructions

Dr. REKHA.K.S.
Associate Professor,
Dept of CS&E,
NIE,MYSURU
 Objectives
• We examine the arithmetic and logic
instructions. The arithmetic instructions
include addition, subtraction, multiplication,
division, comparison, negation, increment,
and decrement.
• The logic instructions include AND, OR,
Exclusive-OR, NOT, shifts, rotates, and the
logical compare (TEST).
 Objectives
• Use arithmetic and logic instructions to
accomplish simple binary, BCD, and ASCII
arithmetic.
• Use AND, OR, and Exclusive-OR to accomplish
binary bit manipulation.
• Use the shift and rotate instructions
 5-1 ADDITION, SUBTRACTION AND
COMPARISON
• The arithmetic instructions found in any
microprocessor include addition, subtraction,
and comparison.
• Addition, subtraction, and comparison
instructions are illustrated.
• Also shown are their uses in manipulating
register and memory data.
 Branch related Addressing Modes
• Addition (ADD) appears in many forms in the
microprocessor.
• ADD DST,SRC
• REG,MEM
• MEM,REG
• REG,REG
• Memory,immediate
• REG,IMMEDIATE
• ADD AX,BX ; opnn1= opnd1+opnd2
 Increment Addition
• The INC instruction adds 1 to any register or memory
location, except a segment register.
• The size of the data must be described by using the BYTE
PTR, WORD PTR, DWORD PTR, or QWORD PTR directives.
• INC OPR

• INC BYTE PTR[BX]

• INC WORD PTR[BX]
• MOV AL,4
• INC AL; AL=5
• RET
 Addition-with-Carry
• ADC) adds the bit in the carry flag (C) to the
operand data.
– mainly appears in software that adds numbers
wider than 16 or 32 bits in the 80386–Core2
– like ADD, ADC affects the flags after the addition
• Figure 5–1 illustrates this so placement and
function of the carry flag can be understood.
– cannot be easily performed without adding the carry
flag bit because the 8086–80286 only
adds 8- or 16-bit numbers
Figure 5–1 Addition-with-carry showing how the carry flag (C) links the two 16-bit additions into one 32-bit addition .
 ADD with Carry(ADC)
• ADC DST,SRC
• DST <- (SRC)+(DST)+(CF)
• OPR1=OPR1+OPR2+CF
• STC SET CF=1
• MOV AL,5 ; AL=5
• ADC AL,1 ;AL=7
• RET
 Exchange and Add for the 80486–Core2
Processors
• Exchange and add (XADD) appears in 80486
and continues through the Core2.
• XADD instruction adds the source to the
destination and stores the sum in the
destination, as with any addition.
– after the addition takes place, the original value of
the destination is copied into the source operand
 Subtraction
• Many forms of subtraction (SUB) appear in the
instruction set.
• Operand1=operand1-operand2
• Sub al,bl
• 0006 A92F
• 0004 9837
• ---------------
• 0002 10F8 ;There is no borrow B=0,CF=0
• Register Subtraction
• After each subtraction, the microprocessor
modifies the contents of the flag register.
– flags change for most arithmetic/logic operations
Immediate Subtraction
The microprocessor also allows immediate
operands for the subtraction of constant data.
Decrement Subtraction
Subtracts 1 from a register/memory location
 Subtraction-with-Borrow
• A subtraction-with-borrow (SBB) instruction functions as a regular
subtraction, except that the carry flag (C), which holds the borrow,
also subtracts from the difference.
– SBB DST,SRC ; opnd1=opnd1-opnd2-CF

– (DST)<-(DST)-(SRC)-(CF)
– REG,MEMORY
– MEM,MEM
– MEM,IMMEDIATE
– REG,IMMEDIATE
0006 A92F
0004 B837
--------------
0001 F0F8
Figure 5–2 Subtraction-with-borrow showing how the carry flag (C) propagates the borrow
 Decrement
• DEC OPR
• DEC BYTE PTR[BX]
• DEC WORD PTR[BX]
• MOV AL,255 ; AL=0FFH (255 OR -1)
• DEC AL ;AL=0FEH (254 OR -2)
• RET

• DEC do not change carry flag

 Comparison
• The comparison instruction (CMP) is a subtraction
that changes only the flag bits.
– destination operand never changes
• A CMP is normally followed by a conditional jump
instruction, which tests the condition of the flag bits.
• CMP CX,BX
• CF ZF SF
• CX=BX 0 1 0
• CX>BX 0 0 0
• CX<BX 1 0 1
 Compare and Exchange (80486–Core2
Processors Only)
• Compare and exchange instruction (CMPXCHG)
compares the destination operand with the
accumulator.
– instruction functions with 8-, 16-, or 32-bit data
• CMPXCHG CX,DX instruction is an example of the
compare and exchange instruction.
– this compares the contents of CX with AX
– if CX equals AX, DX is copied into AX; if CX
is not equal to AX, CX is copied into AX
– also compares AL with 8-bit data and EAX with 32-bit data if
the operands are either 8- or 32-bit
 5-2 MULTIPLICATION
• Performed on bytes, words, or doublewords,
– can be signed (IMUL) or unsigned integer (MUL)
• Product after a multiplication always a double-
width product.
– two 8-bit numbers multiplied generate a 16-bit
product; two 16-bit numbers generate a 32-bit;
two 32-bit numbers generate a 64-bit product
• MUL REG
Memory
When operand is a byte
AX=AL*operand
When operand is a word
(DXAX)= AX*operand
Ex: MOV AL,200; AL=0C8h
MOV BL,4
MUL BL ; AX=0320h(800)
RET
 IMUL
• IMUL {REG OR MEM
• Signed multiplication
• When operand is a byte
• AX=AL*Operand
• When operand is a word
• (DX:AX)=AX * operand
IMUL BL
AL=69
BL=14
AL*BL
69 x 14 = 966
20481024 512 256 128 64 32 16 8 4 2 1
0 1 0 0 0 1 0 1=69
0 0 0 0 1 1 1 0=14
0 0 1 1 1 1 0 0 0 1 10
-------------------------- --------------- --------------
3 c 6

AX=03C6H
• IMUL BL
• AL = 1110 0100 = -28 DECIMAL
• BL = 0011 1011 = +59 DECIMAL
• MSB =1 NEGATIVE, SF,CF,OF=1
2048 1024 512 256 128 64 32 16 8 4 2 1
1 1 1 0 0 1 0 0=-28
0 0 1 1 1 0 1 1=59
=-1652
1111 1001 1000 1100
AX=F98CH