8051 Interrupts Final

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8051 – Interrupts

8051 – Interrupts
• Microcontrollers must provide real time (predictable, though
not necessarily fast) response to events in the embedded system
they are controlling.
• A interrupt is a signal that stops the current program forcing it
to execute another program immediately.
• The interrupt does this without waiting for the current program
to finish.
• It is unconditional and immediate which is why it is called an
interrupt.
• An interrupt is the occurrence of an event that causes a
temporary suspension of a program while the condition is
serviced by another program.
– Allow a system to respond asynchronously to an event and
deal with the event while another program is executing.
8051 – Interrupts
• An interrupt driven system gives the illusion of doing many
things simultaneously.
– Of course, the CPU cannot execute more than one
instruction at a time.
• It can temporarily suspend execution of one program,
execute another, then return to the first program.
– In a way, interrupts are like subroutines. Except that one
does not know when the interrupt code will be executed.
Interrupts vs. Polling
• Polling:
– CPU monitors all served devices continuously, looking for a
“service request flag”
– Whenever it sees a request, it serves the device and then
keeps polling
– CPU is always “busy” with polling doing the “while any
request” loop
• Interrupts
– If and when a device is ready and needs attention, it informs
the CPU
– CPU drops whatever it was doing and serves the device and
then returns back to its original task
– CPU is always “free”, when not serving any interrupts
Interrupt Service Routines

• CPUs have fixed number of interrupts


– Every interrupt has to be associated with a piece of code
called “Interrupt Service Routine”, or ISR.
– If interrupt-x is received by CPU, the ISR-x is executed
• CPU architecture defines a specific “code address” for each
ISR, which is stored in the “Interrupt vector Table (IVT)”
• ISRs are basically “subroutines”, but they end with the RETI,
instruction instead of RET
• When an interrupt occurs, the CPU fetches its ISR code
address from the IVT and executes it.

5
Interrupt Execution

1. CPU finishes the instruction it is currently executing and


stores the PC on the stack
2. CPU saves the current status of all interrupts internally
3. Fetches the ISR address for the interrupt from IVT and jumps
to that address
4. Executes the ISR until it reaches the RETI instruction
5. Upon RETI, the CPU pops back the old PC from the stack
and continues with whatever it was doing before the interrupt
occurred
8051 – Interrupts
• Micro controller can extend its services to any peripheral devices in
two ways.

• In POLLING method microcontroller checks all the devices in round


robin fashion.

• In INTERRUPT method, the peripheral device notifies the micro


controller by sending it an interrupt signal.

• Up on receiving an interrupt signal, micro controller interrupts the


current task and calls ISR.

• For every interrupt, there must be an ISR. When an interrupt is


invoked, the micro controller executes the ISR. For every interrupt,
there is a fixed memory location that holds the address of the ISR.
8051 – Interrupts
• Six interrupts in 8051:

• RESET: when reset pin is activated, 8051 jumps to


address 0000h.
Two interrupts for timers.
Two interrupts for external hardware. INT0&INT1.
Serial communication has a single interrupt.
• Interrupts can be individually enabled or disabled. This is done
in the IE (Interrupt Enable) register (A8H).
– IE is bit addressable.
• All interrupts correspond to bits in registers.
– Therefore, it is possible to cause an interrupt by setting the
appropriate bit in the appropriate register.
• The end result is exactly as if the hardware interrupt
occurred.
MSB LSB
EA - ET2 ES ET1 EX1 ET0 EX0

Bit Name Description


IE.7 EA Enable/Disable all interrupts
If 0 all interrupts are disabled.
If 1, interrupts are enabled based on their
individual bits
IE.6 - Reserved
IE.5 ET2 Enable/Disable Timer 2 interrupt (8052)
IE.4 ES Enable/Disable Serial Input Interrupt
IE.3 ET1 Enable/Disable Timer 1 Interrupt (TF1)
IE.2 EX1 Enable/Disable External Interrupt 1 (INT1)
IE.1 ET0 Enable/Disable Timer 0 Interrupt (TF0)
IE.0 EX0 Enable/Disable External Interrupt 0 (INT0)
•Putting a 1 in a bit enables its interrupt.
•Putting a 0 masks that interrupt
Interrupt Priority
• The 8051 implements 2 types of interrupt priority.
• User Defined Priority.
– Using the IP register, the user can group interrupts into two levels –
high and low.
• An interrupt is assigned a “high” priority level by setting its bit in the
IP register to 1. If the bit is set to 0, the interrupt gets a “low”
priority.
• Automatic Priority.
– Within each priority level, a strict order is observed.
• Interrupts are ordered as follows: INT0, TF0, INT1, TF1, SO.
• Nothing can interrupt a high-priority interrupt--not even another high
priority interrupt.
• A high-priority interrupt may interrupt a low-priority interrupt.
• A low-priority interrupt may only occur if no other interrupt is already
executing.
• If two interrupts occur at the same time, the interrupt with higher
priority will execute first. If both interrupts are of the same priority the
interrupt which is serviced first by polling sequence will be executed
first.
The IP Register
MSB LSB
- - PT2 PS PT1 PX1 PT0 PX0

Bit Name Description


IP.7 - Reserved
IP.6 - Reserved
IP.5 ET2 Timer 2 interrupt priority (8052)
IP.4 ES Serial Port Interrupt priority
IP.3 ET1 Timer 1 Interrupt priority (TF1)
IP.2 EX1 External Interrupt 1 priority (INT1)
IP.1 ET0 Timer 0 Interrupt priority (TF0)
IP.0 EX0 External Interrupt 0 priority (INT0)

• Putting a 1 in a bit assigns its interrupt to the high priority level.


8051 – Interrupts
• What Events Can Trigger Interrupts, and where do
they go?
– Timer 0 Overflow.
– Timer 1 Overflow.
– Reception/Transmission of Serial Character.
– External Event 0.
– External Event 1.
• To distinguish between various interrupts and
executing different code depending on what interrupt
was triggered. This is accomplished by jumping to a
fixed address when a given interrupt occurs. This
process is known as vectoring of interrupts.
MCS-51 IVT
Symbol Address Interrupt Source
RESET 00H Power Up or Reset
EXTI0 03H External Interrupt 0
TIMER0 0BH Timer 0 Interrupt
EXTI1 13H External Interrupt 1
TIMER1 1BH Timer 1 Interrupt
SINT 23H Serial Port Interrupt

•By consulting the above chart we see that whenever


Timer 0 overflows (i.e., the TF0 bit is set), the main
program will be temporarily suspended and control will
jump to 000BH. It is assumed that we have code at address
000BH that handles the situation of Timer 0 overflowing.
8051 – Interrupts
• Setting Up Interrupts:
– By default at power up, all interrupts are disabled.
This means that even if, for example, the TF0 bit is
set, the 8051 will not execute the interrupt. Your
program must specifically tell the 8051 that it wishes
to enable interrupts and specifically which interrupts it
wishes to enable.
• Your program may enable and disable interrupts by
modifying the IE SFR (A8h)
8051 – Interrupts
• Polling Sequence:
• The 8051 automatically evaluates whether an interrupt should
occur after every instruction. When checking for interrupt
conditions, it checks them in the following order:
– External 0 Interrupt
– Timer 0 Interrupt
– External 1 Interrupt
– Timer 1 Interrupt
– Serial Interrupt
• This means that if a Serial Interrupt occurs at the exact same
instant that an External 0 Interrupt occurs, the External 0
Interrupt will be executed first and the Serial Interrupt will be
executed once the External 0 Interrupt has completed.
8051 – Interrupts
• What Happens When an Interrupt Occurs?
– When an interrupt is triggered, the following actions are
taken automatically by the microcontroller:
– The current Program Counter is saved on the stack, low-
byte first.
– Interrupts of the same and lower priority are blocked.
– In the case of Timer and External interrupts, the
corresponding interrupt flag is cleared.
– Program execution transfers to the corresponding interrupt
handler vector address.
– The Interrupt Handler Routine executes.
• Take special note of the third step: If the interrupt being
handled is a Timer or External interrupt, the microcontroller
automatically clears the interrupt flag before passing control to
your interrupt handler routine. All the bits that generates
interrupts can be set or cleared by software
8051 – Interrupts
• What Happens When an Interrupt Ends?
• An interrupt ends when your program executes the RETI
(Return from Interrupt) instruction. When the RETI instruction
is executed the following actions are taken by the
microcontroller:
– Two bytes are popped off the stack into the Program Counter to restore
normal program execution.
– Interrupt status is restored to its pre-interrupt status.
• Serial Interrupts:
– Serial Interrupts are slightly different than the rest of the interrupts.
This is due to the fact that there are two interrupt flags: RI and TI. If
either flag is set, a serial interrupt is triggered.
– The RI bit is set when a byte is received by the serial port and the TI
bit is set when a byte has been sent.

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