Chapter 4 - Design and Analysis
Chapter 4 - Design and Analysis
Chapter 4
Combinational Logic
Digital Design: With an Introduction to the Verilog HDL, 5e Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Types Of Digital Systems
• Combinational Logic:
Output depends on the present input combination
1. Design Procedure
2. Analysis Procedure
• Design
Boolean Expression is given by some means mostly one
comprehensive statement
Figure out the logic diagram.
• Analysis
Logic diagram is given
Figure out the Boolean Equation
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
4
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
5
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Design Procedure
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
8
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Design Procedure :Step 2
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
9
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Design Procedure :Step 3
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
10
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Step 3: Getting the Truth Table and Logic
equations
• Use K-Map
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
12
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Design Procedure :Step 4
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
13
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Half Adder
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
14
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Truth Table and Logic Equation Of Half Adder
• Logic Equation
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
15
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Logic Diagram
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
16
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.
Practice Problems
Amina Asif,
Digital Design: With an Introduction to theSpring 2020.
Verilog HDL, 5e
17
Copyright ©2013 by Pearson Education, Inc.
M. Morris Mano • Michael D. Ciletti All rights reserved.