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Lecture1 E5231

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0% found this document useful (0 votes)
34 views24 pages

Lecture1 E5231

Uploaded by

irfan khan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Architecture (EELE-5231)

Ehsan Atoofian
Electrical Engineering Department
Lakehead University
Moore’s Law
Number of transistors doubles every 18 months

2010: 1.17 trillion transistors


Moore’s law in 2016: 18.7
trillion transistors
Reality: 1.75 trillion
transistors

92 KIPS

Source: Intel 2
Growth in Perf. Since 1978
Limited ILP End of Moore’s law

-High level programming

-OS

-RISC

3
Power Wall (1/3)
Power
1000 density increases exponentially

Nuclear
Nuclear Reactor
Reactor
100 Pentium® 4
Watts/cm 2

Pentium® III
Pentium® II
10
Pentium® Pro
i386 Pentium®
Source: Intel
i486
1
1.5m 1m 0.7m 0.5m 0.35m 0.25m 0.18m 0.13m 0.1m 0.07m

4
Memory Wall (2/3)
µProc:
1000 60%/year
Performance

100 CPU Processor-Memory


Performance Gap:
(grows 50% / year)

10
DRAM:
DRAM 9%/year

1
1980 1985 1990 1995 2000 2005
Year

5
ILP Wall (3/3)
3) Instruction level Parallelism (ILP)
ILP is limited in sequential programs
Relative performance/cycle

Source: Intel 6
Chip Multiprocessor
 Instead of single processor, several processors on the same die
 Power wall: Each core, simple architecture
 Memory wall: Overlap computation and memory access
 ILP wall: Thread level parallelism

P0 P1
Single Processor
P2 P3

Single Processor Chip Multiprocessor

7
CMP
Intel released its first dual core processor in 2005
Intel’s first step into the multicore future

Source: Intel
8
Course Administration
Instructor
 Name: Ehsan Atoofian
 Email: [email protected]
 Office: AT5011
 Office hours: Tuesday & Thursday 11:30 AM~12:30 PM

Text Book:
 Required: J. Hennessy and D. Patterson, Computer Architecture: A Quantitative Approach ,
Morgan Kaufmann, 5th or 6th edition

Slides will be posted on the course website


 https://mycourselink.lakeheadu.ca/
9
Grading Information
Project: 30%
Implement a processor on FPGA

Assignment: 5%
Programming with Simplescalar (account on wesley)
Programming with Verilog

Two tests: 12.5% each

Final: 40%
10
Project
A pipelined processor with RISC-like ISA
 Hardware: Altera FPGA
 Write Verilog code

Altera DE10-Lite Board


MAX 10, 10M50DAF484C7G
CAD tool: Quartus

11
Outline
History

What is ENGI-5231 about?

Components of a processor

Technology Trend

Power in CMOS Technology

12
First Computer
ENIAC: The first general-purpose electronic computer
in 1945
17000 vacuum tubes
area: 63 m2
Power consumption=150 KW

13
VLSI + Architectural Progress
60-70% target perf
increase
Performance
Itanium™ processor
EPIC: Even greater instructions / cycle

486/Pentium® processor
RISC technologies
2 instructions / cycle

386 32-bit architecture


1 instruction / cycle 20-30% increase per year from
semiconductor technology

8086/286 CISC
.3 ins / cycle
Time
1980 1985 1990 1995 2000
Source: Intel

14
Classes of Computers
 A Categorization based on application of computers

 Desktops: largest market in terms of dollar- $300~$2500- customers


and so designers care about cost and performance of desktops
 Servers: World wide web is pushing servers- reliability (ATM
crashes)- throughput (how many requests are handled per unit time)
 Embedded Computers/IoT: everyday usage, e.g. Microwaves, cost
and power important, small memory
 Clusters / Warehouse Scale Computers
 Used for “Software as a Service (SaaS)”
 Emphasis on availability and cost
 Personal Mobile Device (PMD)
 e.g. smart phones, tablet computers
 Emphasis on energy efficiency and real-time
15
What is Computer Architecture?
Computer architecture = Instruction Set (ISA) + Organization
Design + Hardware Design

Instructions Set (ISA): The interface between hardware and


software, will discuss next week.

Computer organization: High level abstract of computer


structure, e.g. cache organization, branch predictor, memory
interconnect

Hardware: specification of processor, e.g. Logic design, clock


frequency.
16
Hardware and Software Layers in a Computer

Application
Operating
System
Compiler
Instruction Set
Memory I/O system Architecture
CPU
system
Control
Control

Datapath
Datapath

17
How Technology Changes Computer Design
Number of transistor : 40%~55% increase/year
Memory size: 25-40%/year /year
Magnetic disk: 5% increase/year
Flash capacity: 50-60%/year

18
Outline
History

What is ENGI-5231 about?

Components of a processor

Technology Trend

Power in CMOS Technology

19
Power In CMOS Technology
Power consumption
Pdyn =0.5 × freq × CL × Vdd2

Static Power
 Pstat = Istat × Vdd

20
Power
Intel 80386 consumed
~2W
3.3 GHz Intel Core i7
consumes 130 W
Heat must be
dissipated from 1.5 x 1.5
cm2 chip
This is the limit of what
can be cooled by air

21
Reducing Power
Techniques for reducing dynamic power:
 Do nothing well (Clock gating)
 Dynamic Voltage-Frequency Scaling

AMD Opteron

 Low power state for DRAM, disks


22
Static Power
Static power consumption
25-50% of total power
Current static x Voltage
To reduce: power gating

23
Transistor scaling
 VLSI technology characterized by feature size, minimum size of a wire
or transistor

 10 microns in 1971 to .032 microns in 2011

 Transistor performance scales linearly


 Smaller feature size, faster gates

 Wire delay does not improve with feature size!

 Result: Larger fraction of clock cycle for propagation delay

 Pentium 4, 2 out of 20+-stage just for propagation of signals


24

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