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L7 DLD Boolean Expression

This document provides information about digital logic design including: 1. Combinational logic circuits can be implemented using Sum-of-Products (SOP) form with AND-OR combinations of input variables and complements. 2. Exclusive-OR and exclusive-NOR gates have distinctive truth tables and symbols. 3. Karnaugh maps can be used to minimize logic expressions into SOP form and implement circuits using AND and OR gates. NAND gates provide an alternative implementation as they are universal. 4. Pulsed waveforms for combinational circuits can be analyzed by developing intermediate gate outputs and combining results based on a truth table.

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100% found this document useful (1 vote)
35 views18 pages

L7 DLD Boolean Expression

This document provides information about digital logic design including: 1. Combinational logic circuits can be implemented using Sum-of-Products (SOP) form with AND-OR combinations of input variables and complements. 2. Exclusive-OR and exclusive-NOR gates have distinctive truth tables and symbols. 3. Karnaugh maps can be used to minimize logic expressions into SOP form and implement circuits using AND and OR gates. NAND gates provide an alternative implementation as they are universal. 4. Pulsed waveforms for combinational circuits can be analyzed by developing intermediate gate outputs and combining results based on a truth table.

Uploaded by

andreytagno
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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DIGITAL LOGIC DESIGN (CEN-120) (3+1)

Faculty:
Shaista Ashraf
Computer Sciences Department,
Bahria University (Karachi Campus)
Summary
Combinational Logic Circuits
In Sum-of-Products (SOP) form, basic combinational circuits
can be directly implemented with AND-OR combinations if
the necessary complement terms are available.

Product terms
A
AB
B
C CD
D AB + CD + . . . + JK
Sum-of-products
J
JK
K
Product term
Summary
Combinational Logic Circuits

An example of an SOP implementation is shown. The SOP


expression is an AND-OR combination of the input variables
and the appropriate complements.

A
B ABC
C X = ABC + DE SOP

D
DE
E
Summary
Combinational Logic Circuits
When the output of a SOP form is inverted, the circuit is
called an AND-OR-Invert circuit. The AOI configuration
lends itself to product-of-sums (POS) implementation.
An example of an AOI implementation is shown. The output
expression can be changed to a POS expression by applying
DeMorgan’s theorem twice.
A
B ABC
C X = ABC + DE X = ABC + DE AOI

D X = (ABC)(DE) DeMorgan
E DE X = (A + B + C)(D + E) POS
Summary
Exclusive-OR Logic
Inputs Output
The truth table for an exclusive-OR gate is A B X
0 0 0
Notice that the output is HIGH whenever 0 1 1
A and B disagree. 1 0 1
1 1 0
The Boolean expression is X = AB + AB
The circuit can be drawn as
A
Symbols:
X =1

Distinctive shape Rectangular outline


B
Summary
Exclusive-NOR Logic
Inputs Output
The truth table for an exclusive-NOR gate is A B X
0 0 1
Notice that the output is HIGH whenever 0 1 0
0
A and B agree. 1
1
0
1 1
The Boolean expression is X = AB + AB
The circuit can be drawn as
A
Symbols:
X
B
=1

Distinctive shape Rectangular outline


Summary

For each circuit, determine if the LED should be on or off.


+5.0 V
+5.0 V
+5.0 V +5.0 V
+5.0 V +5.0 V
330 W
330 W 330 W
B LED
B LED
B LED

A
A A

(a) (b) (c)

Circuit (a): XOR, inputs agree, output is LOW, LED is ON.


Circuit (b): XNOR, inputs disagree, output is LOW, LED is ON.
Circuit (c): XOR, inputs disagree, output is HIGH, LED is OFF.
Summary
Implementing Combinational Logic
Implementing a SOP expression is done by first forming the
AND terms; then the terms are ORed together.
Show the circuit that will implement the Boolean
expression X = ABC + ABD + BDE. (Assume that the
variables and their complements are available.)
Start by forming the terms using three 3-input AND gates.
Then combine the three terms using a 3-input OR gate.
A
B
C
A X = ABC + ABD + BDE
B
D
B
D
E
Summary
Karnaugh Map Implementation
For basic combinational logic circuits, the Karnaugh map
can be read and the circuit drawn as a minimum SOP.
A Karnaugh map is drawn from a truth table. Read the
minimum SOP expression and draw the circuit.

C C
1. Group the 1’s into two overlapping
AB 1
B changes groups as indicated.
across this AB 1 1 2. Read each group by eliminating any
boundary variable that changes across a boundary.
AB 3. The vertical group is read A C.
C changes 4. The horizontal group is read AB.
AB across this
boundary The circuit is on the next slide:
Summary

continued…
Circuit: A
C X= AC + AB
A
B

The result is shown as a sum of products.


It is a simple matter to implement this form using only
NAND gates as shown in the text and following example.
Summary
NAND Logic

Convert the circuit in the previous example to


one that uses only NAND gates.

Recall from Boolean algebra that double inversion cancels.


By adding inverting bubbles to above circuit, it is easily
converted to NAND gates:
A
C X= AC + AB
A
B
Summary
Universal Gates
NAND gates are sometimes called universal gates
because they can be used to produce the other basic
Boolean functions.

A A A AB
B
Inverter AND gate

A A
A+B A+B
B B

OR gate NOR gate


Summary
Universal Gates
NOR gates are also universal gates and can form all of
the basic gates.

A A A A+ B
B
Inverter OR gate

A A
AB AB
B B

AND gate NAND gate


Summary
NAND Logic
Recall from DeMorgan’s theorem that AB = A + B. By
using equivalent symbols, it is simpler to read the logic
of SOP forms. The earlier example shows the idea:
A
C X= AC + AB
A
B

The logic is easy to read if you (mentally) cancel the two


connected bubbles on a line.
Summary
NOR Logic
Alternatively, DeMorgan’s theorem can be written as
A + B = A B. By using equivalent symbols, it is simpler
to read the logic of POS forms. For example,
A
B X = (A + B)(A + C)
A
C

Again, the logic is easy to read if you cancel the two


connected bubbles on a line.
Summary
Pulsed Waveforms
For combinational circuits with pulsed inputs, the output
can be predicted by developing intermediate outputs and
combining the result. For example, the circuit shown can
be analyzed at the outputs of the OR gates:

A
A
B G1
B
G3
C
C
D G2
D
G1
G2
G3
Summary
Pulsed Waveforms
Inputs Output
Alternatively, you can develop the truth table for
A B C D X
the circuit and enter 0’s and 1’s on the waveforms.
Then read the output from the table. 0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
A
G1 0 0 1 1 1
B 0 1 0 0 0
G3 0 1 0 1 1
C 0 1 1 0 1
G2 1
D 0 1 1 1
1 0 0 0 0
A 0 1 0 1 0 1 0 1 0 1 1 0 0 1 0
1 0 1 0 0
B 0 1 1 0 0 1 1 0 0 0 1 0 1 1 0
1 1 0 0 0
C 0 0 0 1 1 1 1 0 0 0
1 1 0 1 1
D 0 0 0 0 0 0 0 1 1 0 1 1 1 0 1
1 1 1 1 1
G3 0 0 0 0 1 1 1 0 1 0
Selected Key Terms

Universal gate Either a NAND or a NOR gate. The term universal


refers to a property of a gate that permits any logic
function to be implemented by that gate or by a
combination of gates of that kind.
Negative-OR The dual operation of a NAND gate when the
inputs are active-LOW.

Negative-AND The dual operation of a NOR gate when the inputs


are active-LOW.

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