02-SDLC and Formal Methods
02-SDLC and Formal Methods
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Achieving Reliability in Engineering
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Formal Methods (FMs)
What are Formal Methods?
Rigorous mathematically-based techniques and tools for
the specification, development, and verification of software
and hardware systems.
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The Reality (cont’d)
Fallible
Proofs are no more a guarantee of correctness than
testing, in many cases far less of one.
Cost Effective
Lead to early error discovery… How?
This reduces the overall costs… again How?
Straightforward Math
To write a formal specification in Z requires basic
knowledge of set theory and logic… (high-school)
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Assignment 1
Write brief summary of myths of Formal Methods:
A. Hall – Seven Myths of Formal Methods
(Handwritten hardcopy submission is required in the
next class.)
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Software Development
Definition (Process)
The process by which user needs are translated into a
software product. This involves translating user needs
into software requirements, transforming the software
requirements into design, implementing the design in
code, and testing the code.
Artifact:
Requirements Specification
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Design
Defining the architecture, components, interfaces, and
other characteristics of the system2.
Artifact:
Design Specification
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Implementation
Coding… i.e., transforming the logic and data from the
design specification into a programming language.
Artifact:
Source Code
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Validation & Verification (V&V)
Validation: evaluating a system/component during or at
the end of the development process to determine whether
or not it satisfies specified (user) requirements.
Artifacts (Data):
Testing: Test Cases (Item Pass/Fail and Code Coverage)
Model Checking: Properties (Witness/Counterexample)
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Software Process Models
Activities may overlap depending on process model:
Waterfall
V-Model
Spiral Model
Incremental Development
Unified Software Development Process (USDP)
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Waterfall Model (Royse ‘70)
Requirements
Definition
System and
software design
Implementation
and unit testing
Integration and
system testing
Operation and
maintenance
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V-Model (Jenson & Tonies ‘79)
Requirements Acceptance
Specification test
System and
System design
integration test
Risk
analysis
Risk
analysis
Prototype
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Prototype
Prototype
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2 Not shown
Requirements Concept of in detail
plan operation S/w Detailed
Sys.
Reqs. Design
Product
Design
Development Reqs.
Plan Validation Code
Integration Design
Unit Test
Plan Validation
Integration
Acceptance & Test
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Unified Software Development Process
System
Development
Analysis model
specified by Process is use
case driven!
realized by Design model
Use case
distributed by
model Deployment model
All models are related
implemented by through traceability
Implementation
model dependencies.
Requirements verified by
captured as a
set of use Test model
cases. 22
In this course you will be exposed to:
Formal Specification
Formal Verification
Using Formalisms to Support Design and
Testing
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What is a Specification?
Intermediate product of software development process
Differences?
Contractual Agreement
Client signs off on the SRS
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Specification Languages
Specification languages (like all languages) have a
syntax and semantics
2. Applicability
Sequential – one thread of control
Concurrent – multiple threads of control
Real-Time – time critical
Hybrid – discrete and continuous
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Classifications (cont’d)
3. Style
Model-Oriented – explicitly defines states and state
sequences; concrete and useful for implementation
Property-Oriented – assertions on state sequences
without explicitly writing them out; more abstract
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Informal Specification: Natural Language
Example Informal Specification
___________________________ A Better way
________________________
__
______________________________________
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Formal Methods
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Formal Specification
Formal specification is the use of mathematical
notation to precisely describe what properties a system
should have, without unduly constraining how to achieve
them.
Reading Assignment:
Introduction Chapter
J. Wing – A Specifier’s Introduction to Formal Methods
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