Lecture 6

Complements – NAND/NOR Gates

 Today’s Topics
In today’s lecture we will cover the following:

DeMorgan’s Laws Example (Circuit using only NAND

gates)
Complement of an Expression
Converting NAND Implementation
Converting Truth Table into into AND-OR Implementation
Algebraic expression
Explanation
Truth Tables for NAND and NOR
gates NOR Implementation
Symbols for NAND and NOR gates

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 DeMorgan’s Laws
DeMorgan’s Laws state that

We can prove these laws with the help of truth tables as

In general, DeMorgan’s laws can be extended to more than two

variables to get

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Complement of an Expression
Complement of any expression can be obtained by repeatedly
applying DeMorgan’s laws or following the rules:
1. Complement each variable (that is, a to a’ or a’ to a).
2. Replace 0 by 1 and 1 by 0.
3. Replace AND by OR and OR by AND, being sure to preserve the
order of operations. It sometimes requires additional parentheses.
Note:
If the function is in SOP form, its complement will be in POS form and
the complement of a POS expression will be an SOP one.

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Example
Consider the expression:

Its complement can be obtained as follows:

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Converting Truth Tables into
Algebraic Expressions
Sometimes, we need to
convert truth tables into
algebraic expressions and
vice versa.
In order to understand the
process of converting
truth table into algebraic
expression, consider the
two-variable truth table of
Table 2.11.

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Converting Truth Tables into
Algebraic Expressions(Contd...)
From the table, we see that:
• f is 1 if a = 0 AND b = 1 OR
if a’= 1 AND b = 0 OR
if a = 1 AND b = 1

However, this is the same as saying

• f is 1 if a’ = 1 AND b = 1 OR
if a = 1 AND b’ = 1 OR
if a = 1 AND b = 1

But a’ = 1 AND b = 1 is the same as saying a’b = 1 and thus

• f is 1 if a’b = 1 OR if ab’ = 1 OR if ab = 1
That finally produces the expression
• f = a’b + ab’ + ab

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 Explanation
• Each row of the truth table corresponds to a product term.
• An SOP expression is formed by ORing those product terms
that correspond to the rows of the truth table for which the
function is 1.
• Each product term has each variable included, with that
variable complemented when the entry in the input column for

that variable contains a 0 and uncomplemented when it

contains a 1.
• Thus, for example, the third produces the term ab’.
• These product terms include all of the variables. So, they are
called minterms.
• Minterms are often referred to by number, by just converting
the binary number in the input row of the truth table to
decimal.
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 Explanation (Contd...)
So, both of the following notations are common

Following table shows minterms and minterm numbers that are used for all
functions of three variables: A, B and C.
For a specific function, those terms
for which the function is 1 are
used to form an SOP expression
for f, and those terms for which the
function is 0 are used to form an
SOP expression for f ’ . We can
then complement f ’ to form a POS
expression for f.
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Example
 Consider the following truth table
showing both the function f and its
complement f ’.

 We can write:

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Example (Contd...)
From implementation point of view, the sum of minterms
and product of maxterms expressions are not suitable.
So, we need to reduce the functions into minimum terms
and literals.
Thus, we can reduce the above function, given in sum of
minterms, into minimum numbers of terms and literals as:

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 General Approach to Switching Functions
For ‘n’ variables, we can have 22n different switching functions.
So, for two variables, there are 16 possible truth tables, resulting in
16 different functions.
The truth table of Table 2.13 shows all of these functions.

The set of functions, f0 to f15 , reduced to minimum SOP form are as

follows:

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General Approach to Switching Functions (Contd...)

Note:

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NAND Gates
The truth table for
NAND (Not AND)
gate is as follows:

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NOR Gates
The truth table for NOR
(Not OR) gate is as
follows:

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 Why we use NAND and NOR gates?
The most important reason is that with either NAND or NOR, only one type
of gate is required. On the other hand, both AND and OR gates are required;
and, often, NOT gates are needed, as well.
The following circuits represent the behavior of NOT, AND and OR gates,
using only NAND gates.

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 Example (Circuit using only NAND gates)
• Consider the expression:

•It can be implemented using only NAND gates as follows:

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NAND Implementation
Thus, if we have to implement a circuit using only NAND
gates, the function should be in Sum of Product (SOP) form.
Pass every AND term, through a separate NAND gate.
Add one NAND gate at the end and pass all the outputs of
previous NAND gates, as an input to this NAND gate.
Any term which involves only one literal, will be
complemented and passed directly to the last NAND gate as
its input.

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Converting NAND Implementation Into AND-OR Implementation

 If we use the alternate symbol for the last NAND gate, we get the
following figure.

 The bubbles connecting the same line cancel each other.

 As a result, we get the AND-OR implementation of the given function f.

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 Example
• Consider the following function:

• It can be implemented using only NAND gates as follows:

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Explanation
Pass the AND term i.e. xz through the NAND gate at first
level.
Use the alternate symbol of NAND gate when the terms are
ORed e.g. in this case xz + w’, at the second level.
Use the alternate symbol of NAND gate at the last level
when all terms need to be ORed.
See how the single literal terms have been complemented
before passing through the gates.

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 Example
• Consider the following function:

• It can be implemented using AND-OR gates in the following

two ways.

• The first version can be directly converted to NAND gates as

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 Example (Contd...)

The second version cannot be converted to NAND gates without adding

an extra NOT gate, because it violates the rule—an AND gets an input
from another AND. (Please refer to p.60 in the book)
Thus, this circuit would get the following form

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 NOR Implementation
In order to implement a circuit using only NOR gate, the function
should be in Product of Sum (POS) form.
When this function is directly implemented using AND-OR gates, we
use OR gates at the first level and one AND gate at the second level.
To get NOR implementation, we use the following rules:
1. The final output of the circuit comes from an AND gate.
2. The inputs to OR gates come either from a system input or from the
output of an AND gate, and
3. The inputs to AND gates come either from a system input or from
the output of an OR gate.
Then all gates can be converted to NOR gates, and, if an input comes
directly into an AND gate, that input must be complemented.

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 Example
Consider the following function:

It can be implemented using only NOR gates as

The bubbles connecting the same line cancel each other. So,
as a result we can get the simple AND-OR logic diagram.

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