1

Lesson 06 –
Memory management
PRESENTER: THS. HUỲNH HOÀNG HÀ
Content 2
1. Objectives
2. Introduction
3. Continuous Allocation
4. Discontinuous Allocation
5. Virtual memory
6. Summary
7. Quizzes & Answers
8. Lesson Test
 3

1*Short reading (few slide)

2*Ask
3*Presenting 1-3 slides
4*Ask more
1. Objectives 4
After learning lesson 06, students can:
 Demostrate the fundamental knowledge of memory
 Describe the function of MMU
 Identify the characteristics of Continuous Allocation Methods.
 Identify the characteristics of Discontinuous Allocation Methods.
 Compare the advantages and disadvantages of 2 methods: Continuous
Allocation and Discontinuous Allocation.
 Describe virtual memory techquie.
1. Objectives 5
After learning lesson 06, students can:
 Demostrate the fundamental knowledge of memory
 Describe the function of MMU
 Identify the characteristics of Continuous Allocation Methods.
 Identify the characteristics of Discontinuous Allocation Methods.
 Compare the advantages and disadvantages of 2 methods: Continuous
Allocation and Discontinuous Allocation.
 Describe virtual memory techquie.
2. Introduction 6
 Main memory is the place where executing program is stored.
 Main memory is organized as a one-dimensional array, each memory cell has a
address.
 CPU communicates with the memory by reading/writing to a specific address.
 2. Introduction 7
 Logical address (Virtual address): is generated by the CPU. It can be changed
while programming.
 Logical address space (of a program): is set of all logical address of a program.
 Physical address (Real address): is the real address of the main memory.
 Physical address space: is the set of all physical addresses corresponding to
these logical addresses.

Mapping from virtual to physical

Application01
0x0100 addresses is done by Memory
Logical address MMU 0x10400
Physical address Management Unit(MMU)
0x0000
space Secondary
space memory
0x10300
(HDD,
SDD) Purpose of this lesson!
Physical
CPU memory
Content 8
1. Objectives
2. Introduction
3. Continuous Allocation
1. Linker_Loader
2. Base & Bound
4. Discontinuous Allocation
5. Virtual memory
6. Summary
7. Quizzes & Answers
8. Lesson Test
3. Continuous Allocation 9
 Entire process is loaded into a contiguous area of physical memory.
 Includes:
 Linker_Loader
 Base & Bound
3.1. Linker & Loader 10
 Linker&Loader uses 1 Base Register for storing Base address.
 At the loading time, the Application01 will be loaded into RAM, using the
following formula (Logical into Physical):
Physical address = Base address + Relative address
(With: Relative address = Logical address – Starting logical Address)
Ex1: Logi_addr = 0x5013 => Caculate: Rel_addr = ? ;Phys_addr = ?
Ex2: (APP1) What is the first address and the last address in the Physical address space?

0x5100
loading time Application01
0x5013
Application01 ???
0x10300 (base)
0x5000

Application02

Physical
CPU memory
3.2. Base & Bound 11
 Base&Bound uses: + 1 Base Register stores the Base address.
+ 1 Bound (Limit) Register stores the size of Phy_Add_Space.

0x10900 (base + bound)

0x5600
loading time Application01
Application01 0x10300 (base)
0x5000

Application02

Physical
CPU memory
 3.2. Base & Bound 12
 Base&Bound uses the following formula:
if (Relative_address < Bound)
Physical address = Base address + Relative address;
else
Error;
(With: Relative_addr = Logical_addr – Starting_logical_Addr)

0x5100 0x10400 (base + bound)

loading time Application01
Application01 0x10300 (base)
(starting) 0x5000

Application02 Ex1: Logi_addr = 0x5013 => Caculate:

Rel_addr = ? ;Phys_addr = ?
Physical Ex2: Logi_addr = 0x5310 => Caculate:
CPU memory Rel_addr = ? ;Phys_addr = ?
3.3. External Fragmentation 13

 External Fragmentation is the phenomenon: "Memory has many free areas but
scattered (discontinuous)"
 Solution 1: Use the memory compaction technique. This technique rearrages
the memory, to make free areas continuously.
 Solution 2: Use Discontinuous Allocation.
Content 14
1. Objectives
2. Introduction
3. Continuous Allocation
1. Linker_Loader
2. Base & Bound
4. Discontinuous Allocation
1. Segmentation
2. Paging
3. Segmented paging
5. Virtual memory
6. Summary
7. Quizzes & Answers
8. Lesson Test
4. Discontinuous Allocation 15
 The process is divided into several parts. These parts are saved in different
memory areas.
 Includes:
 Segmentation
 Paging
 Segmented paging
4.1. Segmentation 16

*In the Physical address

space, What is the final
address of the segment 0 ?

segment table

 The process is divided into several segment. Each segment has different size.
 The details about each segment are stored in a table, called a segment table. 
 Segment table contains:
 Base: It is the base address of the segment.
 Limit: It is the length of the segment.
4.1. Segmentation 17
* How does Logical address translate into physical
address ??? *
Answer:
1. CPU generates a logical address which
contains two parts:
 Segment Number (s) – index.
 Offset (d)
2. Use the segment table.
=> ------------------------------------
if (d < limit)
Physical address = base + d;
else
Error;
4.1. Segmentation 18
Example:
 Look at the Image, what is the value of Segment
Table?
 Look at the Image, What is the range of the
offset(d) in the segment 2?
4.1. Segmentation 19
Example:
 What is the Physical address, if ?
1. The logical address in the main(), has the
offset(d) is 125.
2. The logical address in Segment 4, has the
offset(d) is 515.
3. The logical address in Segment 0, has the
offset(d) is 1300.
4.1. Segmentation 20
Example:
 What is the Physical address, if ?
1. The instruction (logical address) in the main(),
has the offset(d) is 125.
2. The instruction (logical address) in Segment 4,
has the offset(d) is 515.
3. The instruction (logical address) in Segment 0,
has the offset(d) is 1300.
4.1. Segmentation 21

 Processes can share physical memory area for the same segments.
Ex: subfunctions.
4.2. Paging 22
 Process (logical address space) is split into several small parts. All of parts has
the same size, called page. (fixed size = 2n)
 The physical memory is split into the small blocks, known as frames.
 The frame size = the page size. 
4.2. Paging 23
* How does Logical address translate into physical
address ??? *
Answer:
1. CPU generates a logical address which
contains two parts:
 Page Number (p) [size: m bit]
 Offset (d) [size: n bit = size of page]
2. Use the page table.
3. Physical address = f * 2^n + d.
(size of f = size of p = m)
Ex: f=0x03, n = 4 bit, d = 0x5
=> Phys = 0x03 * 2^4 + 0x5
=> Phys = 0x035
4.2. Paging 25
1. CPU generates a logical address which
Look at the Image: contains two parts:
1. What is the size of Offset (d) in bit ? (n=?) Page Number (p) [size: m bit]
Offset (d) [size: n bit = size of page]
2. Determine f in the Page table ? 2. Use the page table.
3. What is the Physical address, 3. Physical address = f * 2^n + d.
 If [p, d] = [2, 200]
0x0100
 If [p, d] = [4, 300] 0x0200
0x0300
0x0400
0x0500
0x0600
0x0700
0x0800
4.2. Paging 26
1. CPU generates a logical address which
Look at the Image: contains two parts:
1. What is the size of Offset (d) in bit ? (n=?) Page Number (p) [size: m bit]
Offset (d) [size: n bit = size of page]
2. Determine f in the Page table ? 2. Use the page table.
3. What is the Physical address, 3. Physical address = f * 2^n + d.
 If [p, d] = [2, 200]
0x0100
 If [p, d] = [4, 300] 0x0200
0x0300
0x0400
0x0500
0x0600
0x0700
0x0800
4.2. Paging 27

 Processes can share frames to store the same data.

4.2. Paging 28
* Translation of look-aside buffer(TLB)
 TLB: small, high-speed memory.
4.2. Paging 29
* Two Level Page Table
 When the size of Page table is too large, we can split it into many small Page Table,
and create a 2 level mapping.
 CPU generates a logical address which contains three parts:
 Outer Page Number (p1)
 Inter Page Number (p2)
 Offset (d)
Ex: Manage student in UTE.
- Divide the list of students by Class
k
=> Search the information of a student f
(1) Find the Class list that student is belong to.
(2) Find the student’s id.
Physical
address
4.2. Paging (Internal Fragmentation) 31

142 bytes
Page 4 114 bytes(Free)

 The size of page = the size of frame = 2^8 = 256 byte ( Frame size is fixed)
 The size of process(P) = 910 byte => (P) splits into 4 pages:
Page1(256 B) – Page2(256 B) – Page3(256 B) – Page4(142 B)
=> Physical need 4 Frames. Size of Frame4 = 256 B, but only store 142 B.
=> known as: Internal Fragmentation.
4.3. Segmented Paging 33
 The process splits into many segments,
Then every segment splits into pages.
 A logical address contains three parts:
 Segment Number (s)
 Page Number (p)
 Offset (d)
 Use 2 kinds of table:
 Segment table
 Page table
 Advantages:
 Reduce the size of page table
 Easy for managing data
Read more.
5. Virtual memory 34
 Situation: Size of RAM is limit. Many processes need to run.
 Virtual memory is a technique:
 Load a portion of process into RAM for executing.
 Stores the other parts of process in Disk (HDD/SSD).
 MMU will swap all parts of process in and out of RAM for running.
 [Pros] The OS can run more processes concurrently.
 [Cons] Using combination of main memory and auxiliary memory
makes the system run slower than only using the main memory.
 Ex: Window10(Virtual memory)
6. Summary 35
 The OS provides the mechanisms for memory management, mapping from
Logical address to Physical address, for using the main memory efficiently.
 There are 2 allocation methods:
 Continuous allocation: (Linker&Loader, Base&Bound)
 [Pros] Simple configuration
 [Cons] Need a large contiguous memory area to hold the entire process
 Discontinuous allocation: (Segmentation, Paging, Segmented Paging)
 [Cons] Hard configuration
 [Pros] Process can split and store in discontinuous memory area
 [Pros] Manage memory more flexible and better.
 [Pros] Can use the virtual memory technique.
 Virtual memory is a technique which makes the OS can run more processes
concurrently than usual.
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Question & Answer