Chapter 2.

MACHINE
INSTRUCTIONS AND
PROGRAMS

PES SCHOOL OF ENGINEERING

Objectives
 Machine instructions and program execution,
including branching and subroutine call and return
operations.
 Number representation and addition/subtraction in
the 2’s-complement system.
 Addressing methods for accessing register and
memory operands.
 Assembly language for representing machine
instructions, data, and programs.
 Program-controlled Input/Output operations.
 Operations on stack, queue, list, linked-list, and
array data structures.
Number, Arithmetic
Operations, and
Characters
Unsigned Integer
 Consider a n-bit vector of the form:

A = a n −1 a n − 2 a n − 3  a0
where ai=0 or 1 for i in [0, n-1].
 This vector can represent positive integer values V =
A in the range 0 to 2n-1, where

n −1 n−2
A=2 an −1 + 2 an − 2 +  + 2 a1 + 2 a0
1 0
Signed Integer
3 major representations:
Sign and magnitude
One’s complement
Two’s complement
 Assumptions:

4-bit machine word

16 different values can be represented
Roughly half are positive, half are negative
Sign and Magnitude
Representation
-7 +0
-6 1111 0000 +1
1110 0001
-5 +2 +
1101 0010
-4 1100 0011 +3 0 100 = + 4

-3 1011 0100 +4 1 100 = - 4

1010 0101
-2 +5 -
1001 0110
-1 1000 0111 +6
-0 +7
High order bit is sign: 0 = positive (or zero), 1 = negative
Three low order bits is the magnitude: 0 (000) thru 7 (111)
Number range for n bits = +/-2n-1 -1
Two representations for 0
One’s Complement
Representation
-0 +0
-1 1111 0000 +1
1110 0001
-2 +2 +
1101 0010
-3 1100 0011 +3 0 100 = + 4

-4 1011 0100 +4 1 011 = - 4

1010 0101
-5 +5 -
1001 0110
-6 1000 0111 +6
-7 +7
 Subtraction implemented by addition & 1's complement
 Still two representations of 0! This causes some problems

 Some complexities in addition

Two’s Complement
Representation
-1 +0
-2 1111 0000 +1
1110 0001
-3 +2 +
1101 0010
like 1's comp
except shifted -4 1100 0011 +3 0 100 = + 4
one position
clockwise -5 1011 0100 +4 1 100 = - 4
1010 0101
-6 +5 -
1001 0110
-7 1000 0111 +6
-8 +7

 Only one representation for 0

 One more negative number than positive
number
Binary, Signed-Integer
Representations
B V alues represented

Sign and
b3 b2b1b0 magnitude 1' s complement 2' s complement

0 1 1 1 +7 +7 + 7
0 1 1 0 +6 +6 + 6
0 1 0 1 +5 +5 + 5
0 1 0 0 +4 +4 + 4
0 0 1 1 +3 +3 + 3
0 0 1 0 +2 +2 + 2
0 0 0 1 +1 +1 + 1
0 0 0 0 +0 +0 + 0
1 0 0 0 ­ 0 ­7 ­ 8
1 0 0 1 ­ 1 ­6 ­ 7
1 0 1 0 ­ 2 ­5 ­ 6
1 0 1 1 ­ 3 ­4 ­ 5
1 1 0 0 ­ 4 ­3 ­ 4
1 1 0 1 ­ 5 ­2 ­ 3
1 1 1 0 ­ 6 ­ 1 ­ 2
1 1 1 1 ­ 7 ­0 ­ 1

Figure 2.1.  Binary, signed­integer representations.
Comparison
 Sign and Magnitude
 Cumbersome addition/subtraction
 Must compare magnitudes to determine sign of
result
 One’s Complement
Simply bit-wise complement
 Two’s Complement
Simply bit-wise complement + 1
Addition of Positive Numbers
0 1 0 1
+ 0 + 0 + 1 + 1
0 1 1 10

Carry­out

Figure 2.2. Addition of 1­bit numbers.
 
Addition and Subtraction – Sign
Magnitude

4 0100 -4 1100
result sign bit is the
same as the operands' +3 0011 + (-3) 1011
sign
7 0111 -7 1111

when signs differ, 4 0100 -4 1100

operation is subtract,
sign of result depends -3 1011 +3 0011
on sign of number with
the larger magnitude 1 0001 -1 1001
Addition and Subtraction – 1’s
Complement
4 0100 -4 1011
+3 0011 + (-3) 1100
7 0111 -7 10111
End around carry 1

1000
4 0100 -4 1011
-3 1100 +3 0011
1 10000 -1 1110
End around carry 1

0001
Addition and Subtraction – 1’s
Complement

Why does end-around carry work?

n
Its equivalent to subtracting 2 and adding 1
n n
M - N = M + N = M + (2 - 1 - N) = (M - N) + 2 - 1 (M > N)
n n
-M + (-N) = M + N = (2 - M - 1) + (2 - N - 1) n-1
M+N<2
n n
= 2 + [2 - 1 - (M + N)] - 1
after end around carry:
n
= 2 - 1 - (M + N)

this is the correct form for representing -(M + N) in 1's comp!

Addition and Subtraction – 2’s
Complement
4 0100 -4 1100
+3 0011 + (-3) 1101
If carry-in to the high
order bit = 7 0111 -7 11001
carry-out then ignore
carry

if carry-in differs from 4 0100 -4 1100

carry-out then overflow
-3 1101 +3 0011
1 10001 -1 1111

Simpler addition scheme makes twos complement the most common

choice for integer number systems within digital systems
Addition and Subtraction – 2’s
Complement
Why can the carry-out be ignored?

-M + N when N > M:
n n
M* + N = (2 - M) + N = 2 + (N - M)
n
Ignoring carry-out is just like subtracting 2

-M + -N where N + M < = 2n-1

n n
-M + (-N) = M* + N* = (2 - M) + (2 - N)
n n
= 2 - (M + N) + 2

After ignoring the carry, this is just the right two’s complement
representation for -(M + N)!
2’s-Complement Add and
Subtract Operations
(a) 0 0 1 0 ( + 2) (b) 0 1 0 0 ( + 4)
+ 0 0 1 1 ( + 3) + 1 0 1 0 (­ 6)
0 1 0 1 ( + 5) 1 1 1 0 (­ 2)
(c) 1 0 1 1 (­ 5) (d) 0 1 1 1 ( + 7)
+ 1 1 1 0 (­ 2) + 1 1 0 1 ( ­ 3)
1 0 0 1 (­ 7) 0 1 0 0 ( + 4)
(e) 1 1 0 1 (­ 3) 1 1 0 1
­ 1 0 0 1 (­ 7) + 0 1 1 1
0 1 0 0 ( + 4)
(f) 0 0 1 0 ( + 2) 0 0 1 0
­ 0 1 0 0 ( + 4) + 1 1 0 0
1 1 1 0 ( ­ 2)
(g) 0 1 1 0 ( + 6) 0 1 1 0
­ 0 0 1 1 ( + 3) + 1 1 0 1
0 0 1 1 ( + 3)
(h) 1 0 0 1 ( ­ 7) 1 0 0 1
­ 1 0 1 1 (­ 5) + 0 1 0 1
1 1 1 0 ( ­ 2)
(i) 1 0 0 1 (­ 7) 1 0 0 1
­ 0 0 0 1 ( + 1) + 1 1 1 1
1 0 0 0 ( ­ 8)
(j) 0 0 1 0 ( + 2) 0 0 1 0
­ 1 1 0 1 ( ­ 3) + 0 0 1 1
0 1 0 1 ( + 5)

Figure 2.4. 2's­complement Add and Subtract operations.
Overflow - Add two positive numbers to get a
negative number or two negative numbers to
get a positive number

-1 +0 -1 +0
-2 1111 0000 +1 -2 1111 0000 +1
1110 0001 1110 0001
-3 +2 -3
1101 1101 +2
0010 0010
-4 -4
1100 0011 +3 1100 0011 +3
-5 1011 -5 1011
0100 +4 0100 +4
1010 1010
-6 0101 -6 0101
1001
+5 +5
0110 1001 0110
-7 1000 0111 +6 -7 1000 +6
0111
-8 +7 -8 +7

5 + 3 = -8 -7 - 2 = +7
Overflow Conditions
0111 1000
5 0101 -7 1001
3 0011 -2 1100
-8 1000 7 10111
Overflow Overflow
0000 1111
5 0101 -3 1101
2 0010 -5 1011
7 0111 -8 11000
No overflow No overflow
Overflow when carry-in to the high-order bit does not equal carry out
 Sign Extension
 Task:
 Given w-bit signed integer x

 Convert it to w+k-bit integer with same value

 Rule:
 Make k copies of sign bit:

 X′= x
w–1 ,…, xw–1 , xw–1 , xw–2 ,…, x0
w
X  • • •
k copies of MSB

• • •

X ′ • • • • • •

k w
Sign Extension Example

short int x = 15213;

int ix = (int) x;
short int y = -15213;
int iy = (int) y;

Decimal Hex Binary

x 15213 3B 6D 00111011 01101101
ix 15213 00 00 C4 92 00000000 00000000 00111011 01101101
y -15213 C4 93 11000100 10010011
iy -15213 FF FF C4 93 11111111 11111111 11000100 10010011
Memory Locations,
Addresses, and
Operations
Memory Location, Addresses,
and Operation
n bits
first word
 Memory consists
second word
of many millions of
storage cells,
•
each of which can •
•
store 1 bit.
 Data is usually i th word
accessed in n-bit
groups. n is called •
word length. •
•

last word

Figure 2.5.   Memory words.
Memory Location, Addresses,
and Operation
 32-bit word length example
32 bits

b 31 b 30 b1 b0

•
•
•
Sign bit: b 31= 0  for positive numbers
b 31= 1  for negative numbers

(a) A signed integer

8 bits 8 bits 8 bits 8 bits

ASCII ASCII ASCII ASCII

character character character character

(b) Four characters
Memory Location, Addresses,
and Operation
 To retrieve information from memory, either for one
word or one byte (8-bit), addresses for each location
are needed.
 A k-bit address memory has 2k memory locations,
namely 0 – 2k-1, called memory space.
 24-bit memory: 224 = 16,777,216 = 16M (1M=220)
 32-bit memory: 232 = 4G (1G=230)
 1K=210
 1T=240
Memory Location, Addresses,
and Operation
 Itis impractical to assign distinct addresses
to individual bit locations in the memory.
 The most practical assignment is to have
successive addresses refer to successive
byte locations in the memory – byte-
addressable memory.
 Byte locations have addresses 0, 1, 2, … If
word length is 32 bits, they successive words
are located at addresses 0, 4, 8,…
Big-Endian and Little-Endian
Assignments
Word
address Byte address Byte address

 0 0 1 2 3 0 3 2 1 0

4 4 5 6 7 4 7 6 5 4

• •
• •
• •

k k k k k k k k k k
2 ­4 2 ­4 2 ­3 2­ 2 2 ­ 1 2 ­ 4 2­ 1 2 ­ 2 2 ­3 2 ­4

(a) Big­endian assignment (b) Little­endian assignment

Figure 2.7.  Byte and word addressing.
Memory Location, Addresses,
and Operation
 Address ordering of bytes
 Word alignment

 Access numbers, characters, and character

strings
Memory Operation
 Load (or Read or Fetch)
 Copy the content. The memory content doesn’t change.
 Address – Load
 Registers can be used
 Store (or Write)
 Overwrite the content in memory
 Address and Data – Store
 Registers can be used
 Instruction and
Instruction Sequencing
“Must-Perform” Operations
 Data transfers between the memory and the
processor registers
 Arithmetic and logic operations on data

 Program sequencing and control

 I/O transfers
Register Transfer Notation
 Identifya location by a symbolic name
standing for its hardware binary address
(LOC, R0,…)
 Contents of a location are denoted by placing
square brackets around the name of the
location (R1←[LOC], R3 ←[R1]+[R2])
 Register Transfer Notation (RTN)
Assembly Language Notation
 Represent machine instructions and
programs.
 Move LOC, R1 = R1←[LOC]

 Add R1, R2, R3 = R3 ←[R1]+[R2]

Basic Instruction Types
 High-levellanguage: C = A + B
 Action: C ← [A] + [B]

 Assembly: Add A, B, C

 Three-address instruction:
Operation Source1, Source2, Destination
 Two-address instruction:
Operation Source, Destination
 Add A, B = B ←[A] + [B]
Basic Instruction Types
 Need to add something to the above two-address
instruction to finish:
Move B, C = C ← [B]
 One-address instruction (to fit in one word length)
 Accumulator: Add A
 Load A
 Add B
 Store C
 Zero-address instructions (stack operation)
Using Registers
 Registers are faster
 The number of registers is smaller

 Shorter instructions

 Potential speedup

 Minimize the frequency with which data is

moved back and forth between the memory
and processor registers.
Using Registers
 Load A, Ri
 Store R i, A
 Add A, Ri
 Add Ri, Rj
 Add Ri, Rj, Rk
 Move Source, Destination
 Move A, R = Load A, R
i i

 Move Ri, A = Store Ri, A

Using Registers
 In the processors where arithmetic operations are
allowed only on operands in register
Move A, Ri
Move B, Rj
Add Ri, Rj
Move Rj, C
 In the processors where one operand may be in the
memory but the other one must be in registers
Move A, Ri
Add B, Ri
Move Ri, C
 Instruction Execution and
Straight-Line Sequencing
Address Contents

i
Assumptions:
Begin execution here Move A,R0
3­instruction - One memory operand
i  + 4 Add B,R0 program
segment per instruction
i  + 8 Move R0,C
- 32-bit word length
- Memory is byte
addressable
A - Full memory address
can be directly specified
in a single-word instruction
B Data for
the program
Two-phase procedure

Figure 2.8.  A program for C ← [Α] + [Β].

 i Move NUM1,R0
i+4 Add NUM2,R0

Branching i+8 Add NUM3,R0

•
•
•
i + 4n ­ 4 Add NUMn,R0
i + 4n Move R0,SUM

•
•
•
SUM
NUM1
NUM2

•
•
•
NUMn

Figure 2.9.   A straight­line  program for adding n numbers.
 Move N,R1
Clear R0

Branching LOOP
Determine address of
"Next" number and add
Program "Next" number to R0
loop
Decrement R1
Branch>0 LOOP
Branch target
Move R0,SUM

Conditional branch
•
•
•
SUM
N n
NUM1

Figure 2.10.   Using a loop to add n numbers. NUM2

•
•
•
NUMn
Condition Codes
 Condition code flags
 Condition code register / status register

 N (negative)

 Z (zero)

 V (overflow)

 C (carry)

 Different instructions affect different flags

Generating Memory Addresses
 How to specify the address of branch target?
 Can we give the memory operand address
directly in a single Add instruction in the
loop?
 Use a register to hold the address of NUM1;
then increment by 4 on each pass through
the loop.
Addressing Modes
Addressing Modes
Name Assembler syntax Addressing
function
 The different
ways in which
the location of Immediate #Value Operand= Value
an operand is
specified in an Register Ri EA = Ri
instruction are
referred to as
addressing Absolute(Direct) LOC EA = LOC
modes.
Indirect (Ri ) EA = [Ri ]
(LOC) EA = [LOC]
Index X(Ri) EA = [Ri ] + X

Basewithindex (Ri ,Rj ) EA = [Ri ] + [Rj ]

Basewithindex X(Ri,Rj ) EA = [Ri ] + [Rj ] + X
andoffset

Relative X(PC) EA = [PC] + X

Autoincremen
t (Ri)+ EA = [Ri ] ;
Increment Ri

Autodecrement − (Ri ) Decrement Ri ;

EA = [Ri]
Implementation of Variables
A variable is represented by allocating a
register or a memory location to hold its
value.
 Register mode

 Absolute mode

 Move LOC, R2
Implementation of Constants
 Immediate mode
 Move 200
immediate, R0

 Move #200, R0

A =B+6
 Move B, R1

 Add #6, R1

 Move R1, A
Indirection and Pointers
 Indirect mode – the effective address (EA) of the operand is the
contents of a register or memory location whose address appears in the
instruction.

Add    (R1),R0 Add    (A),R0

Main
memory

B Operand A B

R1 B Register B Operand

(a) Through a general­purpose register (b) Through a memory location

Figure 2.11.   Indirect addressing.
Indirection and Pointers
The register or memory location that contains the address of an operand is
called a pointer.

Address Contents
Move N,R1
Move #NUM1,R2 Initialization
Clear R0
LOOP Add (R2),R0
Add #4,R2
Decrement R1
Branch>0 LOOP
Move R0,SUM

Figure 2.12.   Use of indirect addressing in the program of Figure 2.10.
Indirection and Pointers
 C-language: A = *B
 Move B, R1
Move (R1), A
 Indirect addressing: Move (B), A

 Indirect addressing through memory

 Indirect addressing through registers

Indexing and Arrays
 Index mode – the effective address of the operand
is generated by adding a constant value to the
contents of a register.
 Index register
 X(Ri): EA = X + [Ri]
 The constant X may be given either as an explicit
number or as a symbolic name representing a
numerical value.
 If X is shorter than a word, sign-extension is needed.
Indexed Addressing
Add    20(R1),R2

1000 1000 R1

20 = offset

1020 Operand

(a) Offset is given as a constant

Add    1000(R1),R2

1000 20 R1

20 = offset

1020 Operand

(b) Offset is in the index register

Figure 2.13.   Indexed addressing.
Example – Student Record List
N n

LIST Student ID
LIST + 4 Test 1
Student 1
LIST + 8 Test 2

LIST + 12 Test 3
LIST + 16 Student ID
Test 1
Student 2
Test 2
Test 3

•
•
•

Figure 2.14.   A list of students' marks.
Example (Cont’)
 Compute the sum of all scores obtained on each of
the tests and store these three sums in memory
locations SUM1, SUM2, and SUM3.
Move                  #LIST,R0
Clear R1
Clear R2
Clear R3
Move N,R4
 LOOP Add 4(R0),R1
Add 8(R0),R2 R0 doesn’t’ change
A dd 12(R0),R3
Add #16,R0
Decrement R4
Branch>0 LOOP
Move R1,SUM1
Move R2,SUM2
Move R3,SUM3
Indexing and Arrays
 In general, the Index mode facilitates access
to an operand whose location is defined
relative to a reference point within the data
structure in which the operand appears.
 Several variations:
(Ri, Rj): EA = [Ri] + [Rj]
X(Ri, Rj): EA = X + [Ri] + [Rj]
Relative Addressing
 Relativemode – the effective address is
determined by the Index mode using the
program counter in place of the general-
purpose register.
 X(PC) – note that X is a signed number

 Branch>0 LOOP
Additional Modes
 Autoincrement mode – the effective address of the operand is
the contents of a register specified in the instruction. After
accessing the operand, the contents of this register are
automatically incremented to point to the next item in a list.
 (Ri)+
 Autodecrement mode: -(Ri) – decrement first

Move N,R1
Move #NUM1,R2 Initialization
Clear R0
LOOP Add (R2)+,R0
Decrement R1
Branch>0 LOOP
Move R0,SUM

Figure 2.16.  The Autoincrement addressing mode used in the program of Figure 2.12.
Assembly Language
Assembly Language
 Machine instructions are represented by 0’s and 1’s
– cool but…
 Symbolic names: Move, Add, Increment, Branch,…
 Mnemonics: MOV, ADD, INC, BRA,…
 A complete set of such symbolic names and rules
for their use constitute an assembly language.
 The set of rules for using the mnemonics is called
the syntax of the language.
 Assembler
 Source program – object program
Assembly language
 Case sensitivity
 Op code

 Several example:
ADD #5, R3
ADDI 5, R3
MOVE #5, (R2)
MOVEI 5, (R2)
Assembler Directives
 Allow programmer to specify other
information needed to translate the source
program into object program – assembler
directives/commands.
 SUM EQU 20

 Label Operation Operand(s) Comment

 100 Move N,R1

Sample Program
104 Move #NUM1,R2

108 Clear R0
LOOP 112 Add (R2),R0
116 Add #4,R2
- How to interpret the names
- Where to place the instructions 120 Decrement R1

in the memory 124 Branch>0 LOOP

- Where to place the data operands 128 Move R0,SUM

in the memory 132

SUM 200
N 204 100

NUM1 208
NUM2 212

NUMn 604

Figure 2.17.   Memory arrangement for the program in Figure 2.12.
Sample Program
Memory Addressing
address ordata
label Operation information

Assemblerdirectives SUM EQU 200

ORIGIN 204
N DATAWORD 100
NUM1 RESERVE 400
ORIGIN 100
Statementsthat START MOVE N,R1
generate MOVE #NUM1,R2
machine CLR R0
instructions LOOP ADD (R2),R0
ADD #4,R2
DEC R1
BGTZ LOOP
MOVE R0,SUM
Assemblerdirectives RETURN
END START
Assembly and Execution of
Programs
 Assembler’s task (source → object)
 Replace all symbols denoting operations and addressing modes
with the binary codes used in machine instructions
 Replace all names and labels with their actual values
 Assign addresses to instructions and data blocks (ORIGIN,
DATAWORD, RESERVE)
 Determine the values that replace the names (EQU, label)
 Branch address (Relative addressing, branch offset)
 Scan through the source program, keep track of all names and the
numerical values that correspond them in a symbol table.
 What if a name appears as an operand before it is given a value (forward branch)?
 Two-pass assembler
Assembly and Execution of
Programs
 Loader – load the object program from the
disk into memory
 Already be in memory
 Know the length of the program and the address in the
memory where it will be stored
 Branch to the first instruction to be executed
 Debugger – let user find errors easily
 Number notation – decimal, binary (%),
hexadecimal/hex ($)
Basic Input/Output
Operations
I/O
 The data on which the instructions operate
are not necessarily already stored in memory.
 Data need to be transferred between
processor and outside world (disk, keyboard,
etc.)
 I/O operations are essential, the way they are
performed can have a significant effect on the
performance of the computer.
Program-Controlled I/O
Example
 Read in character input from a keyboard and
produce character output on a display
screen.
 Rate of data transfer (keyboard, display, processor)
 Difference in speed between processor and I/O device
creates the need for mechanisms to synchronize the
transfer of data.
 A solution: on output, the processor sends the first
character and then waits for a signal from the display
that the character has been received. It then sends the
second character. Input is sent from the keyboard in a
similar way.
Program-Controlled I/O
Example
Bus

Processor
DATAIN DATAOUT

SIN SOUT
- Registers
- Flags Keyboard Display
- Device interface

Figure 2.19 Bus connection for processor , keyboard, and display .

Program-Controlled I/O
Example
 Machine instructions that can check the state
of the status flags and transfer data:
READWAIT Branch to READWAIT if SIN = 0
Input from DATAIN to R1

WRITEWAIT Branch to WRITEWAIT if SOUT = 0

Output from R1 to DATAOUT
Program-Controlled I/O
Example
 Memory-Mapped I/O – some memory
address values are used to refer to peripheral
device buffer registers. No special
instructions are needed. Also use device
status registers.

READWAIT Testbit #3, INSTATUS

Branch=0 READWAIT
MoveByte DATAIN, R1
Program-Controlled I/O
Example
Move #LOC,R0 InitializepointerregisterR0 topoint tothe
addressofthefirstlocationinmemory
wherethecharacters areto bestored.
READ TestBit #3,INSTATUS Wait for a characterto be entered
Branc
h=0 READ in thekeyboardbufferDATAIN.
MoveByte DATAIN,(R0) Transferthecharacter from DATAIN into
thememory(this clearsSIN to 0).
ECHO TestBit #3,OUTST ATUS Waitfor thedisplay to becomeready.
Branc
h=0 ECHO
MoveByte (R0),DATAOUT Movethecharacterjust readto thedisplay
bufferregister(this clearsSOUT to 0).
Compare #CR,(R0)+ Check if thecharacter just readis CR
(carriagereturn). If it is not CR, then
Branch≠0 READ branch back andreadanothercharacter.
Also,incremen t thepointerto storethe
nextcharacter.

Figure 2.20. A program that reads a line of characters and displays it.
Program-Controlled I/O
Example
 Assumption – the initial state of SIN is 0 and
the initial state of SOUT is 1.
 Any drawback of this mechanism in terms of
efficiency?
 Alternate solution?
Stacks and Queues
Stacks
A list of data elements, usually words or
bytes, with the accessing restriction that
elements can be added or removed at one
end of the list only.
 Top / Bottom / Pushdown Stack

 Last-In-First-Out (LIFO)

 Push / Pop
Stacks
0

Stack •
pointer •
register •
Current
SP ­ 28 top element
17

739
Stack
•
•
•
Bottom
BOTTOM 43 element
•
•
•
k
2 ­ 1

Figure 2.21.   A stack of words in the memory.
Stacks
 Stack Pointer (SP)
 Push

Subtract #4, SP
Move NEWITEM, (SP)

Move NEWITEM, -(SP)

 Pop

Move (SP), ITEM

Add #4, SP

Move (SP)+, ITEM

Stacks
SP 19
­ 28 ­ 28
17 SP 17
739 739

Stack
• •
• •
• •
43 43

NEWITEM 19 ITEM ­ 28

(a) After push from NEWITEM (b) After pop into ITEM

Figure 2.22.   Effect of stack operations on the stack in Figure 2.21.
Stacks
 The size of stack in a program is fixed in
memory.
 Need to avoid pushing if the maximum size is
reached
 Need to avoid popping if stack is empty
 Compare instruction
Compare src, dst
[dst] – [src]
Will not change the values of src and dst.
Stacks
SAFEPOP Compare #2000,SP Check to seeif thestack pointercontains
Branch>0 EMPTYERROR anaddressvaluegreaterthan2000.If it
does,thestack isempty. Branch to the
routine EMPTYERROR forappropriate
action.
Move (SP)+,ITEM Otherwise,popthetopof thestack into
memorylocationITEM.

(a) Routine for a safe pop operation

SAFEPUSH Compare #1500,SP Check toseeif thestack pointer

Branch≤ 0 FULLERROR containsanaddressvalueequal
to or lessthan1500.If it does,the
stack isfull. Branch to theroutine
FULLERROR forappropriate action.
Move NEWITEM,– (SP) Otherwise, pushtheelemen t inmemory
locationNEWITEM onto thestack.

(b) Routine for a safe push

operation
Figure 2.23. Checking for empty and full errors in pop and push
operations.
Queues
 Data are stored in and retrieved from a queue
on a First-In-First-Out (FIFO) basis.
 New data are added at the back (high-
address end) and retrieved from the front
(low-address end).
 How many pointers are needed for stack and
queue, respectively?
 Circular buffer
Subroutines
Subroutines
 It is often necessary to perform a particular subtask
(subroutine) many times on different data values.
 To save space, only one copy of the instructions
that constitute the subroutine is placed in the
memory.
 Any program that requires the use of the subroutine
simply branches to its starting location (Call).
 After a subroutine has been executed, it is said to
return to the program that called the subroutine, and
the program resumes execution. (Return)
Subroutines
 Since the subroutine may be called from different
places in a calling program, provision must be made
for returning to the appropriate location.
 Subroutine Linkage method: use link register to
store the PC.
 Call instruction
 Store the contents of the PC in the link register
 Branch to the target address specified by the instruction
 Return instruction
 Branch to the address contained in the link register
Subroutines
Memory Memory
location Calling program location Subroutine SUB

200 Call      SUB 1000 first instruction

204 next instruction

Return

1000

PC 204

Link 204

Call Return

Figure 2.24.   Subroutine linkage using a link register.
Subroutine Nesting and The
Processor Stack
 If a subroutine calls another subroutine, the
contents in the link register will be destroyed.
 If subroutine A calls B, B calls C, after C has
been executed, the PC should return to B,
then A
 LIFO – Stack

 Automatic process by the Call instruction

 Processor stack
Parameter Passing
 Exchange of information between a calling
program and a subroutine.
 Several ways:
 Through registers
 Through memory locations
 Through stack
Passing Parameters through
Processor Registers
Callingprogram

Move N,R1 R1 servesas a counter.

Move #NUM1,R2 R2 pointstothelist.
Call LISTADD Callsubroutine.
Move R0,SUM Saveresult.
..
.

Subroutine

LISTADD Clear R0 Initializesumto 0.

LOOP Add (R2)+,R0 Add entryfromlist.
Decremen t R1
Branch>0 LOOP
Return Returntocallingprogram.

Figure 2.25. Program of Figure 2.16 written as a subroutine; parameters passed through
registers.
 Passing Parameters through
Stack
Assumetopof stack is atlevel 1 below.
- Passing by reference
Move #NUM1,– (SP) Pushparameters
onto stack.
- Passing by value
Move N, – (SP)
Call LISTADD Callsubroutine
(top of stack at level2).
Move 4(SP),SUM Saveresult.
Add #8,SP Restoretopofstack
(top of stack at level1).
Level 3 → [R2]
..
. [R1]
[R0]
LISTADD MoveMultiple R0– R2,– (SP) Saveregisters
(top ofstack atlevel 3). Level 2 → Returnaddress
Move 16(SP),R1 Initializecounter to n. n
Move 20(SP),R2 Initializepointer to thelist.
Clear R0 Initializesumto 0. NUM1
LOOP Add (R2)+,R0 Add entry fromlist. Level 1 →
Decrement R1
Branch>0 LOOP
Move R0,20(SP) Put resultonthestack.
MoveMultiple (SP)+,R0– R2 Restoreregisters. (b) Top of stack at various times
Return Returntocallingprogram.

(a) Calling program and subroutine Figure 2.26. Program of Figure 2.16 written as a subroutine; parameters passed on the stack.
The Stack Frame
 Some stack locations constitute a private
work space for a subroutine, created at the
time the subroutine is entered and freed up
when the subroutine returns control to the
calling program. Such space is called a stack
frame.
 Frame pointer (FP)

 Index addressing to access data inside frame

-4(FP), 8(FP), …
The Stack Frame
SP saved [R1]
(stack pointer)
saved [R0]

localvar3

localvar2

localvar1 Stack
frame
FP for
(frame pointer) saved [FP]
called
Return address subroutine

param1

param2

param3

param4

Old TOS
(top­of­stack)

Figure 2.27.  A subroutine stack frame example.
SP and FP
 Move FP, -(SP)
 Move SP, FP
 Subtract #12, SP
 Push R0 and R1
 …
 Pop R0 and R1
 Add #12, SP
 Pop FP
 Return
Stack Frames for Nested
Subroutines
Memory
location Instructions Commen
ts
Mainprogram
..
.
2000 Move PARAM2, – (SP) Placeparametersonstack.
2004 Move PARAM1, – (SP)
2008 Call SUB1
2012 Move (SP),RESULT Storeresult.
2016 Add #8,SP Restorestacklevel.
2020 nextinstruction
..
.
Firstsubroutine
2100 SUB1 Move FP,– (SP) Saveframepointerregister.
2104 Move SP,FP Loadtheframepointer.
2108 MoveMultiple R0– R3,– (SP) Saveregisters.
2112 Move 8(FP),R0 Get firstparameter.
Move 12(FP),R1 Getsecond parameter.
..
.
Move PARAM3, – (SP) Placeaparameter
onstack.
2160 Call SUB2
2164 Move (SP)+,R2 Pop SUB2resultinto R2.
..
.
Move R3,8(FP) Placeansweronstack.
MoveMultiple (SP)+,R0– R3 Restoreregisters.
Move (SP)+,FP Restoreframepointerregister.
Return Returnto Mainprogram.
Secondsubroutine
3000 SUB2 Move FP,– (SP) Saveframepointerregister.
Move SP,FP Loadtheframepointer.
MoveMultiple R0– R1,– (SP) SaveregistersR0and R1.
Move 8(FP),R0 Get theparameter.
..
.
Move R1,8(FP) PlaceSUB2resultonstack.
MoveMultiple (SP)+,R0– R1 RestoreregistersR0and R1.
Move (SP)+,FP Restoreframepointerregister.
Return ReturntoSubroutine1.

Figure 2.28. Nested subroutines.

Stack Frames for Nested
Subroutines
[R1] from SUB1
[R0] from SUB1 Stack
frame
FP [FP] from SUB1 for
second
2164 subroutine
param3
[R3] from Main
[R2] from Main
[R1] from Main
Stack
[R0] from Main frame
for
FP [FP] from Main first
subroutine
2012
param1
param2
Old TOS

Figure 2.29.  Stack frames for Figure 2.28.
 Additional
Instructions
Logic Instructions
 AND
 OR
 NOT (what’s the purpose of the following)
Not R0
Add #1, R0
 Determine if the leftmost character of the four ASCII
characters stored in the 32-bit register R0 is Z
(01011010)
And #$FF000000, R0
Compare #$5A000000, R0
Branch=0 YES
Logical Shifts
 Logical shift – shifting left (LShiftL) and shifting right
(LShiftR)
C R0 0

before: 0 0 1 1 1 0 . . . 0 1 1

after: 1 1 1 0 . . . 0 1 1 0 0

(a) Logical shift left LShiftL    #2,R0

0 R0 C

before: 0 1 1 1 0 . . . 0 1 1 0

after: 0 0 0 1 1 1 0 . . . 0 1

(b) Logical shift right LShiftR   #2,R0
Logical Shifts
 Two decimal digits represented in ASCII code are
located at LOC and LOC+1. Pack these two digits in
a single byte location PACKED.

Move #LOC,R0 R0pointstodata.

MoveByte (R0)+,R1 Loadfirst byte into R1.
LShiftL #4,R1 Shiftleft by 4bit positions.
MoveByte (R0),R2 Loadsecondbyte into R2.
And #$F,R2 Eliminatehigh-orderbits.
Or R1,R2 Concatenate theBCD digits.
MoveByte R2,PACKED Storetheresult.

Figure 2.31. A routine that packs two BCD digits.

Arithmetic Shifts

R0 C

before: 1 0 0 1 1 . . . 0 1 0 0

after: 1 1 1 0 0 1 1 . . . 0 1

(c) Arithmetic shift right AShiftR   #2,R0
 C R0

before: 0 0 1 1 1 0 . . . 0 1 1

Rotate after: 1 1 1 0 . . . 0 1 1 0 1

(a) Rotate left without carr
y RotateL    #2,R0

C R0

before: 0 0 1 1 1 0 . . . 0 1 1

after: 1 1 1 0 . . . 0 1 1 0 0

(b) Rotate left with carr
y RotateLC   #2,R0

R0 C

before: 0 1 1 1 0 . . . 0 1 1 0

after: 1 1 0 1 1 1 0 . . . 0 1

(c) Rotate right without carry RotateR   #2,R0

R0 C

before: 0 1 1 1 0 . . . 0 1 1 0

after: 1 0 0 1 1 1 0 . . . 0 1

(d) Rotate right with carry RotateRC   #2,R0

Figure 2.32.  Rotate instructions.
Multiplication and Division
 Not very popular (especially division)
 Multiply R , R
i j
Rj ← [Ri] х [Rj]
 Any problem?
 Divide R , R
i j
Rj ← [Ri] / [Rj]
Example Programs
Vector Dot Product Program
n −1
Dot Product = ∑ A(i ) × B (i )
i =0

Move #AVEC,R1 R1 pointstovectorA.

Move #BVEC,R2 R2 pointsto vectorB.
Move N,R3 R3 serves asacoun ter.
Clear R0 R0accum ulatesthedotproduct.
LOOP Move (R1)+,R4 Computetheproductof
Multiply (R2)+,R4 nextcomponents.
Add R4,R0 Add toprevioussum.
Decrement R3 Decrementthecounter.
Branch >0 LOOP Loopagainif notdone.
Move R0,DOTPROD Storedotproductinmemory.

Figure 2.33. A program for computing the dot product of two vectors.
Byte-Sorting Program
 Sort a list of bytes stored in memory into
ascending alphabetic order.
 The list consists of n bytes, not necessarily
distinct, stored from memory location LIST to
LIST+n-1. Each byte contains the ASCII code
for a character from A to Z. The first bit is 0.
 Straight-selection algorithm (compare and
swap)
Byte-Sorting Program
for (j = n– 1; j > 0; j = j – 1)
{ for ( k = j – 1; k>= 0; k = k – 1 )
{ if (LIST[k] > LIST[ j])
{ TEMP = LIST[k];
LIST[k] = LIST[ j];
LIST[ j] = TEMP;
}
}
}

(a) C-language program for sorting

Move #LIST,R0 LoadLIST into baseregisterR0.

Move N,R1 Initializeouterloopindex
Subtract #1,R1 registerR1to j = n – 1.
OUTER Move R1,R2 Initializeinnerloopindex
Subtract #1,R1 registerR2to k = j – 1.
MoveByte (R0,R1),R3 LoadLIST( j ) into R3,which holds
currentmaxim uminsublist.
INNER CompareByte R3,(R0,R2) ≤
If LIST(k) [R3],
Branch≤ 0 NEXT donotexhange.
MoveByte (R0,R2),R4 Otherwise, exchangeLIST(k)
MoveByte R3,(R0,R2) with LIST(j ) andload
MoveByte R4,(R0,R1) newmaxim uminto R3.
MoveByte R4,R3 RegisterR4 servesas TEMP.
NEXT Decremen t R2 Decremen t indexregistersR2and
Branch ≥ 0 INNER R1,which alsoserve
Decremen t R1 asloopcounters,andbranch
Branch>0 OUTER back if loopsnotfinished.

(b) Assembly language program for sorting

Byte-Sorting Program
 The list must have at least two elements
because the check for loop termination is
done at the end of each loop.
 If the machine instruction set allows a move
operation from one memory location directly
to another memory location:
MoveByte (R0, R2), (R0, R1)
MoveByte R3, (R0, R2)
MoveByte (R0, R1), R3
Linked List
 Many nonnumeric application programs
require that an ordered list of information
items be represented and stored in memory
in such a way that it is easy to add items to
the list or to delete items from the list at ANY
position while maintaining the desired order
of items.
 Different from Stacks or Queues.
Problem Illustration
N n
 Maintain this list of Student ID
LIST
records in consecutive
memory locations in LIST + 4 Test 1
some contiguous Student 1
LIST + 8 Test 2
block of memory in
increasing order of LIST + 12 Test 3
student ID numbers.
LIST + 16 Student ID
 What if a student
withdraws from the Test 1
course so that an Student 2
Test 2
empty record slot is
created? Test 3
 What if another
student registers in •
the course? •
•
Linked List
 Each record still occupies a consecutive four-word block in the memory.
 But successive records in the order do not necessarily occupy
consecutive blocks in the memory address space.
 Each record contains an address value in a one-word link field that
specifies the location of the next record in order to enable connecting
the blocks together to form the ordered list.
Link address

Record 1 Record 2 Record k 0

Head Tail
(a) Linking structure

Record 1 Record 2

New record
(b) Inserting a new record between Record 1 and Record 2
List in Memory Memory Key Link Data
address field field field
(ID) (Test scores)
1 word 1 word 3 words
First
record 2320 27243 1040 Head
Head pointer

Second
record 1040 28106 1200

Third
record 1200 28370 2880

•
•
•

Second last
record 2720 40632 1280

Last
1280 47871 0 Tail
record

Figure 2.36.  A list of student test scores organized as a linked list in memory.
Insertion of a New Record
 Suppose that the INSERTION Compare #0, RHEAD
ID number of the
new record is Branch>0 HEAD new record
Move RNEWREC, RHEAD becomes a
28241, and the not empty one­entry list
next available Return
free record block HEAD Compare (RHEAD), (RNEWREC)
is at address Branch>0 SEARCH
Move RHEAD, 4(RNEWREC) new record
2960. insert new record becomes
somewhere after Move RNEWREC, RHEAD new head
 What are the current head Return
possibilities of the
SEARCH Move RHEAD, RCURRENT
new record’s
LOOP Move 4(RCURRENT), RNEXT
position in the list.
Compare #0, RNEXT
Branch=0 TAIL
ne w record becomes ne
w tail Compare (RNEXT), (RNEWREC)
Branch<0 INSERT
insert new record in Move RNEXT, RCURRENT
an interior position Branch LOOP
INSERT Move RNEXT, 4(RNEWREC)
TAIL Move RNEWREC, 4(RCURRENT)
Return
Deletion of a Record
DELETION Compare  (RHEAD), RIDNUM
Branch>0 SEARCH
Move 4(RHEAD), RHEAD
not the head record
Return
SEARCH Move RHEAD, RCURRENT
LOOP Move 4(RCURRENT), RNEXT
Compare (RNEXT), RIDNUM
Branch=0 DELETE
Move RNEXT , RCURRENT
Branch LOOP
DELETE Move 4(RNEXT), RTEMP
Move RTEMP , 4(RCURRENT)
Return

Figure 2.38. A subroutine for deleting a record from a linked list. Any problem?

Encoding of Machine
Instructions
Encoding of Machine
Instructions
 Assembly language program needs to be converted into machine
instructions. (ADD = 0100 in ARM instruction set)
 In the previous section, an assumption was made that all
instructions are one word in length.
 Suppose 32-bit word length, 8-bit OP code (how many
instructions can we have?), 16 registers in total (how many
bits?), 3-bit addressing mode indicator.
 Add R1, R2
8 7 7 10
 Move 24(R0), R5
 LshiftR #2, R0 OP code Source Dest Other info
 Move #$3A, R1
 Branch>0 LOOP (a) One­word instruction
Encoding of Machine
Instructions
 What happens if we want to specify a memory
operand using the Absolute addressing mode?
 Move R2, LOC
 14-bit for LOC – insufficient
 Solution – use two words

OP code Source Dest Other info

Memory address/Immediate operand

(b) Two­word instruction
Encoding of Machine
Instructions
 Then what if an instruction in which two operands
can be specified using the Absolute addressing
mode?
 Move LOC1, LOC2
 Solution – use two additional words
 This approach results in instructions of variable
length. Complex instructions can be implemented,
closely resembling operations in high-level
programming languages – Complex Instruction Set
Computer (CISC)
Encoding of Machine
Instructions
 If we insist that all instructions must fit into a single
32-bit word, it is not possible to provide a 32-bit
address or a 32-bit immediate operand within the
instruction.
 It is still possible to define a highly functional
instruction set, which makes extensive use of the
processor registers.
 Add R1, R2 ----- yes
 Add LOC, R2 ----- no
 Add (R3), R2 ----- yes
Encoding of Machine
Instructions
 How to load a 32-bit address into a register that
serves as a pointer to memory locations?
 Solution #1 – direct the assembler to place the
desired address in a word location in a data area
close to the program, so that the Relative
addressing mode can be used to load the address.
 Solution #2 – use logical and shift instructions to
construct the desired 32-bit address by giving it in
parts that are small enough to be specifiable using
the Immediate addressing mode.
Encoding of Machine
Instructions
 An instruction must occupy only one word –
Reduced Instruction Set Computer (RISC)
 Other restrictions

OP code Ri Rj Rk Other info

(c) Three­operand instruction