12 Memory 3
12 Memory 3
Cache Mapping
Problems
Problem 1
3
Problem 1-- Solution
Step-1:
You have to find the block size first.
1 block = 16 bytes
Step-2:
Then find the memory block number that byte address 1200 belongs to.
Since 1 block is 16 bytes,
byte address 0 ~ 15 : block 0
16 ~ 31: block 1
32~ 47: block 2
…
Therefore,
floor (byte address / block size) = memory block # 4
Problem 1-- Solution
So floor( 1200/16) = 75.
Step 3:
Then you need to find which cache block memory block 75 maps to.
In a direct-mapped cache,
cache block # = memory block # mod (total block number of cache)
Therefore, 75 mod 64 = 11.
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Problem 2
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Problem 2-- Solution
Step 1:
Since the cache is 2-way set associative, a set has 2 cache blocks. Because there
are 64 cache blocks, there are 32 sets in the cache (set 0 ~ set 31).
Step 2:
Byte address 1200 belongs to memory block 75.
Then
set # = memory block # mod (total sets in the cache).
Therefore, 75 mod 32 = 11.
So memory block 75 maps to set 11 in the cache (cache block 22 and 23) and
chooses one of them. How to choose one of them is a very long story.
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Problem 3
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Problem 3-- SOLUTION
For Direct Mapped Cache
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Problem 3-- SOLUTION
For 4-way set associative Cache
Number of index bits = 0 because any block can be stored in any line
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Problem 4
Caches are important to providing a high-performance memory
hierarchy to processors. Below is a list of 32-bit memory address
reference, given as word addresses
21, 166, 201, 143, 61, 166, 62, 133, 111,143, 144, 61
What will be the final cache contents for a Fully associative cache with one word
blocks and a total size of 6 blocks?
Use LRU replacement. For each reference identify the index bits, the tag bits, the
block offset bits, and if it is a hit or a miss
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Problem 4-- SOLUTION
Caches are important to providing a high-performance memory hierarchy
to processors. Below is a list of 32-bit memory address reference, given
as word addresses
21, 166, 201, 143, 61, 166, 62, 133, 111,143, 144, 61
0 21,62 MM
1 166,133 MM
2 201,111 MM
3 143 MH
4 61,144 MM
5 166,61 MM
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Problem 5
Caches are important to providing a high-performance memory hierarchy to processors.
Below is a list of 32-bit memory address reference, given as word addresses
21, 166, 201, 143, 61, 166, 62, 133, 111,143, 144, 61
What will be the final cache contents for a Direct Mapped cache with two word
blocks and a total size of 24 blocks?
Use LRU replacement. For each reference identify the index bits, the tag bits,
the block offset bits, and if it is a hit or a miss
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Problem 5--SOLUTION
What will be the final cache contents for a Direct Mapped cache with
two word blocks and a total size of 24 blocks?
21, 166, 201, 143, 61, 166, 62, 133, 111,143, 144, 61
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