Lect1 Crystal Defects

IC Technology
Books:
** The Science and Engineering of Microelectronic Fabrication Stephen A. Campbell VLSI Technology - S.M.Sze VLSI Fabrication Principles - Sorab K. Gandhi
Lecture # 1
IC Technology Ms. Neha Singh
Syllabus- 7EC4 IC TECHNOLOGY

UNIT1:INTRODUCTION TO TECHNOLOGIES- Semiconductor Substrate-Crystal defects, Electronic Grade Silicon, Czochralski Growth, Float Zone Growth, Characterization & evaluation of Crystals; Wafer Preparation- Silicon Shaping, Etching and Polishing, Chemical cleaning. UNIT2:DIFFUSION & ION IMPLANTATION- Ficks diffusion Equation in One Dimension, Atomic model, Analytic Solution of Ficks Law, correction to simple theory , Diffusion in SiO2. Ion Implantation and Ion Implantation Systems Oxidation. Growth mechanism and Deal-Grove Model of oxidation, Linear and Parabolic Rate co-efficient, Structure of SiO2, Oxidation techniques and system, Oxide properties. UNIT3:CHEMICAL VAPOUR DEPOSITION AND LAYER GROWTH- CVD for deposition of dielectric and polysilicon a simple CVD system, Chemical equilibrium and the law of mass action, Introduction to atmospheric CVD of dielectric, low pressure CVD of dielectric and semiconductor. Epitaxy-Vapour Phase Expitaxy, Defects in Epitaxial growth, Metal Organic Chemical Vapor Deposition, Molecular beam epitaxy. UNIT4:PATTERN TRANSFER- Introduction to photo/optical lithography, Contact/ proximity printers, Projection printers, Mask generation, photoresists. Wet etching, Plasma etching, Reaction ion etching. UNIT5:VLSI PROCESS INTEGRATION- Junction and Oxide Isolation, LOCOS methods, Trench Isolation, SOI; Metallization, Planarization. Fundamental consideration for IC Processing, NMOS IC Technology, CMOS IC Technology, Bipolar IC Technology.
IC Technology Ms. Neha Singh 2
Integrated Circuit (IC) Technology
Objectives
After the class, you will be able to: 1. Understand semiconductor manufacturing process. 2. Explain the crystal structure and the major defects in silicon crystal.
Semiconductor Manufacturing Processes

Design Wafer Preparation Front-end Processes Photolithography Etch Cleaning Thin Films Ion Implantation Planarization Test and Assembly
IC Technology Ms. Neha Singh Wafer Preparation Design Thin Films Front-End Processes
Photolithography
Ion Implantation
Etch
Cleaning
Planarization
Test & Assembly
Design Process : VLSI Design

Wafer Preparation Design
Establish Design Rules Circuit Element Design Interconnect Routing Device Simulation Pattern Preparation
Thin Films
Front-End Processes
Photolithography
Ion Implantation
Etch
Cleaning
Planarization
Test & Assembly IC Technology Ms. Neha Singh 6
Wafer Preparation
Wafer Preparation Design
Polysilicon Refining Crystal Pulling Wafer Slicing & Polishing Epitaxial Silicon Deposition
Thin Films
Front-End Processes
Photolithography
Ion Implantation
Etch
Cleaning
Planarization
Test & Assembly 7
Wafer Diameter Trends
300 mm
200 mm 150 mm 125 mm
100 mm
75 mm
8
12
8
Increase in Number of Chips on Larger Wafer Diameter
88 die 200-mm wafer 232 die 300-mm wafer

Yield of a Wafer
Yield =
66 good die = 75% 88 total die
Reduction in defect density is a critical aspect for increasing wafer yield.
10
Basic Process Steps for Wafer Preparation
Crystal Growth
Wafer Lapping and Edge Grind
Cleaning
Shaping
Etching
Inspection
Wafer Slicing
Polishing
Packaging
11
Why Si?
Because:
No problem of decomposition as with compound semiconductors. Thus, with Ge, it can be subjected to variety of processing steps. Si has wider energy gap than Ge thus, can be used at higher temperatures. Si lends itself readily to surface passivation (formation of SiO2) treatment. But Si has indirect band-gap, so it is not suitable for applications like lasers, LEDs, photovoltaic devices etc.
Compound Semiconductor
Mostly used compound semiconductor: GaAs Properties of GaAs:
Higher electron mobility i.e. majority carriers are faster. Lower saturation field i.e. low power delay product. It can be made semi-insulating i.e. devices and interconnects made in the substrate have lower parasitic capacitances which increases the speed(3-4 times approx.). The lattice structure matches to that of AlAs (energy gap 2.16eV) so ternary alloys AlxGa1-xAs are formed easily with a wide range of composition (energy gaps). Thus, AlGaAs compounds are used for heterostructure devices such as Lasers.
Crystal Structure
Amorphous Materials Unit Cells Polycrystal and Monocrystal Structures Crystal Orientation
14
Atomic Order of a Crystal Structure
15
Amorphous Atomic Structure
16
Unit Cell in simple cubic (SC) 3-D Structure

Very few crystals exhibit this structure. Eg: Polonium (for a narrow range of temperature)
Unit cell
Faced-centered Cubic (FCC) Unit Cell

This structure is exhibited by a large number of elements. Eg: copper, gold, nickel, platinum and silver.
Body-centered Cubic (BCC) Unit Cell

Eg: Molybdenum, tantalum and tungsten.
18
Silicon Unit Cell: FCC Diamond Structure or Zincblende or Sphalerite Structure
19
Polycrystalline and Monocrystalline Structures
Polycrystalline structure
Monocrystalline structure
20
Axes of Orientation for Unit Cells

Z
1
1
Coordinates for Zincblende cubic structure

Coordination number (number of neighboring atoms) is 4. Distance between two neighboring atoms is (3/4)a, where a is lattice constant. For Si a=2.351 angstrom.
(1/4,1/4,1/4)
(1/4,/4,1/4) 22
Miller Indices of Crystal Planes
Y X (100) X (110)
Y X (111)
23
Crystal Orientation
The processing characteristics and some material properties of silicon wafers depend on its orientation. The <111> planes have the highest density of atoms on the surface, so crystals grow most easily on these planes and oxidation occurs at a higher pace when compared to other crystal planes. Traditionally, bipolar devices are fabricated in <111> oriented crystals whereas <100> materials are preferred for MOS devices.
Crystal Defects in Silicon

A crystal defect (microdefect) is any interruption in the repetitive nature of the unit cell crystal structure. These may occur during manufacturing process. Three general types of crystal defects in silicon: 1. Point defects - Localized crystal defect at the atomic level 2. Dislocations - Displaced unit cells 3. Planar or - Defects in crystal structure area defects
Point Defects
26
Dislocations in Unit Cells
27
Dislocation Movement
Dislocation moves along slip plane.
Climb of an edge dislocation

Planer Defects : Twins and Grain boundaries
Twinning
29

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IC Technology

IC Technology Ms. Neha Singh

Syllabus- 7EC4 IC TECHNOLOGY

Integrated Circuit (IC) Technology

IC Technology Ms. Neha Singh

IC Technology Ms. Neha Singh

Semiconductor Manufacturing Processes

Test & Assembly

Design Process : VLSI Design

Test & Assembly IC Technology Ms. Neha Singh 6

IC Technology Ms. Neha Singh

Test & Assembly 7

Wafer Diameter Trends

200 mm 150 mm 125 mm

Increase in Number of Chips on Larger Wafer Diameter

88 die 200-mm wafer 232 die 300-mm wafer

66 good die = 75% 88 total die

Reduction in defect density is a critical aspect for increasing wafer yield.

IC Technology Ms. Neha Singh

Basic Process Steps for Wafer Preparation

Wafer Lapping and Edge Grind

IC Technology Ms. Neha Singh

IC Technology Ms. Neha Singh

Atomic Order of a Crystal Structure

IC Technology Ms. Neha Singh

Amorphous Atomic Structure

IC Technology Ms. Neha Singh

Unit Cell in simple cubic (SC) 3-D Structure

Faced-centered Cubic (FCC) Unit Cell

Body-centered Cubic (BCC) Unit Cell

IC Technology Ms. Neha Singh

Silicon Unit Cell: FCC Diamond Structure or Zincblende or Sphalerite Structure

IC Technology Ms. Neha Singh

Polycrystalline and Monocrystalline Structures

IC Technology Ms. Neha Singh

Axes of Orientation for Unit Cells

Coordinates for Zincblende cubic structure

Miller Indices of Crystal Planes

IC Technology Ms. Neha Singh

Crystal Defects in Silicon

IC Technology Ms. Neha Singh

Dislocations in Unit Cells

IC Technology Ms. Neha Singh

Dislocation moves along slip plane.

Climb of an edge dislocation

Planer Defects : Twins and Grain boundaries

IC Technology Ms. Neha Singh

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