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Atmega

The AVR microcontroller was developed by Atmel in 1996. It uses a Harvard architecture with separate program and data buses. It has flash memory to store programs, SRAM for data, and EEPROM for long-term storage. AVRs come in various sizes for different applications and have a RISC CPU, timers, analog comparators and other peripherals. Interrupts allow the microcontroller to pause the main program to service events.

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0% found this document useful (0 votes)
33 views22 pages

Atmega

The AVR microcontroller was developed by Atmel in 1996. It uses a Harvard architecture with separate program and data buses. It has flash memory to store programs, SRAM for data, and EEPROM for long-term storage. AVRs come in various sizes for different applications and have a RISC CPU, timers, analog comparators and other peripherals. Interrupts allow the microcontroller to pause the main program to service events.

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Atmel

Intro..
• AVR microcontroller was developed in the year of 1996 by
Atmel Corporation.
• The structural design of AVR was developed by the Alf-Egil
Bogen and Vegard Wollan.
• AVR microcontrollers are very popular, used in numerous
applications, particularly in project prototyping and also in
embedded devices.
• This microcontroller is an 8-bit RISC (Reduced Instruction
Set Computing) architecture microcontroller in the market
since 1996 which is having SRAM, on-chip programmable
flash memory, IO data space, and the EEPROM.
• AVR Microcontrollers are Available in three
Categories
– Tiny AVR:- Less memory, small size,
appropriate just for simpler applications
– Mega AVR:- These are the mainly popular ones
having a good quantity of memory (up to 256
KB), higher number of inbuilt peripherals and
appropriate for modest to complex
applications.
– Xmega AVR:- Used in commercial for complex
applications, which need large program
memory and high speed.
CPU
• The main purpose of the CPU is to confirm correct program
performance.
• Therefore, the CPU must be able to access perform calculations,
memories, control peripherals & handle interrupts.
• The CPUs of Atmel’s 8-bit and 32-bit AVR are based on an
innovative “Harvard architecture” thus every IC has two buses
namely one instruction bus and data bus.
• The CPU reads executable instructions in instruction bus, wherein
the data bus, is to read or write the corresponding data.
• The CPU core of the AVR consists of the ALU, General Purpose
Registers, Program Counter, Instruction Register, Instruction
Decoder, Status Register and Stack Pointer.
Flash Program Memory
• The program of the AVR microcontroller is stored in non-
volatile programmable Flash program memory which is just
similar to the flash storage in your SD Card or Mp3 Player.
• The Flash program memory is separated into two units.
• The first unit is the Application Flash section.
• It is where the program of the AVR is stored.
• The second section is named as the Boot Flash section and can
be fixed to perform directly when the device is powered up.
• One significant fact to note is that the microcontrollers Flash
program memory has a resolution of at least 10,000
writes/erase cycles.
SRAM
• The SRAM (Static Random Access Memory) of
the AVR microcontroller is just like computer
RAM.
• While the registers are used to execute
calculations, the SRAM is used to supply data
through the runtime.
• This volatile memory is prearranged in 8-bit
registers.
EEPROM
• The term EEPROM stands for Electronically Erasable
Read-Only Memory is like a nonvolatile memory, but you
can’t run a program from it, but it is used as long time
storage.
• It’s a great place for storing data like device parameters
and configuration of the system at runtime so that it can
continue between resets of the application processor.
• One significant fact to note is that the EEPROM memory
of the AVR has a limited lifetime of 100,000 writes /
EEPROM page – reads are limitless.
Instruction set
• There are two types of conditional branches:
jumps to address and skips.
• Conditional branches (BRxx) can test an ALU
flag and jump to specified address.
Interrupt Unit
– Interrupts have enabled the microcontroller to
monitor particular events in the background while
performing and application program & respond to
the occurrence if required pausing the unique
program.
– This is all synchronized by the interrupt Unit.
Timer
– Most AVR microcontrollers have at least one Timer
or Counter module which is used to achieve timing
or counting operations in the microcontroller.
– These comprise time stamping, counting events,
measuring intervals, etc.
Timer and counter
• ATmega8 comes with two 8-bit and one 16-bit timer.
• This means that there are 3 sets of timers, each with the ability to count at
different rates.
• The two 8-bit counters can count to 255 even as the 16- bit counter can
count to 65,536.
– TCCR0: (Timer/Counter Control Register)
• In this register (used to configure the timer), there are 8 bits, but only last 3 bits CS02,CS01 and
CS00 are used. These are CLOCK SELECT bits used to setup the prescaler
– TCNT0: (Timer/Counter Register)
• This is the real counter in the TIMER0 counter. The timer clock counts this register as 1, ie the
timer clock increases the value of this 8 bit register by 1 with every timer clock pulse. The timer
clock can be defined by the TCCRO register
– TIMSK0: (Timer/Counter Interrupt Mask Register)
• This register, used to activate/deactivate the INTERRUPTS related to timers,controls the
interrupts of all three timers.
• BIT0 (first bit from the right) controls the the overflow interrupts of TIMER0.
Interrupts
• Interrupts are basically events that require immediate attention by the microcontroller.
• When an interrupt event occurs the microcontroller pause its current task and attend to
the interrupt by executing an Interrupt Service Routine (ISR) at the end of the ISR the
microcontroller returns to the task it had pause and continue its normal operations.
• In order for the microcontroller to respond to an interrupt event the interrupt feature of
the microcontroller must be enabled along with the specific interrupt.
• This is done by setting the Global Interrupt Enabled bit and the Interrupt Enable bit of
the specific interrupt.

• Interrupt Service Routine or Interrupt Handler

– An Interrupt Service Routine (ISR) or Interrupt Handler is a piece of code that should be execute
when an interrupt is triggered.
– Usually each enabled interrupt has its own ISR. In AVR assembly language each ISR MUST end with
the RETI instruction which indicates the end of the ISR.
• Interrupt Flags and Enabled bits
Each interrupt is associated with two (2) bits, an
Interrupt Flag Bit and an Interrupt Enabled Bit.
These bits are located in the I/O registers
associated with the specific interrupt:
• The interrupt flag bit is set whenever the interrupt
event occur, whether or not the interrupt is
enabled.
• The interrupt enabled bit is used to enable or
disable a specific interrupt. Basically it tells the
microcontroller whether or not it should respond
to the interrupt if it is triggered.
• Global Interrupt Enabled Bit
– Apart from the enabled bits for the specific
interrupts the global interrupt enabled bit MUST
be enabled for interrupts to be activated in the
microcontoller.
– For the AVR 8-bits microcontroller this bit is
located in the Status I/O Register (SREG). The
Global Interrupt Enabled is bit 7, the I bit, in the
SREG.
• The AVR 8-bits microcontroller provide both
internal and external interrupt sources. The internal
interrupts are associated with the microcontroller's
peripherals.
• That is the Timer/Counter, Analog Comparator, etc.
The external interrupts are triggered via external
pins.
• The figure below shows the pins, on which the
external interrupts can be triggered, for an AVR 8-
bit microcontroller.
• On this microcontroller there are four (4) external
interrupts:
• Pin -1 is the RST (Reset) pin and applying a low level signal for a time longer than the minimum
pulse length will produce a RESET.
• Pin-2 and pin-3 are used in USART for serial communication
• Pin-4 and pin-5 are used as an external interrupt. One of them will activate when an interrupt
flag bit of the status register is set and the other will activate as long as the intrude condition
succeeds.
• Pin-9 & pin-10 are used as a timer counters oscillators as well as an external oscillator where
the crystal is associated directly with the two pins. Pin-10 is used for low-frequency crystal
oscillator or crystal oscillator. If the internal adjusted RC oscillator is used as the CLK source &
the asynchronous timer is allowed, these pins can be utilized as a timer oscillator pin.
• Pin-19 is used as a Master CLK o/p, slave CLK i/p for the SPI-channel.
• Pin-18 is used as Master CLK i/p, slave CLK o/p.
• Pin-17 is used as Master data o/p, slave data i/p for the SPI-channel. It is used as an i/p when
empowered by a slave & is bidirectional when allowed by the master. This pin can also be
utilized as an o/p compare with match o/p, which helps as an external o/p for the
timer/counter.
• Pin-16 is used as a slave choice i/p. It can also be used as a timer or counter1 comparatively by
arranging the PB2-pin as an o/p.
• Pin-15 can be used as an external o/p of the timer or counter compare match A.
• Pin-23 to Pins28 have used for ADC (digital value of analog input) channels. Pin-27 can also be
used as a serial interface CLK & pin-28 can be used as a serial interface data
• Pin-12 and pin-13 are used as an Analog Comparator i/ps.
• Pin-6 and pin-11 are used as timer/counter sources.
• http://www.efxkits.com/blog/tutorial-avr-micr
ocontroller-architecture/
• http://download.mikroe.com/documents/co
mpilers/mikroc/avr/help/avr_memory_organ
ization.htm
• http://www.electroschematics.com/9846/
avr-8-16-bit-timers-counters/

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