Module-1

Microcontroller and Embedded Systems

18CS44

Prepared By:

Aruna Kumar B T,
Assistant Professor, CSE, GMIT,DAVANAGERE

Email: [email protected]
Website: https://sites.google.com/a/gmit.ac.in/18cs44/notes_ppt
ARM Microprocessor Basics
ARM: Advance RISC Machine.

ARM was established as a joint venture between Acorn, Apple and

VLSI in November 1990.

ARM is the industry's leading provider of 16/32-bit embedded

RISC microprocessor solutions.

The company licenses its high-performance, low-cost, power-

designs to leading international electronics companies.

ARM provides comprehensive support required in developing a

complete system.
 ARM Embedded
Systems
 The ARM processor is a key component of many successful 32-bit
embedded systems.

 You probably own one yourself and may not even realize it!

 ARM cores are widely used in mobile phones, handheld devices,

and a many other everyday portable consumer devices.

 The first ARM prototype name ARM1 was designed in 1985 and
continues to improve through constant technical innovation
leading to ARM2, ARM3, ARM4, ARM5, ARM6, ARM7, ARM8,
ARM9… ARM Cortex.
 Approximately one billion ARM processors had been shipped worldwide
by the end of 2001.

 Now, ARM sales is 7 times more than the worlds population.

 The ARM core is not a single core, but a whole family of designs sharing
similar design principles and a common instruction set.

 Example, ARM7TDMI is one of the most successful ARM core widely used
in majority of the devices.

 It provides up to 120 Dhrystone MIPS, high code density and low power
consumption, making it ideal for mobile embedded devices.

 ARM has adopted the RICS design philosophy.

ARM Holdings is a technology company headquartered in
Cambridge, England, UK. The company is best known for its
processors, although it also designs, licenses and sells software
development tools under the RealView and KEIL brands, systems
and platforms, system-on-a-chip infrastructure and software.

ARM do not make ICs !!!

ARM grant license of core to different silicon vendors like

ATMEL, NXP, Cirrus logic etc.. These companies make IC’S.
Examples are: LPC2148 from NXP, AT91RM9200 from ATMEL.

ARM processors can be used in any domain

Mainly ARM processors are used in Handheld devices, Robotics,

Automation, Consumer Electronics.

ARM processors are available for almost every domain.

 ARM Based Products

Apple iPhone ARM11 Motorola Z8 Smart phone

ARM11
Blackberry ARM11 Nokia E90
Communicator ARM11
 Juice Box
iPOD ARM7TDMI Low cost Multimedia
player ARM7TDMI
 Paison Series game
Lego Mindstrome
consoles ARM7TDMI
Robot ARM7
 The RISC design philosophy
 The ARM processors uses a RISC architecture.

 RICS-Reduced Instruction Set Computing

Instructions:
 RISC is a design philosophy aims to provide few simple but
powerful instructions that execute within a single clock cycle.

 The RISC philosophy aims to reduce the complexity of

instructions performed by the hardware because it is easier to
provide greater flexibility and intelligence in software rather than
hardware.

 RISC design places greater burden/load on the compiler.

 Traditional complex instruction set computer (CISC) relies more

on the hardware (processor) for instruction functionality, as CISC
instructions are more complicated.
Pipelining:
 Instruction execution is done in pipelined fashion

 Ideal pipeline stage clock cycle is 1 to have maximum

throughput.

Instructions are executed in pipeline stages.

ARM7 is a 3 stage pipelined processor

First stage – fetches the instruction

Second Stage - Decodes the instruction and fetches
the operands
Third Stage - Executes the instruction and stores
the result
Registers:
 RISC machines have a large general-purpose register set.

 Any register can contain either data or an address.

 Registers act as the fast local memory store for all data
processing operations.

 In contrast, CISC processors have dedicated registers for

specific purposes.
Load-store architecture:
 Processor operates only on data held in registers.

 Separate load and store instructions transfer data

between the register bank and external memory.

 Memory accesses are costly, so separating memory

accesses from data processing provides an advantage
because you can use data items held in the register bank
multiple times without needing multiple memory accesses.

 In contrast, with a CISC design the data processing

operations can act on memory directly.
These RICS design rules allow a RISC processor to be
simpler, and thus the core can operate at higher clock
frequencies.

 In contrast, traditional CISC processors are more complex

and operate at lower clock frequencies.

Over the course of two decades, however, the distinction

between RISC and CISC has blurred as CISC processors have
implemented more RISC concepts.
 RISC : Reduced Instruction Set Computing
 Lesser number of fixed length instructions.
 Fewer addressing modes.
 Increased pipelining and increased execution speed.
 Orthogonal instruction set(Allows each instruction to operate on
any register and use any addressing mode).
 Operations are performed on registers only. Memory operations are
load and store. (Load Store Architecture).
 A large number of register are available.
 Programmer needs to write more code to execute a task since the
instructions are simpler once.
 Instruction take one clock cycle. The average clock cycle per
instruction (CPI) is 1.5.
 The ARM Design Philosophy

RICS features accepted by ARM

 A large set of uniform register file

 A load store architecture

 Uniform and fixed length (32-bit) instruction fields

 Three address instruction formats

 The ARM Design Philosophy

RICS features rejected by ARM

 Register windows – because they occupy large chip area.

 Delayed Branches

 Single cycle execution of all instructions.

Additional Features in ARM architecture

 Has control over both the ALU and the barrel shifter in
every data pre-processing instructions.

 Auto increment and auto decrement addressing modes to

optimize program loops.

 Load and store multiple instructions to maximize execution

throughput.

 Conditional execution of all instructions to maximize data

throughput.
 Instruction Set for Embedded System
The ARM instruction set differs from pure RISC
definition in several ways that make the ARM instruction set
suitable for embedded applications.

 Variable cycle execution for certain instruction

 Barrel shifter: Inline barrel shifter for more complex instructions.

 Conditional execution facility in majority of the instructions.

 Enhanced instruction – Enhanced DSP instructions were added

to the standard ARM instruction.

 Thumb state (16 bit- instruction set) – improves the code

density by 30% to 35% over 32-bit fixed length instructions
 Embedded System Hardware
Embedded systems are designed to control many different devices,

-- from small sensors found on a production line, to

-- the real-time control systems used on a NASA space probe.

All these devices use a combination of software and hardware

components.

Each component is designed to provide higher efficiency and, is

designed for future extension and expansion.
An example of an ARM-based Embedded Device, a
Microcontroller
Boxes represent-
feature or function

Lines represent –
Busses connecting
the devices

Divided into 4
Major components
-ARM processor
-Controllers
-Peripherals
-Bus

AHB – ARM High performance Bus

APB - ARM Peripheral Bus
ARM Processor

Controls the embedded device.

Different versions of the ARM processor are available to suit the

desired operating characteristics.

An ARM processor comprises

- a core (the execution engine that processes instructions and

manipulates data)

plus

- the surrounding components that interface it with a bus

(include memory management and caches.)
Controllers

Helps coordinate important functional blocks of the

system.

Two commonly found controllers are

-interrupt controller and
-memory controllers.

Peripherals

Provides input-output capability external to the chip.

-includes serial I/O, Parallel I/O, Timers counters and clock
circuits

Responsible for the uniqueness of the embedded device.

Bus
Supports communicate between different parts of the device.
AHB, APB
 ARM Bus Technology
Embedded systems use different bus technologies than those
designed for x86 PCs.

PCs bus technology uses Peripheral Component

Interconnect (PCI) bus, to connect devices such as
- video cards and
-hard disk controllers to the x86 processor bus.

 This technology is external or off-chip (i.e., the bus is designed

to connect mechanically and electrically to devices external to the chip)
and is built into the motherboard of a PC.

Embedded devices use an on-chip bus that is internal to the chip

and that allows different peripheral devices to be interconnected with
an ARM core.
 ARM Bus Technology Cont..
There are two different classes of devices attached to the
ARM on chip bus.

- A bus master: a logical device capable of initiating a data transfer

with another device across the same bus. The ARM processor core is the
bus master.

- Bus slaves: logical devices capable only of responding to a transfer

request from a bus master device. All peripherals are bus slaves

On chip ARM bus has two architecture levels.

- Physical level covers the electrical characteristics and bus
width (16, 32, or 64 bits).
- Protocol level covers the logical rules that govern the
communication between the processor and a peripheral.

ARM is primarily a design company. It does not/rarely

implements the electrical characteristics of the bus, but it specifies the
bus protocol.
AMBA Bus Protocol
AMBA - Advanced Microcontroller Bus Architecture.

 Was introduced in 1996 and widely adopted as the on-chip bus

architecture used for ARM processors.
The first AMBA buses introduced were the
- ARM System Bus (ASB) and
- ARM Peripheral Bus (APB)

Later ARM introduced another bus design, called

-ARM High Performance Bus (AHB)

Using AMBA, peripheral designers can reuse the same

interface design on multiple projects.

A peripheral can simply be bolted onto the on-chip bus

without having to redesign an interface for each different processor
architecture.
AMBA Bus Protocol Cont…
AHB provides higher data throughput than ASB.
- Because AHB is based on a centralized multiplexed bus
scheme.
- ASB bidirectional bus design.

ARM has introduced two variations on the AHB bus:

-Multi-layer AHB and
-AHB-Lite.

The original AHB, was allowing a single bus master to be active on

the bus at any time, the Multi-layer AHB bus allows multiple
active bus masters.

AHB-Lite is a subset of the AHB bus and it is limited to a single

bus master.

 AHB-Lite was developed for designs that do not require the

full features of the standard AHB bus.
Memory
An embedded system requires some form of memory to store and
execute code.

The memory should be fast, large and inexpensive.

Unfortunately it is impossible to meet all the 3

requirements.

 The common solution is to have the memory hierarchy.

Memory Width
The memory width is the number of bits the memory
returns on each access which is typically 8, 16, 32, or 64 bits.

The memory width has a direct effect on the overall

performance of the system.

If you have a system using 32-bit ARM instructions and 16-
bit-wide memory chips, then the processor will have to make
two memory fetches per instruction.

This reduces the system performance, but the benefit is

that 16-bit memory is less expensive.

If the core executes 16-bit Thumb instructions, it will achieve

better performance with a 16-bit memory.
Table 1.1 summarizes theoretical cycle times on an ARM
processor using different memory width devices.
Memory Types

There are many different types of memory

- ROM
- Flash ROM
- Dynamic RAM
- Static RAM
- SDRAM – Synchronous Dynamic RAM

ROM- Read Only Memory

Least flexible of all memory types because it contains an image that

is permanently stored and cannot be reprogrammed.

Many devices use a ROM to hold boot code.

Flash ROM
Flash ROM can be read as well as written, but it is slow to
write so it is not used for holding dynamic data.

 It is mainly used for holding the device firmware or storing

long-term data that needs to be preserved after power is off.
The erasing and writing of flash ROM are completely software
controlled with no additional hardware circuitry required.

Dynamic Random Access Memory –DRAM

The most commonly used RAM for devices.

It has the lowest cost per megabyte compared with other types
of RAM.

DRAM is dynamic—it needs to have its storage cells refreshed

and given a new electronic charge every few milliseconds,
so you need to set up a DRAM controller before using the memory.
Static Random Access Memory – SRAM
Faster than the more traditional DRAM

SRAM is static—the RAM does not require refreshing.

The access time for SRAM is considerably shorter than the

equivalent DRAM because SRAM does not require a pause
between data accesses.

Synchronous Dynamic Random Access Memory –

SDRAM

SDRAM is synchronized with the processor clock speed.

SDRAM run at much higher clock speed than the conventional

DRAMs.
Peripherals

Embedded systems communicate with the outside world

via peripheral device.

 A peripheral device performs input and output functions for

the chip by connecting to other devices or sensors that are off-
chip.

 Peripherals range from

-a simple serial communication device to a
-more complex 802.11 wireless device.

 Two important types of controllers are

- memory controllers and
- interrupt controllers.
Memory Controller
Memory controller provides the following functionalities.

- Connects different types of memories to the processor bus.

- On power up the memory controller activates certain

memory devices to execute initialization code -ROM.

- It configures the memory timings and the refresh rate of the

DRAM before it is accessed.

Interrupt Controllers

When a peripheral or device requires processor attention, it sends an

interrupt to the processor.

There are two types of interrupt controller in the ARM processor:

- the standard interrupt controller (SIC)
- and the vector interrupt controller (VIC).
Standard Interrupt Controller (SIC)

It sends an interrupt signal to the processor core when an external

device requests servicing.

It can be programmed to ignore or mask an individual device

or set of devices interrupt signals.

The interrupt handler determines which device requires

servicing by reading a device bitmap register in the interrupt
controller.

Vectored Interrupt Controller (VIC)

Provides more functionality than the SIC.

Along with the masking functionality it also provides the

functionality to prioritize the interrupts.
Embedded System Software
An embedded system needs software to drive it.

Figure shows four typical software components required to

control an embedded device.
Initialization (Boot) Code
The initialization code is the first code executed on the board when
the device is powered on.

 It sets up the minimum parts of the board before handing control

over to the operating system.

Boot code is present inside the ROM and is responsible for loading
the OS to the RAM.

The initialization code handles 3 administrative tasks prior to

handing control over to an operating system image.

These administrative tasks can be grouped into three phases:

- initial hardware configuration,
- diagnostics, and
- booting.
Initial Hardware Configuration:

Although the device comes up in a standard configuration, this

initial hardware configuration normally requires modification to
satisfy the requirements of the booted image.

 For example, the memory system normally requires reorganization

of the memory map, as shown in below Example
Diagnostics

Diagnostics is a program embedded in the initialization code.

Diagnostic code tests the system by checking if the all the hardware
components is in working condition.

It also tracks down standard system-related issues.

 The primary purpose of diagnostic code is fault identification and

isolation.
Booting:

Booting involves loading an OS image to RAM and handing control

over to that image.

The boot process can be complicated if the system must boot

different operating systems or different versions of the same operating
system.

Once booted, the system hands over control by modifying the

program counter to point into the start of the OS image.

Sometimes, to reduce the image size, an image is compressed.

 The image is then decompressed either when it is loaded or when

control is handed over to it.
Operating System
The Initialization process prepares the hardware for an Operating
system to take control.

ARM Processor supports over 50 operating systems.

Operating system can be divided into two main categories.

- Real Time Operating System – RTOS
- Platform Operating System –POS

RTOS used in embedded devices and they don’t use the secondary
storage and POS used in the general purpose computer systems and
they use secondary storage

 RTOS is classified into.

- Hard Real Time Operating System – Used in hard real time
applications which requires the guaranteed response time.

- Soft Real Time Operating System – Used in soft real time

applications which does not require guaranteed response time and
the performance gracefully reduces when the time overruns
Applications:

ARM processors are found in numerous domains, including

networking, automotive, mobile and consumer devices, mass storage,
and imaging devices.

Within each domain ARM processors can be found in multiple

applications.

For example, the ARM processor is found in networking

applications like home gateways, modems for high-speed Internet
communication, and 802.11 wireless communication.

The mobile device domain is the largest application area for ARM
processors because of mobile phones.

ARM processors are also found in mass storage devices domains

such as hard drives, products such as inkjet printers
 ARM7TDMI Processor
The ARM7TDMI core is a member of the ARM family of general-
purpose 32-bit microprocessors.
– T: capable of executing Thumb instruction set
– D: Featuring with IEEE Std. 1149.1 JTAG boundary-scan debugging
interface.
– M: Featuring with a Multiplier-And-Accumulate (MAC) unit for DSP
applications.
– I: Featuring with the support of embedded In-Circuit Emulator.

The ARM family offers high performance for very low power
consumption, and small size.

The ARM architecture is based on Reduced Instruction Set

Computer (RISC)
SUMMARY:

It allows variable cycle execution on certain instructions to

save power, area, and code size.

 It adds a barrel shifter to expand the capability of certain

instructions.

 It uses the Thumb 16-bit instruction set to improve code density.

It improves code density and performance by conditionally

executing instructions.

 It includes enhanced instructions to perform digital signal

processing type functions.