0% found this document useful (0 votes)
47 views45 pages

Unit 4

Here are the answers to your questions: 1. To increase the drain current ID at a particular VDS and VGS, you should use a MOSFET with a larger W/L ratio. According to the MOSFET equations, ID is directly proportional to (W/L). 2. MOS #1 will have a lower threshold voltage VTN than MOS #2. This means for the same VGS, MOS #1 will reach saturation earlier (at a lower VDS) than MOS #2. On an ID-VDS graph, the saturation region for MOS #1 will start at a lower VDS than for MOS #2. 3. If L decreases:
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
47 views45 pages

Unit 4

Here are the answers to your questions: 1. To increase the drain current ID at a particular VDS and VGS, you should use a MOSFET with a larger W/L ratio. According to the MOSFET equations, ID is directly proportional to (W/L). 2. MOS #1 will have a lower threshold voltage VTN than MOS #2. This means for the same VGS, MOS #1 will reach saturation earlier (at a lower VDS) than MOS #2. On an ID-VDS graph, the saturation region for MOS #1 will start at a lower VDS than for MOS #2. 3. If L decreases:
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 45

MOSFETs

Metal-Oxide-Semiconductor
Field Effect Transistors
Classes of Field Effect Transistors
• Metal-Oxide-Semiconductor Field Effect Transistor
– Which will be the type that we will study in this course.
• Metal-Semiconductor Field Effect Transistor
– MESFET
• Junction Field Effect Transistor
– JFET
• High Electron Mobility Transistor or Modulation Doped
Field Effect Transistor
– HEMT or MODFET
• Fast Reverse/Fast Recovery Epitaxial Diode
– FREDFET
• DNA Field Effect Transistor
– The conduction path is through a strand of DNA
Field Effect Transistors
• The conductivity (or resistivity) of the path
between two contacts, the source and the
drain, is altered by the voltage applied to
the gate.
– Device is also known as a voltage controlled
resistor.
Types of MOSFETS

n-channel p-channel
Enhancement Mode Enhancement Mode
(nMOSFET) (pMOSFET)

n-channel p-channel
Depletion Mode Depletion Mode
(nMOSFET) (pMOSFET)
Cross-Sectional View of n channel
planar Enhancement Mode Transistor
p channel
Enhancement Mode Transistor
n channel
Depletion Mode Transistor
p channel
Depletion Mode Transistor
Symbols for n channel
Enhancement Mode MOSFET

VGS ≥ 0V, VDS ≥ 0V


VTN is positive
Symbols for p channel
Enhancement Mode MOSFET

VGS ≤ 0V, VDS ≤ 0V


VTP is negative
Symbols for n channel
Depletion Mode MOSFET
Symbols for p channel
Depletion Mode MOSFET
PSpice MOSFET Symbols
• The IRF150 is an nMOS and the IRF9140 is a pMOS.
Both are enhancement mode transistors.
– The body terminal is connected to the source terminal on
the FET.
– “M” is used to denote that the device is a MOSFET.
MOS Capacitor
MOS Capacitor Under Bias:
Electric Field and Charge
Parallel plate capacitor

Accumulation
Positive gate bias
Electrons attracted to gate
Negative gate bias:
Holes attracted to gate

Depletion Inversion
MOS Capacitor:
p-type semiconductor

Accumulation Depletion Inversion


Threshold Voltage
The gate voltage, that causes the concentration of electrons
immediately under the gate oxide is equal to the concentration of
holes in substrate for Enhancement mode nMOSFET, is called the
threshold voltage.
• Enhancement mode FETs
• NMOS VG = VTN
• When enough electrons have been attracted to the oxide-semiconductor interface to create a path
for current to flow between the source and drain.
• PMOS VG = VTP
• When holes have been attracted to the oxide-semiconductor interface to create a path for current
to flow between the source and drain.
• Depletion mode FETs
• NMOS VG = VTN
• When holes have been attracted to the oxide-semiconductor interface to stop current from flowing
between the source and drain.
• PMOS VG = VTP
• When electrons have been attracted to the oxide-semiconductor interface to stop current from
flowing between the source and drain.
• In informal language, the threshold voltage is the gate
voltage which distinguish it from ON to OFF or OFF to
ON dc operation.
MOS CV analysis
• Low Freq. and High Freq. CV Characteristics:
MOSFETs
Enhancement mode Depletion mode
• Also known as Normally • Also known as Normally
Off transistors. On transistors.
– A voltage must be applied – A voltage must be applied
to the gate of the transistor, to the gate of the transistor,
at least equal to the at least equal to the
threshold voltage, to create threshold voltage, to
a conduction path between destroy a conduction path
the source and the drain of between the source and
the transistor before the drain of the transistor to
current can flow between prevent current from
the source and drain. flowing between the source
and drain.
MOSFET: Output characteristics, transfer
characteristics
Dr. Ajit Kumar, Assistant Professor,
GITAM
• Figure showing all three region with variation in applied
gate and drain voltages:
Mobility Model:
•The mobility of carriers in the channel of a MOSFET is lower than in
bulk semiconductors because there are additional scattering
mechanisms.
•Using the plot of the effective carrier mobility in the MOSFET as a
function of the average transverse electric field in the middle of the
inversion layer, we get what is known as a “universal” mobility
degradation curve for any MOSFET.
• Overall, channel mobility depends on gate bias or
transverse electric field. Further, mobility also has a
strong dependence on drain bias or the longitudinal
electric field.
Substrate bias effects:
•Usually in MOSFET baising, source and body (substrate)
both are grounded, as shown below:

•Body effect occurs when the body or substrate of the


transistor is not biased at the same level as that of the
source. And this voltage difference between source and
bulk leads to an increase or decrease of the threshold
voltage. The next figure shows the same.
• With a reverse bias between the substrate and the source (VB
negative for an n-channel device), the source-​­channel junction
potential barrier is increased. This causes the threshold voltage to
increase with (reverse) substrate bias—this is known as the body
effect.
Sub threshold characteristics:
•The drain current below threshold voltage does not get
zero abruptly. The drain current below conduction below
threshold voltage is known as subthreshold conduction.
And the characteristics of drain current conduction below
threshold voltage is known as Sub threshold
characteristics.
•We study the same using subthreshold slope (S) as below:
• Subthreshold conduction in MOSFETs on semilog plot
of ID vs. VG is shown below:
• For a very small gate voltage, the subthreshold current is reduced to
the leakage current of the source/drain junctions. This determines
the off-state leakage current, and therefore the standby power
dissipation in many complementary MOS.
• MOSFET equivalent model is of two types:
1. for Large Signal Operation (DC operations)
2. For small signal operation
MOSFET Equivalent Model for large signal
(dc operation) in Nonsaturation/
Triode region
Piecewise Model for large signal
(dc operation) in
Saturation/Pinch-off Region
Summary of I-V Relationships
Region NMOS
VDS < VDS(sat) ' W 1 2
I D  k (VGS  VTN )VDS  VDS 
n
Nonsaturation/ L 2 
Triode VDS
RDSon 
ID
VDS > VDS(sat) kn'
Saturation/ W  2
ID   [V
 GS  VTN ]
Pinch-off 2 L 

Transition between triode


VDS(sat) = VGS - VTN
and pinch-off

Enhancement Mode VTN > 0 V, ID ≥ 0 mA, ID = IS, IG = 0 mA


The High-Frequency MOSFET Model
or small signal MOSFET model
Questions
• To increase the drain current ID at a particular VDS and VGS, should you
use a MOSFET with a larger or smaller W/L ratio?
• Compare the operation of two FETs, where MOS #1 has a smaller V TN
than MOS #2. Sketch the differences on a graph of I D-VDS.
• The microelectronics industry is working to decrease the channel
length L. If W is held constant, how will:
– the capacitance between the gate and the channel change?
– the time it takes for an electron to move from the source to the drain be altered?
– the value of VTN change?
– this modify RDSon for a particular set of VDS and VGS?
• The microelectronics industry is also working to decrease the thickness
of the gate oxide TOX and is researching high  and low  dielectrics to
replace silicon dioxide as the gate dielectric?
– If TOX decreases, how will the capacitance between the gate and channel change?
– Should a low  or high  dielectric be used to increase the capacitance?

You might also like