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DC - Unit V - ASV

The document discusses state machines and their implementation. It defines state machines and covers fundamental concepts like state diagrams, state tables, Moore and Mealy machines. It then discusses state reduction, implementation of sequence detectors using both Moore and Mealy models, and algorithmic state machines (ASM). Key steps in analyzing and designing state machines like state assignment are also outlined.
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0% found this document useful (0 votes)
95 views32 pages

DC - Unit V - ASV

The document discusses state machines and their implementation. It defines state machines and covers fundamental concepts like state diagrams, state tables, Moore and Mealy machines. It then discusses state reduction, implementation of sequence detectors using both Moore and Mealy models, and algorithmic state machines (ASM). Key steps in analyzing and designing state machines like state assignment are also outlined.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Unit IV:

State Machines

By
Dr. Anup Vibhute
Dr. D Y Patil Institute of Technology, Pimpri, Pune
Contents:
• Syllabus
• Fundamentals of states- state diagram, state table
• State reduction
• Meal and Moore Machines
• Sequence detector
• ASM
Syllabus:
• Basic design steps- State diagram, State table, State reduction, State assignment,
Mealy and Moore machines representation, Implementation, finite state machine
implementation, Sequence detector.
• Introduction to Algorithmic state machines- construction of ASM chart and
realization for sequential Circuits

Course Outcome:
• CO5:Implement and Differentiate between different finite state machines.
• CO5.1: Differentiate between Mealy and Moore Machines
• CO5.2: Implement Finite State Machines.
Introduction:
• The following Figure shows a block diagram of a sequential circuit. The memory
elements are connected to the combinational circuit as a feedback path.
• The information stored in the memory element at any given time defines the
present state of the sequential circuit. The present state and the external inputs
determine the outputs and the next state of the sequential circuit. Thus, we can
specify the sequential circuit by a time sequence of external inputs, internal states
(present state and next state) and outputs.
Introduction:
• A state machine is a sequential circuit having a limited (finite) number of states
occurring in a prescribed order.
• A counter is an example of a state machine; the number of states is called the
modulus.
• The behaviour of a finite state machine is described as a sequence of events that
occur at discrete instants designated as t = 1, 2, 3 ... etc.
• Every finite state machine contains a finite number of memory devices.
Introduction:
• In synchronous or clocked sequential circuits, clocked flip-flops are used as
memory elements, which change their individual states in synchronism with the
periodic clock signal.
• The synchronous or clocked sequential circuits are represented by two models.
• Moore circuit: In this model, the output depends only on the present state of
the flip-flops.
• Mealy circuit: In this model, the output depends on both the present state of
the flip-flop(s) and the input(s).
• Sequential circuits are also called finite state machines (FSMs).
• 
FSM Machine : Moore Machine
• A Moore state machine consists of combinational logic that determines the
sequence and memory (flip-flops)
• In the Moore machine, the combinational logic is a gate array with outputs that
determine the next state of the flip-flops in the memory
• There may or may not be inputs to the combinational logic.
• If there is an input(s), it does not affect the outputs because they always
correspond to and are dependent only on the present state of the memory
FSM Machine : Moore Machine
• State Transition Diagram: Moore Model
• We arrive at it by following logic.
• The circuit is initialized with state a.
• If input data X = 1, the first bit of the sequence to be detected is considered detected
and the circuit goes to state b.
• If X = 0 then it remains at state a to check next bit that arrives.
FSM Machine : Mealy Machine
• For the Mealy machine, the present state affects the outputs, just as in the Moore
machine; but in addition, the inputs also affect the outputs. The outputs come
directly from the combinational logic and not the memory.
FSM Machine : Mealy Machine
• State Transition Diagram: Mealy Model
• The circuit is initialized with state a. If it receives input X = 0, it stays at a else goes
to state b that signifies first bit is detected properly.
• In both the cases output, Y = 0 signifying no detection. At state b, if X = 0, the
circuit returns to initial state a, i.e. no bit in given order is detected and if X = 1,
goes to state c, signifying two bits in order are detected. In both the cases Y = 0.
State Diagram:
• The state diagram or state graph is a pictorial representation of the relationships
between the present state, the input, the next state, and the output of a sequential
circuit
• the state diagram is a pictorial representation of the behaviour of a sequential
circuit.
• Mealy Circuit:
State Diagram:
• Moore Circuit:
• In the case of a Moore circuit, the directed lines are labelled with only one binary
number representing the input that causes the state transition.
• The output is indicated within the circle below the present state, because the output
depends only on the present state and not on the input.
State Table:
• The state table is a tabular representation of the state diagram.
• For Sequential circuit implementation, the information contained in the state
diagram is to be translated into a state table.
• The present state designates the state of the flip-flops before the application of the
clock pulse.
• The next state is the state of the flip-flops after the application of the clock pulse
and the output section gives the value of output variables during the present state.
• The present state of the sequential machine indicates the present outputs of the
memory elements used in the machine.
• The next state of the machine indicates the next outputs of the flip-flops that will be
obtained when the present inputs are applied to the machine in the present state.
State Reduction:
• The state reduction technique basically avoids the introduction of redundant states.
• The reduction in redundant states reduces the number of flip-flops and logic gates,
reducing the cost of the final circuit.
• Two states are said to be equivalent if every possible set of inputs generate exactly
the same output and the same next state.
• When two states are equivalent, one of them can be removed without altering the
input-output relationship.
State Reduction:
State Assignment:
• The process of assigning binary values to the states of the sequential machine is
known as state assignment.
• The binary values are to be assigned to the states in such a way that it is possible to
implement flip-flop input functions using minimum logic gates.
• The output values of the physical devices are referred to as state variables.
• Rules for state assignment: There are two basic rules for making state
assignments.
• Rule 1. States having the same NEXT STATE for a given input condition should
have assignments which can be grouped into logically adjacent cells in a K-map.
• Rule 2. States that are the next states of a single state should have assignments
which can be grouped into logically adjacent cells in a K-map.
Sequence Detector:
• Mealy Type Model –
• Step 1. Word statement of the problem
• Steps 2 and 3. State diagram and state table
• Step 4. Reduced standard form state table
• Step 5. State assignment and transition and output table
• Step 6. Choose type of Flip-flops and form the excitation table
• Step 7. K-maps and minimal expressions
• Step 8. Implementation
Sequence Detector:
• Mealy Type Model –
• Design a sequence detector to detect the sequence 1010 and say that overlapping is
permitted, i.e. for example, if the input sequence is 01101010 the corresponding
output sequence is 00000101
Sequence Detector:
• Mealy Type Model –
Sequence Detector:
• Mealy Type Model –
Sequence Detector:
• Mealy Type Model –
Sequence Detector:
• Moore Type Model –
• For the design of Moore type of circuit, the same steps are to be followed
• Sequence detection 1010
Sequence Detector:
• Moore Type Model – detect the sequence 110.
Sequence Detector:
• Moore Type Model – detect the sequence 110.
Algorithmic State Machines (ASM):
• Algorithmic state machines(ASM) is also known as state machine used for sequential
circuits.
• These names are used when sequential circuit is used to control a digital system that
carries out a step-by-step procedure or algorithm.
• A special type of flowchart is called a state machine flowchart or SM flowchart or
ASM flowchart.
• Advantages-
• Operation of a digital system can be easily understand by inspection of the SM chart .
• ASM charts represent physical hardware.
• The ASM chart are equivalent to a state graph, and it leads directly to a hardware
realization . 4. ASM charts can be described the operation of both combinational and
sequential circuits .
• ASM charts are easier to understand and can be converted several equivalent form.
• The ASM chart may be equivalently expressed as a state and output table
Algorithmic State Machines (ASM):
• ASM chart is basically composed of three basic elements
• State box
• Decision box
• Conditional box
• State Box:
• The state of the system is represented by a state box

• Each active edge of the clock causes to change of state from previous state to the
next state in a synchronous sequential circuit
Algorithmic State Machines (ASM):
• Decision Box:
• It a diamond –shaped box with true false branches

• The symbol incorporated in ASM chart by appending it to a state box. The present
state and the condition of the input select the corresponding exit path and thus
decide the next state.
Algorithmic State Machines (ASM):
• Conditional Box:
• A condition output box is a rectangular box with curved ends .
• It contain conditional output list .
• The conditional output depends on both the state of the system and the inputs .
• Therefore the conditional output signals are sometimes known as Mealy output .
• A condition output must follow a decision box
Algorithmic State Machines (ASM):
• Conversion Of State Diagram To An ASM Chart
• Mealy Machine.
• In case of Mealy machine ,output is a function of both present state and input . For
construction of ASM chart from Mealy state diagram ,we should follow the
following steps.
• Represent each states by state boxes.
• Put input in decision box after each state box.
• The Mealy output appear in conditional output boxes since they depend on both the
state and input.
• Mealy circuit output written only when it is equal to '1' i.e. true .
• Depending on value of input connect the path to next state box.
Algorithmic State Machines (ASM):
• Conversion Of State Diagram To An ASM Chart
• Moore Machine.
• In case of Moore machine ,output is a function of the present state only . For
construction of ASM chart from Moore state diagram ,we should follow the
following steps
• Represent each states by state boxes.
• The Moore output are placed in the state boxes since they do not depend on the
input .
• After each state box put the input in decision box.
• Depending on value of input connect the path to next state box.
Algorithmic State Machines (ASM):
• Convert the state diagram diagram of Fig. below to ASM chart.

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