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Programmable Peripheral Interface (8255A)

The 8255A Programmable Peripheral Interface chip contains 3 programmable 8-bit ports (Port A, Port B, Port C) that can each be configured as either inputs or outputs. Port C can also be divided into two 4-bit ports. The ports are programmed by writing control words to the 8255A's control word register. The chip supports 3 I/O modes - Mode 0 for simple I/O, Mode 1 for input/output with handshaking, and Mode 2 where Port A is used for bidirectional communication. Exercises demonstrate how to configure the ports, write programs to read inputs and display outputs, and use the BSR mode to set/reset specific port bits on the 8

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0% found this document useful (0 votes)
319 views27 pages

Programmable Peripheral Interface (8255A)

The 8255A Programmable Peripheral Interface chip contains 3 programmable 8-bit ports (Port A, Port B, Port C) that can each be configured as either inputs or outputs. Port C can also be divided into two 4-bit ports. The ports are programmed by writing control words to the 8255A's control word register. The chip supports 3 I/O modes - Mode 0 for simple I/O, Mode 1 for input/output with handshaking, and Mode 2 where Port A is used for bidirectional communication. Exercises demonstrate how to configure the ports, write programs to read inputs and display outputs, and use the BSR mode to set/reset specific port bits on the 8

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Jobair Al Nahian
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Programmable Peripheral

Interface (PPI) 8255A


Md. Motaleb Hossen Manik
Lecturer
Dept. of CSE, KUET
Introduction
• 40 pin IC, contains 3
programmable 8-bit ports
namely port A, B, and port C
• Port C is divided into 2 four-
bit ports (Cupper and Clower)
• Each port can be programmed
to work either an input or an
output port
Block Diagram
• Contains 2 control
groups
• Group A contains port
A and port C upper
• Group B contains port
B and port C lower

3
Pins and Signals
• D7-D0: bidirectional data lines.
Transfers data, control, or status bytes
• A1-A0: used to address the ports and
control word register of 8255A

4
Cont.
• WR and RD: allow data transfer
to and from the ports/ control
word register and microprocessor
• CS: used to enable the 8255
• RESET: used to clear the ports
and control register
Pins and Signals
• PA0-PA7: serves as input,
output, or bidirectional data
lines
• PB0-PB7: serves as input or
output data lines.
• PC0-PC7: serves as
data/control lines. Also assists
the I/O function for port A and
port B

6
Control Word Register
• 8 bits long
• D7 = 0, BSR mode
• D7 = 1, I/O mode
Port and Its Modes
Port Address Calculation
• Chip is selected when A7 is
high and A6-A2 is low
• For 16 bis address, use A15
to A2 instead of A7-A2
BSR Mode
I/O Modes: Mode 0
• Simple I/O mode
• All four ports can be used individually
• No handshaking is needed
I/O Modes: Mode 1
• Input and output with a simple
handshake
• Uses three pins of C port as the control
signal
I/O Modes: Mode 1 as
Input
• STB: an input device loads data into a
port by making STB low
• IBF: an acknowledge signal to the
peripheral
• INTR: interrupt CPU by making this
signal high when STB and IBF and
INTE go high at a time
I/O Modes: Mode 1 as
Output
• OBF: goes low when CPU writes a data
byte into a port of 8255 and informs the
peripheral to take the data
• ACK: peripheral acknowledge by this
signal after it receives data from 8255
• INTR: 8255 sends this signal to the
microprocessor when it receives ACK
from the peripheral
I/O Modes: Mode 2
• Only port A operates in this mode.
• Port A is used for both sending and receiving data to and from
the peripheral.
• Five pins of port C (PC3-PC7) are used to carry the control
signals
• When port A operates in mode-2, port B can be operated in
mode-0 or mode-1
I/O Modes: Mode 2
• STB: an input device loads data into the port by
making STB low
• IBF: an acknowledge signal to the peripheral
• OBF: goes low when the CPU writes a data byte
into the port and informs the peripheral to take the
data.
• ACK: peripheral acknowledge by this signal after it
receives data from 8255.
• INTR: 8255 sends this signal to the microprocessor
when it receives ACK from the peripheral.
Some Exercises
1. Identify the port address for the figure
Port A
2. Identify the mode 0 control word to A15 . C/S
config port A and port cL as output & . Port Cu

port B and port cu as an input port . Port Cl


A1
3. Write a program to read the DIP switch A0 Port B
and display the reading from port B at
port A and port cL at port cu,
respectively
Solution of Exercise 1
Port A
A15 . C/S
. Port Cu
. Port Cl
A1
A0
Port B

A15 . . A2 A1 A0 Hex Port


1 0 0 0 0 0 8000H A
1 0 0 0 0 1 8001H B
1 0 0 0 1 0 8002H C
1 0 0 0 1 1 8003H CWR
Solution of Exercise 2

D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 0 1 0 1 0 = 8A H
Solution of Exercise 3
Output: Port A, Port cu
Input: Port B, Port CL

D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 0 0 0 1 1 = 83H
Cont.

MVI A, 83H RLC


STA 8003H RLC
LDA 8001H RLC
STA 8000H RLC
LDA 8002H STA 8002H
ANI 0FH HLT
Exercise 4
• Write a BSR control word
A7
subroutine to set bits PC7 A6 C/S A
and PC3 and reset them after
B
10ms. Use the schematic as A2

follows and assume that a A1


C
delay subroutine is available CWR
A0
Answer of Exercise 4
First, generate port addresses

A7 A6 A5 A4 A3 A2 A1 A0 Hex Port
1 0 0 0 0 0 0 0 80H A
1 0 0 0 0 0 0 1 81H B
1 0 0 0 0 0 1 0 82H C
1 0 0 0 0 0 1 1 83H CW
R
Cont.
• To set PC7
D7 D6 D5 D4 D3 D2 D1 D0 Hex
0 0 0 0 1 1 1 1 0F H

• To reset PC7
D7 D6 D5 D4 D3 D2 D1 D0 Hex
0 0 0 0 1 1 1 0 0E H

• To set PC3
D7 D6 D5 D4 D3 D2 D1 D0 Hex
0 0 0 0 0 1 1 1 07 H

• To reset PC3
D7 D6 D5 D4 D3 D2 D1 D0 Hex
0 0 0 0 0 1 1 0 06 H
Cont.
Stack
MVI A, 0FH MVI A, 06H
Reset PC7
OUT 83H OUT 83H Reset PC3
Set PC3
MVI A,07H MVI A, 0EH Set PC7
OUT 83H OUT 83H
CALL delay RET
Exercise 5 (DIY)
Design an interfacing circuit considering the following to read data
from the A/D converter. Use the 8255A in the Memory Mapped
I/O
i. Set up port A to read data
ii. Set up bit PC0 to start conversion and bit PC7 to read the ready
status of the converter
Port A
A15 . C/S
. Port Cu
. Port Cl
A1
A0
Port B
References
• Microprocessors Principles and Applications by Ajit Pal

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