20CS307 - COMPUTER ARCHITECTURE

UNIT – I
BASIC STRUCTURE OF COMPUTERS
Computer Architecture Definition:
• Computer Architecture deals with designing and
implementation of instruction set, information
format and memory addressing techniques of a
computer.
• A Computer Architecture performs instruction set
design, memory addressing modes.
• Computer architecture is a set of rules and methods
that describe the functionality, organization, and
implementation of computer systems
Intel Processor
4004 1971 4 bit
8008 1972 8 bit
8085 1976 8 bit
8086 1978 16 bit
80186 1982 16 bit
80286 1982 16 bit
80386 1985 32 bit
80486 1989 32 bit
Pentium 1993 64 bit
Pentium II 1997 64 bit
Pentium III 1999 64 bit
Pentium IV 2000 64 bit
Core 2 Duo 2006 64 bit
Dual Core 2007 64 bit
Core i3 2010 64 bit
Core i5 2015 64 bit
Core i7 2017 64 bit
Introduction
Information Handled by a Computer

 Instructions/machine instructions
 Govern the transfer of information within a computer as well as
between the computer and its I/O devices
 Specify the arithmetic and logic operations to be performed
 Data
 Used as operands by the instructions
 Encode in binary code – 0 and 1
Functional Units
Input Unit
Computers accept coded information through I/P units
Output Unit
Computers delivered information through O/P units

Note : listed devices act as both I/O and O/P like Camera, Touch Screen, CD / DVD,
Pen Drive, Modem, Head Set
Memory
• Memory – Stores programs and data and gets destroyed when the computer is
power off
• Hard disk – stores programs/data permanently
Types of Computer Memory
Primary Memory Secondary Memory
(volatile memory) (nonvolatile memory)
RAM Magnetic Tape
ROM Floppy Disk
Optical Disk
Bus Structures

 There are many ways to connect different parts inside a computer

together.
 A group of lines that servers as a connecting path for several
devices is called a bus.
 Address
 Data
 Control
Single-Bus
Speed Issues
• Different devices have different transfer / operate speed.

• If the speed of bus is bounded by the slowest device connected to it,

the efficiency will be very low.

• How to solve this?

• A common approach – use buffers.

Software
Hardware : Hardware is a physical parts of the computer systems the parts
we can touch and see. E.g Mother board, Keyboard, Monitor, Hard disk,
Mouse etc.
Software: Software is a collection of instructions that can be run on a
computer. The instruction tell the computer what to do. Software is a
bunch of code.
System Software:
1. Operating System Software: Windows, Linux, Unix, DOS
2. Language Translator: It is another System Software which converts the
high level language to machine understanding language.
3. Utility Software: Antivirus, File Management System, Disk Management
tools, Compression tools, Disk cleanup tool.
Control Unit: It is a component of a computers CPU that directs the
operation of the processor.
Compiler: Compiler is a computer program that
translates written in a high level language to
lower level language ( Assembly Language to
Machine Language).
Interpreter: Program executes directly and it
executes the program line by line.
Assembler: Assembler is used to convert
Assembly Language to Machine Code.
Basic Operational Concepts
A Typical Instruction
• Add LOCA, R0
• Add the operand at memory location LOCA to the operand in a register R0
in the processor.
• Place the sum into register R0.
• The original contents of LOCA are preserved.
• The original contents of R0 is overwritten.
• Instruction is fetched from the memory into the processor – the operand at
LOCA is fetched and added to the contents of R0 – the resulting sum is
stored in register R0.
Separate Memory Access and ALU Operation
• Load LOCA, R1
• Add R1, R0
• Whose contents will be overwritten?
Connection Between the Processor and the
Memory Memory

MAR MDR
Control

PC R0

R1
Processor
IR

ALU
Rn - 1

n general purpose
registers

Figure 1.2. Connections between the processor and the memory.

Registers
• Instruction register (IR)
• Program counter (PC)
• General-purpose register (R0 – Rn-1)
• Memory address register (MAR)
• Memory data register (MDR)
Instruction Register(IR): It contains the instruction that is currently being
executed. Its output is available to the control circuit that generates the
timing signal for controlling the actual processing circuit needed to execute
the instruction.
Program Counter(PC): Program Counter is a register that contains the
memory address of the instruction currently being executed. During the
execution of the current instruction the content of PC is updated to
correspond to the address of the next instruction.
Memory Address Register(MAR): It holds the address of the memory
location to or from which data is to be transferred.
Memory Data Register(MDR): It contains the data to be written into or read
out of the addressed memory location.
General Purpose Register(GPR): It is used for holding the data, intermediate
results of operation. They are also known as Scratch Pad Registers.
Typical Operating Steps
• Programs reside in the memory through input devices
• PC is set to point to the first instruction
• The contents of PC are transferred to MAR
• A Read signal is sent to the memory
• The first instruction is read out and loaded into MDR
• The contents of MDR are transferred to IR
• Decode and execute the instruction
Typical Operating Steps (Cont’)
• Get operands for ALU
General-purpose register
Memory (address to MAR – Read – MDR to ALU)
• Perform operation in ALU
• Store the result back
To general-purpose register
To memory (address to MAR, result to MDR – Write)
• During the execution, PC is incremented to the next
instruction
Interrupt
• Normal execution of programs may be preempted if some device requires
urgent servicing.
• The normal execution of the current program must be interrupted – the
device raises an interrupt signal.
• Interrupt-service routine
• Current system information backup and restore (PC, general-purpose
registers, control information, specific information)
Performance
• In each field, every one is attracted by the performance of that field.
• When we choose among different computer, performance is an
important attribute.
Response Time:
• Response Time is the time between the start and completion of the
task is also referred as Execution Time
Defining Performance
• To Maximize the performance of computers we have to minimize the
response time (or) execution time for some task
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Performance R = ………………………………………….
Execution Time R
• This means that for two computers R & S, If the performance of R is
greater than the performance of S.
• Performance R > Performance S
• ie 1 1
……………………… > ……………………..
Execution Time R Execution Time S
Execution Time S > Execution Time R
• ie Execution Time on S is longer than the Execution Time on R,
• If n times faster than S, that we can write,
Performance R Execution Time S
………………………. = ………………………... =n
Performance S Execution Time R
E.g.: if a computer R runs a program in 15 seconds and computer S runs the same program in 30 seconds, how much faster is R
than S?
Performance R Execution Time S
………………………. = ………………………... =n
Performance S Execution Time R
30
= ……….
15
= 2.0
So R is 2.0 times faster than S.
CPU Execution Time : CPU Execution Time is the time that CPU spends
computing for particular task.

User CPU Time : User CPU Time is the time spent in the OS performing task on
behalf of programs.
CPU Clock Cycle for a program
CPU Execution Time for a Program = ………………………………………………..
Clock Rate
E.g: Computer A runs a program in 12 seconds with a 3 GHZ clock. We have to
design a computer B such that it can run the same program in 9 seconds.
• Determine the Clock rate of B
• Assume that due to increase in clock rate, cpu design of computer B is
affected and it requires 1.2 times as many clock cycle as computer A for
execution this program. What clock rate should we tell the designer to target.
Clock Rate A = 3GHZ = 3 x10 Cycles / Second
CPU Time A = 12 Seconds
CPU Time B = 9 Seconds
CPU clock cycle B = 1.2 times of CPU clock cycle A
CPU Clock Cycle A
CPU Time A = …………………………
Clock Rate A
CPU Clock Cycle A
12 Seconds = …………………………………..
3x10 Cycles / Second
CPU Clock Cycle A = 12 Seconds X 3x10 Cycles / Second
CPU Clock Cycle A = 36 x 10 Cycles / Second
The CPU time for Computer B can be given
asCPU Clock Cycle B
CPU Time B = …………………………
Clock Rate B
1.2 x CPU Clock cycle A
9 Seconds = …………………………………..
Clock Rate B
1.2 x 36 x 10 Cycles / Second
9 Seconds = ………………………………………………….
Clock Rate B
1.2 x 36 x 10 Cycles / Second
Clock Rate B = ……………………………………..
9 Seconds
Clock Rate B= 4.8 GHZ
E.g: Our Program runs in 15 seconds on a computer A, which has 2 GHZ
Clock Rate. We are trying to help a computer designer to build a
Computer B, which will run this program in 7 seconds, the designer has
determined that a substantial increase in the clock rate is possible but
this increase will affect the rest of the CPU design, causing Computer B
to require 1.4 times as many clock cycles as Computer A for this
program. What Clock Rate should we tell the designer to target?
Sol:
Clock Rate A =2GHZ
CPU Time A = 15 Seconds
CPU Time B = 7 Seconds
CPU Clock Cycle B = 1.4 times of CPU Clock Cycle A
Basic Performance Equation
• T – processor time required to execute a program that has been
prepared in high-level language
• N – number of actual machine language instructions needed to
complete the execution (note: loop)
• S – average number of basic steps needed to execute one machine
instruction. Each step completes in one clock cycle
• R – clock rate

N S
T
R
INSTRUCTIONS: LANGUAGE OF THE
COMPUTER
• An INSTRUCTION is a command given to a computer
hardware. The set of all instructions understood by a
specific computer architecture is called as
INSTRUCTION SET OF THE ARCH ITECTURE.
Introduction – Instruction must perform the
four types of Operation:
• Data transfers between the memory and the processor registers

• Arithmetic and logic operations on data

• Program sequencing and control

• I/O transfers
Register Transfer Notation (RTN)
• Contents of a location are denoted by placing square brackets around
the name of the location

• R1  [LOC]

• R3  [R1] + [R2]
Assembly Language Notation
• Represent machine instruction and Programs.

• Move LOC,R1 : R1  [LOC]

• Add R1,R2,R3 : R3  [R1] + [R2]

• SUB R1,R2,R3 : R3  [R1] – [R2]

• MUL R1,R2,R3 : R3  [R1] * [R2]

Instruction Formats
• Three-Address Instructions
• ADD R1,R2,R3 R3 R1 + R2

• Two-Address Instruction
• ADD R1,R2 R2 R1 + R2

• One-Address Instructions
• ADD A AC  AC + M[A]

• Zero-Address Instructions
• Stack Operations
Instruction Formats
• Example : C  [A] + [B]
• Three – Address
• ADD A,B,C ; M[C] M[A] + M[B]
• Operation source1, source2, Destination
• Two – Address
• ADD A,B ; M[B] M[A] + M[B]
• One – Address
1. Load A ;AC  M[A]
2. ADD B ;AC  AC + M[B]
3. STORE C ; M[C]  AC
• Zero – Address
1. PUSH
2. POP
Instruction Formats
• Let Ri represents a general purpose register Assume Ri acts as
Accumulator
LOAD A,Ri
Store Ri,A
ADD A,Ri
ADD Ri,Rj
ADD Ri,Rj,Rk
MOVEA,Ri
MOVERi,A
 Operations and Operands of the Computer Hardware

•Operations:

•Example:

•add a, b, c  instructs a computer to add the two variables b

and c and to put their sum in a.

operands
operations

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CE Operations of the Computer Hardware

Fig.1 MIPS assembly language 8

 Operations of the Computer Hardware

Example 1. Example 2.
C/Java C/Java

a = b + c; f = (g + h) – (i + j);
d = a – e;
MIPS add t0, g, h MIPS
add a, b, c add t1, i, j
sub d, a, e sub f, t0, t1

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 Operands of the Computer Hardware

Operands of the computer hardware

1. Register Operands

2. Memory Operands

3. Constant or Immediate Operands

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 Operands of the Computer Hardware

Memory Operands (2):

Memory is just a large, single-dimensional array, with the address acting as the index to that
array, starting at 0. For example, in Figure 2.2, the address of the third data element is 2, and
the value of Memory[2] is 10.

Fig.2 Memory addresses and contents of Fig.3 Actual MIPS memory addresses and contents of
memory at those locations. memory for those words.

This is a simplification of the MIPS The changed addresses are highlighted to contrast with
addressing; Fig.3 shows the actual Fig.2. Since MIPS addresses each byte, word
MIPS addressing for sequential word addresses are multiples of four: there are four bytes in
addresses in memory. a word.
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Amdahl’s Law
• A rule stating that the performance enhancement possible with a
given improvement is limited by the amount that the improved
feature is used.
Addressing Modes
 Addressing mode:

The different ways in which the location of an

operand is specified in an instruction are
addressing modes.
Instruction Cycle & PC :
 The control unit of a computer is designed to go through an
instruction cycle that is divided into three major phases:
-Fetch the instruction.
-Decode the instruction.
-Execute the instruction.

 PC (program counter) is a register that keeps track of the

instructions in the program stored in the memory. PC holds the
address of the instruction to be executed next and is
incremented each time an instruction is fetched from memory.
Modes that need no address field:

There are different addressing modes

Although most addressing modes modify the address field of the
instruction, there are two modes that need no address field at all.
These are

 Implied mode
 Immediate mode
1-Implied mode:
In this mode the operands are specified implicitly in the
definition of the instruction.
for example: zero address instruction in stack
organized CPU the operation type instruction do not
need an address field. The instruction
ADD
in a stack computer consists of an operation code only with
no address field .There is no need to specify operands with
an address field since all operands are implied to be in the
stack.
2-Immediate Addressing Mode:
In this mode the operand itself specified in the instruction .
In other words
An immediate mode instruction has an
operand rather than an address field . The
operand field contain the actual operand to
be used.
for example:

MOV R # 20
This instruction is used to initialize a register
to a constant.
When the address field specify a processor register the
instruction is said to be in the register mode.
In the register mode the operands are in registers that
resides inside the CPU.
for example:
MOVR1 , R2
opcode Register name
R2
operand
4-Register Indirect Mode:
In this mode the instruction specifies register in the CPU whose content give the
address of the operand in the memory.
OR
The selected register contain the address of the register
rather than operand
itself .
for example:
MOV A , (R) ( this notation identify R
do not contain the
opcode Reg name operand it contain the
R address of operand )
Memory
address memory

operand
• Used in pointers.
 5-Autoincrement/Autodecrement Mode:

•In this mode E.A of the operand is the content of register specified in instruction ,
after / before accessing the operand the content of the register are automatically
incremented/decremented to the step size d.
 This mode is similar to the register indirect mode except that the register is
incre /decr after it’s value is used.
 For example: ADD R1,(R2)+memory
opcode R
E.A=[R] 1000

E.A=[R]+d R 1001

E.A=[R]+2d E.A(1003)
1002
operand
• This mode is used in loop counter. 100 3
6-Direct Addressing Mode:
In this mode E.A / address of operand directly given I n
instruction.
In this mode the effective address is equal to the address part of
the instruction the operand resides in memory and its address is
given directly by the address field of the instruction.

for example: ADD R , 2000 E.A

r

r+[2000]
opcode E.A
Operand
value
7-Indirect Addressing Mode:
In this mode address field of an instruction give the address where the E.A is
stored in memory . Control fetch the instruction from memory and uses its address
part to access memory again to read the E.A.
Example:

Memory
opcode
address
memory

E.A

memory
operand
A few addressing modes require that the address field of
the instruction be added to the content of a specific
register in the CPU the effective address in these modes is
obtained from the following computation:
E.A = address part of the instruction
+

content of CPU register

The CPU register used in the computation may be the
PC(program counter),Index register , Base register.
 MIPS Addressing for 32-bit Immediates and Addresses

MIPS Addressing Mode Summary

Multiple forms of addressing are generically called addressing modes. Addressing mode is one of
several addressing regimes delimited by their varied use of operands and/or addresses.

1. Immediate addressing, where the operand is a constant within the instruction itself

2. Register addressing, where the operand is a register

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 MIPS Addressing for 32-bit Immediates and Addresses

3. Base or displacement addressing, where the operand is at the memory location whose
address is the sum of a register and a constant in the instruction

4. PC-relative addressing, where the branch address is the sum of the PC and a constant in the
instruction

5. Pseudo direct addressing, where the jump address is the 26 bits of the instruction
concatenated with the upper bits of the PC

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 MIPS Addressing for 32-bit Immediates and Addresses

Decoding Machine Language

Sometimes you are forced to reverse-engineer machine language to create the original assembly
language. One example is when looking at “core dump.”

Example

Answer: (look the MIPS instruction encoding and format table)

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Thank You…