Unit 4:

Data Converters
and Multivibrators
 Converters
Types
1. Analog-to-digital converters (ADCs) : It changes analog voltage
into its digital equivalent.
2.Digital-to-analog converters (DACs) : It changes a digital value
back into an analog voltage.

1. Digital-to-analog converters (DACs):

A D/A converter in its simplest form uses an op amp and either binary
weighed resistors or R-2R resistors.
a. Binary-weighted digital-to-analog Converter
 For the accurate operation of D/A converter precise metal film resistors are
recommended.
 The problem with this D/A converter is that it requires binary weighed resistors,
which may not be available if the inputs are more than four.
 An attractive alternative is to use R and 2R resistors for the D/A converter, since it
requires only two sets of precise resistance values.
 D/A Converter with R and 2R resistors

•Here binary inputs are simulated by switches b0 through b3 and outputs

are proportional to the binary inputs.

•b3(MSB) is connected to +5V and b0,b1,b2→Ground

•Thevenizing the circuit to left of switch b3.The thevenin equivalent resistance R th is

Rth  2 R // 2 R   R  // 2 R   R// 2 R   R  2 R

 Advantage and disadvantage of R-2R Ladder D/A Converter
 The great advantage of D/A converter is it requires only two sets of precision resistance
values.
 As the number of inputs is increased beyond four both D/A circuits becomes more complex
and their accuracy degenerates.
 Analog-to-Digital Converters
The analog to digital conversion is the process of converting an analogue
input voltage into an equivalent digital signal. A number of different
methods are developed and used for A/D conversion.

Two methods are discussed in detailed here.

1. Dual Slope Conversion

2. Ladder Network Conversion
 Dual Slope A/D Conversion
Block diagram

Operation
• For a fixed interval the analog input voltage is connected to the integrator, raises
the voltage in the comparator to some positive level.
• At the end of the fixed interval, the voltage from the integrator is greater for greater
input voltages.
• At the end of the fixed interval, the counter is reset to 0 and the electronic switch
connects the integrator input to a fixed input or reference voltage
• The integrator output (or capacitor input) decreases at a fixed rate as shown in figure.

• The counter advances during this time.

• When the integrator output (connected to the comparator input) falls below the
reference level of the comparator, control logic stops counter.
• The digital counter output is the digital conversion of the analog input.
Ramp A/D conversion(Ladder Network Conversion)
Operation:
Assume the analog input VA is positive.
When a start pulse is applied, it resets the counter to zero and initiates the operation of Ladder
network(DAC) which produces a linear ramp output signal, VREF =Kt, where K is a constant and t is
the time.
A comparator then continuously compares the reference ramp signal, V REF with analog input
voltage VA.
The resulting output of the comparator represents a binary 0 when V REF is greater than VA and a
binary 1 when VREF is less than VA.
While the comparator output is one, pulses from a clock pulse generator are counted by the
digital counter.
When VREF becomes equal to or exceeds VA, the comparator output changes to a binary zero.
Also by the action of control logic(AND gate),clock pulses are prevented from entering the
counter.
The time during which the comparator output remains in 1 state is proportional to the
magnitude of the input signal VA.
The count in the counter at the instant the comparator changes state is proportional to the
time interval that the comparator output is 1.
Thus the count in the counter is digital representation of the input signal
 Resolution of Analog-to-Digital Converters

The resolution depends on the amount of voltage per step (digital bit):

where n is the number of digital bits

Example:

Determine the resolution of a 12-bit ADC with a 10-V reference level.

 Analog-to-Digital Conversion Time

The conversion time depends on the clock frequency of the counter.

where

Tconv = conversion time (seconds)

n = number of binary bits
f = clock frequency for the counter

Example:
Determine the maximum conversion time for a 12-bit ADC with a 1-MHz
clock.
 555 Timer
-is a multivibrator which is a two-state circuit that has zero, one or two
stable states.
Three Modes
1. Monostable
It can produce accurate time delays from microseconds to hours. It is
otherwise known as one-shot mode. It has one stable state.
Applications include timers, missing pulse detection, bouncefree switches,
touch switches, frequency divider, capacitance measurement, pulse-width
modulation (PWM) etc.

2. Astable
It can produce rectangular waves with a variable duty cycle. It is otherwise
known as free-running multivibrator. It can operate as an oscillator. It has
no stable states.
Uses include LED and lamp flashers, pulse generation, logic clocks, tone
generation, security alarms, pulse position modulation, etc.

3. Bistable
It is used as a Schmitt trigger. It can operate as a flip-flop, if the discharge pin
is not connected and no capacitor is used. It has two stable states.
Uses include bouncefree latched switches, etc.
PIN CONNECTIONS OF 555 TIMER
Pin
Name Purpose
No.
1 GND Ground, low level (0 V)
A short pulse high-to-low on the trigger
2 TRIG starts the timer. It is connected to the lower
comparator.
During a timing interval, the output stays at
3 OUT
+VCC.
A timing interval can be interrupted by
4 RESET
applying a reset pulse to low (0 V).
Control voltage allows access to the internal
5 CTRL
voltage divider (2/3 VCC). Pinout Diagram
of 555 Timer
The threshold at which the interval ends (it
6 THR ends if the voltage at THR is at least 2/3 VCC).
It is connected to the upper comparator.
Connected to a capacitor whose discharge
7 DIS
time will influence the timing interval.
The positive supply voltage which must be
8 V+, VCC
between 3 and 15 V.
 Simplified Block Diagram of a 555 Timer

Composition

1. Voltage Divider
2. Two comparators
3. RS Flip flop
4. NPN Transistor

2
UTP  Vcc
3
1
LTP  Vcc
3
 Monostable Operation

2
UTP  Vcc
3
V
LTP  cc
3
W  1.1R AC

The timer output is a one shot pulse. When an input is received it triggers
a one-shot pulse. The time for which the output remains high can be
calculated as shown.
 555 Timer Connected as Monostable Operation

VCC
Pin 8

Pin 7
Discharge
5kΩ
Pin 6

Threshold
C
UTP Output
5kΩ
Pin 3
Pin 2
Trigger LTP
5kΩ

Pin 1
Ground
Example:
Example
In the figure shown below, VCC= 12V, R=33kΩ and C= 0.47µF.
a.What is the minimum trigger voltage that produces an output pulse?
b.What is the maximum capacitor voltage?
c.What is the width of the output pulse?
+12V

33kΩ

0.47µF
 Astable Operation

The timer output is a repetitive square wave. The output frequency can be calculated
as shown.

W  0.693( R A  R B )C
Thigh  0.693( R A  R B )C
8
Tlow  0.693R B C
T  0.693( R A  2 R B )C
1.44
f 
( R A  2 R B )C
Output
R A  RB
D
R A  2 RB
555 Timer Connected as Astable Operation
Example
Determine the frequency and draw the output waveform for the circuit shown below.

+5V

7.5kΩ

7.5kΩ

0.1µF

0.01µF
 Pulse Width Modulator
The pulse width changes but the period is constant because it is
determined by the frequency of the input triggers. Because the period is
fixed, the position of each pulse is the same, which means that the leading
edge of the pulse always occurs after a fixed interval of time. In this circuit,
the 555 timer is connected as monostable.
It is used in communications. It allows a low-frequency modulating signal
(voice or data) to change the pulse width of a high-frequency signal called
the carrier.
+VCC
1
T
f clock
T
2Vcc
UTP   vmod
A B 3
A
 UTP 
W   RC ln1  
B  Vcc 
Modulating signal W
D
T
A B
Clock
T
 Example
A pulse-width modulator shown below has Vcc=12V, R=9.1kΩ and
C=0.01µF. The clock has a frequency of 2.5 kHz. If a modulating signal
has a peak value of 2V, determine the following:
a.The period of the output pulses
b.The quiescent pulse width
c.The minimum and maximum pulse widths
d.The minimum and maximum duty cycles

+12V
9.1kΩ

0.01µF

A B
Clock=2.5kHz
T
 Pulse Position Modulator
The position (leading edge) of each pulse changes. Both the width and the
period of pulses vary with the modulating signal. In this circuit, the 555
timer is connected as astable.

It is used in communication systems to transfer voice or data.

2Vcc
UTP   vmod
3
 V  UTP 
W  RA  RB C ln cc 
 Vcc  0 . 5UTP 
T  W  0.693RB C
Space  0.693RB C

Pulse Width is Variable

Space is Constant
 Example
A pulse-position modulator shown below has Vcc=12V, RA=3.9 kΩ, RB=3 kΩ
and C=0.01µF. If a modulating signal has a peak value of 1.5V, determine
the following:
a.The period of the output pulses
b.The quiescent pulse width
c.The minimum and maximum pulse widths
d.The space between pulses

+12V

3.9kΩ

3kΩ

0.01µF