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ECE204/EEE204 Electrical Circuits II Laboratory: Verification of KVL and KCL in AC Circuits

This document describes an electrical circuits laboratory experiment to verify Kirchhoff's voltage law (KVL) and Kirchhoff's current law (KCL) in AC circuits. The procedures involve constructing simple circuits in PSPICE simulation software and using the results to verify that the sum of voltages around a loop is equal to the source voltage (KVL) and the sum of currents at a junction is equal to the current entering that junction (KCL).

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225 views7 pages

ECE204/EEE204 Electrical Circuits II Laboratory: Verification of KVL and KCL in AC Circuits

This document describes an electrical circuits laboratory experiment to verify Kirchhoff's voltage law (KVL) and Kirchhoff's current law (KCL) in AC circuits. The procedures involve constructing simple circuits in PSPICE simulation software and using the results to verify that the sum of voltages around a loop is equal to the source voltage (KVL) and the sum of currents at a junction is equal to the current entering that junction (KCL).

Uploaded by

Mr. Dark Bckup
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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ECE204/EEE204

Electrical Circuits II Laboratory

Experiment#02
Verification of KVL and KCL in AC Circuits
KCL(Kirchhoff's Current Law)
• the sum of currents that enter a junction is equal to the
sum of currents that leave the junction
• The sum of all currents that enter an electrical circuit
junction is 0. The currents enter the junction have
positive sign and the currents that leave the junction
have a negative sign. Therefore,
KVL(Kirchhoff's Voltage Law)
• The sum of all voltages or potential differences
in an electrical circuit loop is 0
KVL verification circuit
Procedures
• Construct the circuit in PSPICE as shown in
figure for KVL verification
• Determine the voltage Vs, VR, VL, and VC and the
current I from the schematics
• Sum up all the three voltages VR, VL, and VC
• Then verify,
Vs = VR+ VL+ VC
KCL verification circuit
Procedures
• Construct the circuit in PSPICE as shown in
figure for KCL verification
• Determine the currents IR1, IR2 and IR3 from
the schematics
• Sum up the branch currents IR2 and IR3
• Then verify,
IR1 = IR2 + IR3

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