UNIT-2: PROGRAMMING

MODEL OF 8051 / INSTRUCTION

SET

By:- Dr. Bhalchandra B. Pawar

 INTRODUCTION
 Computer spends more time in data movement than any other operation.
 Data is stored at source address and moved (copied) to destination address,
known as addressing modes
 There are 28 mnemonics for movement, categorised as below
 MOV destination, source
 PUSH source or POP destination
 XCH destination, source
 Addressing Modes
Immediate Addressing
Register Addressing
Direct Addressing

Register – Indirect Addressing

Indexed Addressing
 The MOV opcode transfers data within memory, divided into
four distinct physical parts:
 Internal RAM
 Internal SFR’s
 External RAM
 Internal and External ROM

 Five types of opcodes used to move data

 MOV
 MOVX
 MOVC
 PUSH and POP
 XCH
 IMMEDIATE ADDRESSING
In Immediate Addressing mode, the operand, which follows the Op-code,
is a constant data of either 8 or 16 bits. The name Immediate Addressing
came from the fact that the constant data to be stored in the memory
immediately follows the Op-code.
The constant value to be stored is specified in the instruction itself
rather than taking from a register. The destination register to which the
constant data must be copied should be the same size as the operand
mentioned in the instruction.
Example: MOV A, #30H
Here, the Accumulator is loaded with 30 (hexadecimal). The # in the
operand indicates that it is a data and not the address of a Register.
 Immediate Addressing is very fast as the data to be loaded is given in
the instruction itself.
REGISTER ADDRESSING
 In the 8051 Microcontroller Memory Organization Tutorial, we have
seen the organization of RAM and four banks of Working Registers
with eight Registers in each bank.
 In Register Addressing mode, one of the eight registers (R0 – R7) is
specified as Operand in the Instruction.
 It is important to select the appropriate Bank with the help of PSW
Register. Let us see a example of Register Addressing assuming that
Bank0 is selected.
 Example: MOV A, R5

 Here, the 8-bit content of the Register R5 of Bank0 is moved to the

Accumulator.
DIRECT ADDRESSING
 In Direct Addressing Mode, the address of the data is specified as
the Operand in the instruction. Using Direct Addressing Mode, we
can access any register or on-chip variable. This includes general
purpose RAM, SFRs, I/O Ports, Control registers.

 Example: MOV A, 47H

 Here, the data in the RAM location 47H is moved to the

Accumulator.
 All 128 bytes of internal RAM (00H-7FH) and SFR’s (80H to FFH)
may be addressed directly using single byte address
 REGISTER INDIRECT ADDRESSING
 In the Indirect Addressing Mode or Register Indirect Addressing Mode, the
address of the Operand is specified as the content of a Register. This will be
clearer with an example.
 Example: MOV A, @R1
 The @ symbol indicates that the addressing mode is indirect.
 If the contents of R1 is 56H, for example, then the operand is in the internal RAM
location 56H. If the contents of the RAM location 56H is 24H, then 24H is moved into
accumulator.
 Only R0 and R1 are allowed in Indirect Addressing Mode. These register in the
indirect addressing mode are called as Pointer registers.
 The indirect addressing mode uses a register to hold actual address that will
used to move data. The register itself is not the address, but rather number in
the register.
INDEXED ADDRESSING MODE
 With Indexed Addressing Mode, the effective address of the Operand
is the sum of a base register and an offset register. The Base
Register can be either Data Pointer (DPTR) or Program Counter
(PC) while the Offset register is the Accumulator (A).
 In Indexed Addressing Mode, only MOVC and JMP instructions can
be used. Indexed Addressing Mode is useful when retrieving data
from look-up tables.
 Example: MOVC A, @A+DPTR

 Here, the address for the operand is the sum of contents of DPTR and
Accumulator.
 NOTE: Some other Addressing Modes like Absolute Addressing
Mode, Relative Addressing Mode and Long Addressing Mode.
EXTERNAL DATA MOVES
 An X is added to the MOV mnemonics to remind
eXternal data move
CODE MEMORY (ROM) DATA MOVES
PUSH & POP OPCODES
DATA EXCHANGE
SUMMARY
 LOGICAL OPERATIONS
Bit or Byte level Boolean instructions
BOOLEAN 8051 MNEMONIC
OPERATOR
AND ANL (AND logical)
OR ORL (OR logical)
XOR XRL (exclusive OR logical)
NOT CPL (complement)

Byte level Boolean instructions

Mnemonic Operation

RL Rotate a byte to the left; the Most Significant Bit

(MSB) becomes the Least Significant Bit (LSB)
RLC Rotate a byte and the carry bit left; the carry
becomes the LSB, the MSB becomes the carry
RR Rotate a byte to the right; the LSB becomes the MSB

RRC Rotate a byte and the carry to the right; the LSB
becomes the carry, and the carry the MSB
SWAP Exchange the low and high nibbles in a byte
 BYTE LEVEL LOGICAL OPERATION - I
Mnemonic Operation

ANL A,#n AND each bit of A with the same bit of immediate number n; put the results in A

ANL A,add AND each bit of A with the same bit of the direct RAM address; put the results
in A
ANL A,Rr AND each bit of A with the same bit of register Rr; put the results in A AND
each bit of A with the same bit of the contents of the RAM address contained
in Rp; put the results in A
ANL A,@Rp AND each bit of A with the direct RAM address; put the results in the direct
RAM address
ANL add,A AND each bit of the RAM address with the same bit in the number n; put the
result in the RAM address
ANL add,#n OR each bit of A with the same bit of n; put the results in A

ORL A,#n OR each bit of A with the same bit of the direct RAM address; put the results in
A
ORL A,add OR each bit of A with the same bit of register Rr; put the results in A OR each
bit of A with the same bit of the contents of the RAM address contained in Rp;
put the results in A
ORL A,Rr OR each bit of A with the direct RAM address; put the results in the direct RAM
address
ORL A,@Rp OR each bit of the RAM address with the same bit in the number n; put the
result in the RAM address
ORL add.A XOR each bit of A with the same bit of n; put the results in A
 BYTE LEVEL LOGICAL OPERATION - II
Mnemonic Operation
XRL A,#n XOR each bit of A with the same bit of register Rr; put the
results in A XOR each bit of A with the same bit of the contents
of the RAM address contained in Rp; put the results in A
XRL A,add XOR each bit of A with the direct RAM address; put the results in
the direct RAM address
XRL A,Rr Operation

XRL A,@Rp AND each bit of A with the same bit of immediate number n; put
the results in A
XRL add,A AND each bit of A with the same bit of the direct RAM address;
put the results in A
XRL add,#n XOR each bit of the RAM address with the same bit in the
number n; put the result in the RAM address
CLR A Clear each bit of the A register to zero
CPL A Complement each bit of A; every I becomes a 0, and each 0
becomes a 1
CAUTION
If the direct address destination is one of the port SFRs, the data latched in the SFR, not the pin data, is
used.
 BIT LEVEL LOGICAL OPERATION
Bit-Level Boolean Operations
ANL C,b AND C and the addressed bit; put the result in C

ANL C,/b AND C and the complement of the addressed bit; put the result in C; the
addressed bit is not altered
ORL C,b OR C and the addressed bit; put the result in C

ORLC,/b OR C and the complement of the addressed bit; put the result in C; the
addressed bit is not altered
CPLC Complement the C flag

CPL b Complement the addressed bit

CLRC Clear the C flag to zero

CLR b Clear the addressed bit to zero

MOV C,b Copy the addressed bit to the C flag

MOV b,C Copy the C flag to the addressed bit

SETB C Set the flag to one

SETB b Set the addressed bit to one

CAUTION
Only the SFRs that have been identified as bit addressable may be used in bit operations. If the destination bit is a port
bit, the SFR latch bit is affected, not the pin.
ANL C,/b and ORL C,/b do not alter the addressed bit b,
 ROTATE AND SWAP OPERATIONS
Mnemonic  Operation

RL A Rotate the A register one bit position to the left;

RLC A Rotate the A register and the carry flag. as a ninth bit, one
bit position to the left;
RR A Rotate the A register one bit position to the right;

RRC A  Rotate the A register and the carry flag, as a ninth bit, one
bit position to the right;
SWAP A  Interchange the nibbles of register A; put the high nibble
in the low nibble position and the low nibble in the high
nibble position

CAUTION
Know the state of the carry flag when using RRC or RRL.
 Rotation and swap operations are limited to the A register.
ARITHMETIC OPERATION

Mnemonic Operation

INC destination Increment destination by 1

DEC destination Decrement destination by 1
ADD/ADDC Add source to destination with / without carry (C) flag
destination, source
SUBB destination, Subtract wit borrow (carry) source from destination
source
MUL AB Multiply contents of register A and B
DIV AB Divide contents of register A by the contents of register B
DA A Decimal Adjust register A
INCREMENTING AND DECREMENTING
Mnemonic Operation

INC A Add a one to the A register

INC Rr Add a one to the register Rr
INC add Add a one to the direct address
INC @Rp Add a one to the contents of address in Rp
INC DPTR Add a one to the 16-bit DPTR
DEC A Subtract a one from register A
DEC Rr Subtract a one from register Rr
DEC add Subtract a one from content of direct address
DEC @Rp Subtract a one from contents of the address in Rp
CAUTION: No math flags are affected
All 8-bit & 18-bit address contents overflow from FFH to 00H & FFFFH to 0000H and underflow
from 00H to FFH
There is no DEC DPTR like INC DPTR
 ADDITION
Mnemonic Operation

ADD A,#n Add A and immediate number n; put the sum in A

ADD A,Rr Add A and registar Rr; put the sum in A
ADD A,add Add A and the address content; put the sum in A
ADD A,@Rp Add A and contents of the address in Rp; put the sum in A
ADDC A,#n Add contents of A, immediate number n and the C flag; put the
sum in A
ADDC A,Rr Add contents of A, register Rr and the C flag; put the sum in A
ADDC A,add Add contents of A, direct address content and the C flag; put the
sum in A
ADDC A,@Rp Add contents of A, content of indirect address Rp and the C flag;
put the sum in A
CAUTION:- ADDC is used to add carry after LSB addition in multi-byte process.
ADD is normally used for LSB addition
SUBTRACTION / MULTIPLICATION / DIVISION
Mnemonic Operation

 SUBB A,#n Subtract immediate number n and the C flag from A; put the result in A

SUBB A,add Subtract the contents of add and the C flag from A; put the result in A

 SUBB A,Rr  Subtract Rr and the C flag from A; put the result in A

SUBB A,@Rp Subtract the contents of the address in Rp and the C flag from A; put the result
in A
CAUTION :- Remember to set the carry flag to zero if it is not to be included as part of the
subtraction operation.
MUL AB Multiply A by B: put the low-order byte of the product in A, put the high-order
byte in B

CAUTION :- Note there is no comma between A and 8 in the MUL mnemonic.

DIV AB Divide A by B; put the integer part of quotient in register A and the integer part
of the remainder in B
CAUTION :- The original contents of B (the divisor) are lost.
Note there is no comma between A and B in the DIV mnemonic.
DA A Adjust the sum of two packed BCD numbers found in A register; leave the
adjusted number in A.
CAUTION :- All numbers used must be in BCD form before addition. Only ADD and ADDC are
adjusted to BCD by DA A.
JUMP AND CALL OP-CODES

 Jump on bit conditions

 Compare bytes and jump if not equal

 Decrement byte and jump if zero

  Jump unconditionally

 Call a subroutine

 Return from a subroutine

JUMP INSTRUCTION RANGE
 JUMPS – BIT JUMPS
Mnemonic Operation
JC radd Jump relative if the carry flag is set to 1
JNC radd Jump relative if the carry flag is reset to 0
JB b,radd Jump relative if addressable bit is set to 1
JNB b,radd  Jump relative if addressable bit is reset to 0
JBC b,radd Jump relative if addressable bit is set, and clear addressable bit to 0
Label Mnemonic Comment
LOOP: MOV A,#l0h ; A = l0h
 
  MOV R0, A ;R0 = l0h
ADDA: ADD A,R0 ;add R0  to A
 
  JNC ADDA

END
CAUTION
All jump addresses, such as ADDA and ADDR, must be within + 127d, -128d of the instruction
following the jump opcode. If the addressable bit is a flag bit and JBC is used, the flag bit will be
cleared. Do not use any label names that are also the names of registers in the 8051. These are
called "reserved" words and will cause great agitation in the assembler.
 JUMPS – BYTE JUMPS
Mnemonic Operation
CJNE A,add,radd Compare the contents of the A register with the contents of the direct address; if
they are not equal, then jump to the relative address; set the carry flag to I if A is
less than the contents of the direct address; otherwise, set the carry flag to 0
CJNE A,#n,radd Compare the contents of the A register with the immediate number n; if they are
not equal, then jump to the relative address; set the carry flag to I if A is less than
the number; otherwise, set the carry flag to 0
CJNE Compare the contents of register Rn with the immediate number n; if they are not
Rn,#n,radd equal, then jump to the relative address; set the carry flag to I if Rn is less than the
number; otherwise, set the carry flag to 0
CJNE Compare the contents of the address contained in register Rp to the number n; if
@Rp,#n,radd they are not equal, then jump to the relative address; set the carry flag to I if the
contents of the address in Rp are less than the number; otherwise, set the carry flag
to 0
DJNZ Rn,radd Decrement register Rn by I and jump to the relative address if the result is not zero;
no flags are affected
DJNZ add,radd Decrement the direct address by I and jump to the relative address if the result is
not O; no flags are affected unless the direct address is the PSW
JZ radd Jump to the relative address if A is 0; the flags and the A register are not changed
JNZ radd Jump to the relative address if A is not O; the flags and the A register are not
changed
 UNCONDITIONAL JUMPS
Mnemonic Operation

 JMP @A+DPTR Jump to the address formed by adding A to the DPTR; this is an unconditional
jump and will always be done; the address can be anywhere in program
memory; A, the DPTR, and the flags are unchanged

AJMP sadd Jump to absolute short range address sadd; this is an unconditional jump and
is always taken; no flags are affected
LJMP ladd Jump to absolute long range address ladd; this is an unconditional jump and is
always taken; no flags are affected
SJMP radd Jump to relative address radd; this is an unconditional jump and is always
taken; no flags are affected
NOP Do nothing and go to the next instruction; NOP (no operation) is used to
waste time in a software timing loop; or to leave room in a program for later
additions; no flags are affected
CAUTION
DJNZ decrements first, then checks for 0. A location set to 00h and then decremented goes to FFh,
then FEh, and so on, down to 00h.
CJNE does not change the contents of any register or RAM location. It can change the carry flag to 1
if the destination byte is less than the source byte.
There is no zero flag; the JZ and JNZ instructions check the contents of the A register for 0. JMP @A+
DPTR does not change A, DPTR, or any flags.
 CALL AND RETURNS
Mnemonic Operation
ACALL sadd Call the subroutine located on the same page as the address of the
opcode immediately following the ACALL instruction: push the
address of the instruction immediately after the call on the stack

LCALL ladd Call the subroutine located anywhere in program memory space; push
the address of the instruction immediately following the call on the
stack
RET Pop two bytes from the stack into the program counter
RETI Pop two bytes from the stack into the program counter and reset the
interrupt enable Hip-Hops
CAUTION
Set the stack pointer above any area of RAM used for additional register banks or data memory. The
stack may only be 128 bytes maximum; which limits the number of successive calls with no returns
to 64.
Using RETI at the end of a software called subroutine may enable the interrupt logic erroneously. To
jump out of a subroutine (not recommended), adjust the stack for the two return address bytes by
POPing it twice or by moving data to the stack pointer to reset it to its original value.
Use the LCALL instruction if your subroutines are normally placed at the end of your program
8051 DATA TYPES
 The DB directive is the most widely used data directive
in the assembler. It is used to define the 8-bit data. When
DB is used to define data, the numbers can be in
decimal, binary, hex, or ASCII formats.
 8051 DIRECTIVES
 ORG (origin)
The ORG directive is used to indicate the beginning of the address. The number that comes after
ORG can be either in hex or in decimal. If the number is not followed by H, it is decimal and the
assembler will convert it to hex. Some assemblers use “.ORG” (notice the dot) instead of “ORG”
for the origin directive. Chk your assembler.

 EQU (equate)
This is used to define a constant without occupying a memory location. The EQU directive does
not set aside storage for a data item but associates a constant value with a data label so that when
the label appears in the program, it’s constant value will be substituted for the label.
COUNT EQU 25
MOV R2,#COUNT

 END directive
Another important pseudo-code is the END directive. This indicates to the assembler the end of
the source (asm) file. The END directive is the last line of an 8051 program, meaning that in the
source code anything after the END directive is ignored by the assembler. Some assemblers use “.
END” (notice the dot) instead of “END”.
RULES FOR LABELS IN ASSEMBLY LANGUAGE
 By choosing label names that are meaningful, a programmer can
make a program much easier to read and maintain. There are
several rules that names must follow.
 Each label name must be unique.
 The names used for labels in Assembly language programming consist
of alphabetic letters in both uppercase and lowercase, the digits 0
through 9, and the special characters question mark (?), period (.), at
(@), underline (_), and dollar sign ($).
 The first character of the label must be an alphabetic character. In other
words it cannot be a number.
 Every assembler has some reserved words that must not be used as
labels in the program.
 Foremost among the reserved words are the mnemonics for the
instructions. For example, “MOV” and “ADD” are reserved since they
are instruction mnemonics.
 In addition to the mnemonics there are some other reserved words.
Check your assembler for the list of reserved words.
 An Assembly language instruction consists of four
fields:

 [Label]: Mnemonics [Operands] ;Comment

 Here: MOV A,R0 ;Move content from R0 in to A

MACHINE V/S ASSEMBLY V/S HIGH LEVEL LANGUAGE
 Machine language
 In Machine language or Machine Code, the instructions are written in binary bit patterns i.e.
combination of binary digits 1 and 0, which are stored as HIGH and LOW Voltage Levels.
This is the lowest level of programming languages and is the language that a Microcontroller
or Microprocessor actually understands.
 Assembly Language
 The next level of Programming Language is the Assembly Language. Since Machine
Language or Code involves all the instructions in 1’s and 0’s, it is very difficult for humans to
program using it.
 Assembly Language is a pseudo-English representation of the Machine Language. The 8051
Microcontroller Assembly Language is a combination of English like words called
Mnemonics and Hexadecimal codes.
 It is also a low level language and requires extensive understanding of the architecture of the
Microcontroller.
 High-level Language
 The name High-level language means that you need not worry about the architecture or other
internal details of a microcontroller and they use words and statements that are easily
understood by humans.
 Few examples of High-level Languages are BASIC, C Pascal, C++ and Java. A program
called Compiler will convert the Programs written in High-level languages to Machine Code.
 Why Assembly Language?
Although High-level languages are easy to work with, the following reasons point out
the advantage of Assembly Language
 The Programs written in Assembly gets executed faster and they occupy less memory.
 With the help of Assembly Language, we can directly exploit all the features of a
Microcontroller.
 Using Assembly Language, we can have direct and accurate control of all the
Microcontroller’s resources like I/O Ports, RAM, SFRs, etc.
 Compared to High-level Languages, Assembly Language has less rules and restrictions.
STEPS TO CREATE ASSEMBLY PROGRAM
Editor Program

My file.asm

Assembler
Program
Myfile.lst
Other .obj files

Myfile.obj

Linker Program

Myfile.abs

0H
Program

Myfile.hex
LED INTERFACING WITH 8051
MICROCONTROLLER
LED INTERFACING WITH 8051
MICROCONTROLLER

Digit a b c d e f g dp Hex
0 1 1 1 1 1 1 0 0 3FH
1 0 1 1 0 0 0 0 0 06H
2 1 1 0 1 1 0 1 0 5BH
3 1 1 1 1 0 0 1 0 4FH
4 0 1 1 0 0 1 1 0 66H
5 1 0 1 1 0 1 1 0 6DH
6 1 0 1 1 1 1 1 0 7DH
7 1 1 1 0 0 0 0 0 07H
8 1 1 1 1 1 1 1 0 7FH
9 1 1 1 1 0 1 1 0 6FH
INTERFACING 7-SEGMENT DISPLAY TO 8051
ASSEMBLY PROGRAM TO DISPLAY 0 TO 9 ON SSD
 ORG 000H
START: MOV A,#00001001B
MOV B,A
MOV R0,#0AH
LABEL: MOV A,B
INC A
MOV B,A
MOVC A,@A+PC
MOV P1,A
ACALL DELAY
DEC R0
MOV A,R0
JZ START
SJMP LABEL
DB 3FH // digit drive pattern for 0
DB 06H // digit drive pattern for 1
DB 5BH // digit drive pattern for 2
DB 4FH // digit drive pattern for 3
DB 66H // digit drive pattern for 4
DB 6DH // digit drive pattern for 5
DB 7DH // digit drive pattern for 6
DB 07H // digit drive pattern for 7
DB 7FH // digit drive pattern for 8
DB 6FH // digit drive pattern for 9
DELAY: MOV R4,#05H
WAIT1: MOV R3,#05H
WAIT2: MOV R2,#05H
WAIT3: DJNZ R2,WAIT3
DJNZ R3,WAIT2
DJNZ R4,WAIT1
RET
END
 ?
THANK YOU!