LNA

High linearity and high input impedance matching common gate CMOSLNA in 2.
4GHz ISM band
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Abstract
• A high linearity and low input reflection coefficient (<−10 dB)
common gate CMOS LNA has been fabricated in this paper
using 90nm CMOS technology. The low noise amplifier is
optimized for working in the 2.4 GHz frequency band range.
The common gate topology with pi-matched input provides
high IIP3 and best input matching characteristics. Advanced
Design System (ADS) software is used for simulation. The
fabricated LNA uses 1.2V supply voltage and it exhibits a
linearity of 12 dBm, input reflection coefficient (S11) of
−26.894 dB, reverse gain (S12) of −18.604 dB, noise figure of
3.513 dB, and gain of 7.526.
Introduction
• The front-end of wireless communication receivers are
becoming sophisticated day-by-day as they employ
complex functionalities and provide high flexibility,
which is demanded by the consumers and moreover, the
standards are continuously evolving. The major block
present in the front end of the RF receiver is the low noise
amplifier (LNA)
Existing method
• Low noise amplifiers are used in variety of applications. RF
communication systems, two way radio, personal digital assistant
(PDA) and laptops etc., are some of the examples in which low noise
amplifiers are used. The inductively degenerated common-source (CS)
low noise amplifier topology is commonly used for narrowband
applications as higher gain and lower noise figure is provided by this
topology but it is difficult to achieve impedance matching at the input
when compared to common gate (CG) low noise amplifier topology,
below 10 GHz. Moreover, the number of inductors required by
inductively degenerated common source LNA topology (4 or 6 for
differential amplifier) is more as compared to common gate low noise
amplifier topology. Hence, area on chip occupied by inductively
degenerated common source low noise amplifier topology is more
Proposed method
• Therefore, the common gate (CG) low noise amplifier topology has
been proposed in this paper and proposed circuit as shown in figure
1, is utilized for input matching. However, due to impedance
matching constraint, common gate low noise amplifier has low gain
and high noise figure
• In conventional common gate (CG) low noise amplifier
topology, the trans conductance of the main transistor
should be inverse of source resistance i.e. l/gm = Rs, for
input matching. For the entire frequency range of
operation, this condition should hold true.
Circuit Design
• The complementary MOS (CMOS) transistor is used in
low noise amplifiers because of its good characteristics.
High immunity against noise and static power are two of
the important characteristics of CMOS transistors. The
internal structure of CMOS contains a NMOS and PMOS
transistor in series. So, the power is drawn by the series
combination momentarily when there is switching
between ON and OFF states, because one of the transistor
in the series connection is always OFF. Hence, the heat
produced by CMOS devices is less as compared to other
logic families such as transistor transistor logic (TTL),
NMOS, etc.
Circuit Design conti..
• The proposed LNA consists of common gate and common source

stages, of which at the first stage, for the input matching, the common
gate topology is adopted. Parallel resonance is present instead of series
resonance for the input matching of common gate amplifier
• However, the power gain of common gate amplifier is lower than

common source amplifier. So, a common source amplifier is used in
second stage of our circuit to compensate for the power gain. To ensure
that the circuit is optimized, the LC tank circuit is matched for the
center frequency. To block RF current leakage to ground, inductor L2
is used. As compared to common source amplifier, the value of L2 for
common gate amplifier is higher. C1, L1 and C2 form pi-matching
network at input and C5 is the DC blocking capacitor.
Soft wear requirement
• Advance Design simulation
• Technology =90nm
• VDC=1.8 volts
conclusion
• In this project, a 2.4GHz CMOS LNA using
common gate topology for IEEE 802.15.4
ZigBee standard is proposed. Best matching at
input is achieved as the value of input
refection coefficient (S11) is −26 dB (< −10
dB), because a common gate amplifier is used
at input stage, and maximum linearity of 12
dBm is obtained due to pi-matching circuit
used at input, at 1.2V power supply.

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High linearity and high input impedance matching common gate CMOSLNA in 2.

4GHz ISM band

• The proposed LNA consists of common gate and common source

• However, the power gain of common gate amplifier is lower than

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