Digital Computer

Memory unit is an essential component in any digital computer since it is needed to store
programs and data.
 Memory Hierarchy
• Single memory unit can not accommodate all the programs and data.
• The memory unit that directly communicates with the CPU is called main memory e.g. RAM & ROM.
• Devices that provide backup storage are called auxiliary memory e.g. magnetic disks & tapes.
• A special and very high speed memory called a cache is used to provide program and data available
to CPU at rapid rate
• Memory hierarchy consists of all storage devices from smaller and faster cache memory to high
capacity and slow auxiliary memory.
 Main Memory
It is used to store program and data during the computer operation.
• RAM: Random Access Memory
RAM chips are available in two operating modes:
• Static RAM – consists of internal flip flops that store binary information. The stored information remains valid as
long as power is applied to the unit.
• Dynamic RAM – stores the information in capacitors in the form of charges. The stored charge tends to
discharge with time therefore capacitors must be periodically recharged by refreshing them.

• ROM: Read Only Memory

ROM chips are used to store the programs that are permanently resident and do not change
once the computer is manufactured.
 RAM Chip
• Capacity of RAM chip is 128 words of
8 bits per word.
• It requires 7 bit address and 8 bit
bidirectional data bus.
• Read and Write input specifies the
memory operation.
• Chip select (CS) control inputs are for
enabling the chips.

Figure: Typical RAM chip

 ROM Chip

• Capacity of ROM chip is 512 words of

8 bits per word.
• It requires 9 bit address and 8 bit
data bus.
• Chip select (CS) control inputs are for
enabling the chips.

Figure: Typical ROM chip

 Memory Address Map
• To design a computer, amount of memory (RAM and ROM) is calculated.
• The interconnection between memory and processor is established.
• Addressing of memory is established by means of a table called memory address map.
• To demonstrate with particular example, assume that a computer with 1024 bytes that needs 512
bytes of RAM and 512 bytes of ROM.
Memory Address Map

Table: Memory address map for a computer

Figure: Memory connections to CPU

 Problem
a. How many 128 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?
b. How many lines of the address bus must be used to access 2048 bytes of memory? How
may of these lines will be common to all chips?
c. How many lines must be decoded for chip select? Specify the size of the decoders.

Solution:
 Problem
A computer uses RAM chips of 1024 x 1 capacity.
a. How many chips are needed, and how should their address lines be connected to provide a
memory capacity of 1024 bytes?
b. How many chips are needed to provide a memory capacity of 16K bytes?

Solution:
Auxiliary or Secondary Memory
 Magnetic media
 Tape
 Disks
 Pen Drive
 Data Card
 Optical Media
 Compact Discs
 CD-R, WORM (Write Once, Read Many)
 CD-RW
 DVD
 DVD-R
 DVD-RW
 Magnetic Tape
• It is sequential memory which contains thin plastic ribbon to store data and
coated by magnetic oxide.
• In magnetic tape only one side of the ribbon is used for storing data.
• Data read/write speed is slower because of sequential access.
• It is highly reliable which requires magnetic tape drive writing and reading
data.
• Old data on a tape an automatically erased as
• New data are recorded in the same area
• Different types of tape are available like ½ inch
and ¼ inch wide plastic tape
Solution:-
Transfer Rate = 120 Inches/Second * 1600 Bits/Inch
= 192000 Bits/ Second

Transfer Rate= 2400 Bytes/Second

 Advantages and Disadvantages of Magnetic
Tape
• Inexpensive to store large amounts of information.
• A reel of tape could store as much as 225 MB in the early 1980s.
• No other storage technology could compare to the price of tape

• Sequential access – Slow access

• Tapes are highly susceptible to magnetic fields and changes in temperature and
humidity

•
 Magnetic Tape Uses Today
• Today, tape based systems are usually used for backup purposes only.

• Tape still provides the most cost effective method of storing larger amounts of
backup information
• Reliable as long as temperature is kept low and humidity conditions are kept
right.

• Although hard disks are increasingly used as a backup mechanism, tapes are
portable.
• Backups can be taken off-site for greater risk prevention
 Magnetic Disk
• Data are represented physically as magnetization on a circular platter
• Platters as stacked atop each other on a single rotating spindle
• The distance between platters is large enough to make room for a read/write disk
head mounted on a pivoting actuating arm. One read/write head per surface. All
actuating arms mounted rigidly on the same axle.
• Each platter is broken up into tracks and sectors
• Tracks are concentric circles on the disk
• Each track is broken up into a series of sectors

Track (Brownish
ring)

Sector (Brownish
Red ring
between the lines)
Magnetic Disk
MAGNETIC DISK
 Disk Access Time
1. Seek time: position the head over the proper track (3 to 13 ms avg)
• due to locality of disk references the actual average seek time may be only 25% to 33% of the
advertised number
2. Rotational latency: wait for the desired sector to rotate under the head (½ of 1/RPM converted to ms)
• 0.5/5400RPM = 5.6ms to 0.5/15000RPM = 2.0ms
3. Transfer time: transfer a block of bits (one or more sectors) under the head to the disk controller’s
cache (70 to 125 MB/s are typical disk transfer rates in 2008)
• the disk controller’s “cache” takes advantage of spatial locality in disk accesses
• cache transfer rates are much faster (e.g., 375 MB/s)
4. Controller time: the overhead the disk controller imposes in performing a disk I/O access (typically < .2
ms)
 Disk Access Time
• Access Time = avg seek time + avg rot delay + transfer time + controller overhead
Example:
• Transfer size is 8K bytes
• Advertised average seek is 12 ms
• Disk spins at 7200 RPM
• Transfer rate is 4 MB/sec
Solution:
Access Time = avg seek time + avg rot delay + transfer time + controller overhead
= 12 ms + 0.5/(7200 RPM/60*1000 ms) + 8 KB/4 MB/s + .2 ms
= 12 + 4.15 + 2 + .2
= 18.35 ms
• measured average seek time is 1/4 to 1/3 of the advertised average seek time, then
Avg disk read/write = 4.0 + 4.15 + 2 + .2
= 10.35 ms
 Disk Access Time
Example:
Find the average time to read or write a 512B sector for a disk rotating at 15,000 RPM with
average seek time of 4 ms, a 100MB/sec transfer rate, and a 0.2 ms controller overhead

Solution:
Access Time = avg seek time + avg rot delay + transfer time + controller overhead
Avg disk read/write = 4.0 ms + 0.5/(15,000RPM/(60*1000)+ 0.5MB/(100MB/1*1000 ms) +
0.2 ms
= 4.0 + 2.0 + 5 + 0.2
= 11.2 ms
If the measured average seek time is 25% of the advertised average seek time, then
Avg disk read/write = 1.0 + 2.0 + 5 + 0.2 = 8.2 ms
 Associative Memory or
Content Addressable Memory (CAM)
* A memory unit accessed by content is
called an associative memory or content
addressable memory

* Do parallel match

* Very costly
Match Logic
• Neglect key bit and compare argument bit with the bit stored in the cell

• Match the word in argument register with content an mark them in match reg

• Include key bit in comparison logic

• Match logic for the word i

• In general, Boolean function for match logic

Read and Write operations in Associative Memory
 Cache Memory
• Cache memory is an extremely fast memory type that acts as a buffer between
RAM and the CPU.
• It holds frequently requested data and instructions so that they are immediately
available to the CPU when needed.
• Cache memory is used to reduce the average time to access data from the Main
memory.
• Cache memory is costlier than main memory or disk memory but economical
than CPU registers.
 Locality of Reference

• Locality of reference refers to a phenomenon in which a computer program tends

to access same set of memory locations for a particular time period. In other
words, Locality of Reference refers to the tendency of the computer program to
access instructions whose addresses are near one another. The property of
locality of reference is mainly shown by loops and subroutine calls in a program.
 Cache Performance
• When the processor needs to read or write a location in main memory, it first
checks for a corresponding entry in the cache.
• If the processor finds that the memory location is in the cache, a cache hit has
occurred and data is read from cache
• If the processor does not find the memory location in the cache, a cache miss has
occurred. For a cache miss, the cache allocates a new entry and copies in data
from main memory, then the request is fulfilled from the contents of the cache.
• The performance of cache memory is frequently measured in terms of a quantity
called Hit ratio.
• Hit ratio = hit / (hit + miss) = no. of hits/total accesses
• We can improve Cache performance using higher cache block size, higher
associativity, reduce miss rate, reduce miss penalty, and reduce the time to hit in
the cache.
 Cache Mapping
• Cache mapping defines how a block from the main memory is mapped to the
cache memory in case of a cache miss.
OR
• Cache mapping is a technique by which the contents of main memory are
brought into the cache memory.
• There are three different types of mapping used for the purpose of cache
memory which are as follows:
• Direct mapping,
• Associative mapping, and
• Set-Associative mapping. 
 Direct Mapping

• The simplest technique, known as direct mapping, maps each block of main
memory into only one possible cache line.
OR
• In Direct mapping, assign each memory block to a specific line in the cache. If a
line is previously taken up by a memory block when a new block needs to be
loaded, the old block is trashed. An address space is split into two parts index
field and a tag field. The cache is used to store the tag field whereas the rest is
stored in the main memory.
Direct Mapping
 Associative Mapping
• Fastest and most flexible organization of cache
Set Associative Mapping
Writing into cache
• Write through
• Write back
• Cache initialization
• Valid bit
12.16
The access time of a cache memory is 100 ns and that of main memory
1000 ns. It is estimated that 80 percent of memory requests are for read
and remaining 20 percent for write. The hit ratio for read access only is
0.9. A write through procedure is used.
a) What is average access time of the system considering only memory
read cycle?
b) What is the average access time of the system for both read and
write requests?
c) What is the hit ratio taking into consideration the write cycle?
@
12.18
A digital computer has a memory unit of 64K X 16 and a cache memory
of 1K words. The cache used direct mapping with a block size of four
words.
a) How many bits are there in each tag, index, block and word fields of
address format?
b) How many bits are there in each word of cache , and how are they
divided into functions? Include a valid bit.
c) How many blocks can the cache accommodates?
12.15
A two way set associative cache memory uses blocks of four words. The
cache can accommodate a total of 2048 words from main memory. The
main memory size is 128K X 32.
a) Formulate all pertinent information required to construct the cache
memory.
b) What is the size of cache memory?
 VIRTUAL MEMORY
• Concept between primary (main) memory and secondary (auxiliary)
memory.
• Address space – set of virtual addresses
• Memory space – set of physical addresses
• Address space is larger than memory space
Address Mapping using Page Table
• Blocks or page frame
• physical memory broken into groups of equal size
• May range from 64 words to 4096 words
• Pages
• group of address space of same size as of block
Associative Memory Page Table
 Page Replacement
• Page fault- if page referenced by CPU is not in main memory, page
fault occurs.
• If page fault occurs, process is suspended and required page is
transferred from secondary memory to main memory by the I/O
processor.
• If main memory is full then a memory block is removed to make space
for new page.
• The policy for choosing block to remove is called page replacement
algorithm
• Process is resumed as soon as page is available in the main memory.
Page Replacement Techniques/ Algorithms

• FIFO (First In First Out) – the FIFO algorithm, swaps out the page at the front of the
queue, that is the page which has been in the memory for the longest time.
With the oldest page at the front and the most recent page at the back.

• LRU (Least Recent Used) –In LRU, whenever page replacement happens, the page
which has not been used for the longest amount of time is replaced.

• Optimal Page Replacement Algorithm:- In this algorithm, pages are replaced which
would not be used for the longest duration of time in the future.
12.19
An address space is specified by 24 bits and corresponding memory
space by 16 bits.
a. How many words are there in the address space?
b. How many words are there in the memory space?
c. If a page consists of 2K words, how many pages and blocks are there in the
system?
 TOTAL ADDRESSES IN 8 PAGES

PAGES ADDRESSES IN DECIMAL

PAGE 0 0000-1023
PAGE 1 1024-2047
PAGE 2 2048-3071
PAGE 3 3072-4095
PAGE 4 4096-5119
PAGE 5 5120-6143
PAGE 6 6144-7167
PAGE 7 7167-8191
 2D & 2.5D Memory Organization
A 16-word memory of 5-bit words using the conventional organization
D Memory Organization

• Figure shows a D memory

organization of 16 words, each word
having 5 bits
• In this example, the total number of
word select lines goes down from
16(conventional organization) to 8.
 D Memory Organization

• If the MAR had 10 bits, there would be 1024 word select wires in the
traditional organization, but only 64 in theD organization.
• If the MAR had 32 bits, the traditional organization would require about 4
billion word select wires. IfD organization were used, the MAR would split
into two 16-bit sections, each creating 216, or 65536, wires. Since there are
two of them, this creates 131,072 wires. The ratio of these two sizes is
0.000030518 or about 0.003%. What a saving of wires!
• D memory organization is almost always used on real memory chips today
because the savings in wiring and gates is so dramatic.