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Lecture 2

The document provides an overview of the software architecture and register model of the 8088 and 8086 microprocessors. It discusses the various register types like segment registers, instruction pointer, index registers, pointer registers, data registers and status register. It explains how these registers are used along with segment selectors to generate 20-bit physical addresses and access different memory segments in order to execute instructions and operate on data. Key aspects covered include memory segmentation, code segment, stack, input/output addressing and generating effective addresses.
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© © All Rights Reserved
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0% found this document useful (0 votes)
32 views

Lecture 2

The document provides an overview of the software architecture and register model of the 8088 and 8086 microprocessors. It discusses the various register types like segment registers, instruction pointer, index registers, pointer registers, data registers and status register. It explains how these registers are used along with segment selectors to generate 20-bit physical addresses and access different memory segments in order to execute instructions and operate on data. Key aspects covered include memory segmentation, code segment, stack, input/output addressing and generating effective addresses.
Copyright
© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Lecture # 2

Software Architecture of the


8088 & 8086 µP
Learning Objective:

 To perform any operation from 8086


or 8088 Microprocessors, we have to
program it with Assembly Language.
In this lecture we explore Microprocessor
from Software Point of View. And in the
process we learn how the microprocessor,
and its memory and input/ouput sub-
syetms operates.
Topics to Cover: (Ch-2)

 Software Model of 8088/8086 µP


 Segment Registers and Memory
Segmentation
 Instruction Pointer
 Pointer Register
 Index Registers
 Data Registers
 Status Register
 Generating a Memory Address
 The Stack
 Input/Output Address Space
Software Model of
8088/8086 µP
In order to program µP, one have
to consider the processor view
as shown in fig:
 Remember our aim is to understand
the microprocessor operation from
a software point of view.
 One does not have to know the
function of various pins, electrical
signals, electrical connections or their
electrical switching characteristics.
 The function, interconnection and
operation of the internal circuits of
microprocessors may not need to
consider at this stage.
Software Model of
8088/8086 µP
 Internally, it contains Registers. All
the abbreviations in the figure are
actually the name of registers.
 Each Register is of 16-bit as
8086/8088 is of 16-bit.
 No of Registers: 13 + SR = 14

Registers names are:


Software Model of
8088/8086 µP
Software Model of
8088/8086 µP
Input/Output Address Space:
Software Model of
8088/8086 µP
Topics to Cover: (Ch-2)

 Software Model of 8088/8086 µP


 Segment Registers and Memory
Segmentation
 Instruction Pointer
 Pointer Register
 Index Registers
 Data Registers
 Status Register
 Generating a Memory Address
 The Stack
 Input/Output Address Space
Segment Registers and
Memory Segmentation
 Memory Segmentation:
 Although 8086/8088 µP can access
up to 1MByte of Memory. Not all
this memory is active at a time
due to lack of resources.
 Actually, 1 MByte of memory is
partitioned into 64K Segments.
Why??
 For the time being, remember
each register is of 16-bit, so one
can get maximum value of 2^16=
65536 = 64K.
 Only four of these 64K segments
are active at a time.
Segment Registers and
Memory Segmentation
 Memory Segmentation:
 Partitioned into 64K Segments.
 Only 4 Segments out of all
64K Segment will be active.

 Why?? Answer is:


 Segment Registers:
 Four Segment Register:
CS, DS, SS, ES
Segment Registers and
Memory Segmentation
 Code
Data Segment:
Stack
Extra Segment:
Segment:
Segment:
Stores
Stores
Also forInstructions
Program
Temporary
Data Data.
i.e. Codes
Storage.
Information
like Push, Pop, Jump, Call etc.  Actually, data
code
stores in the
memory.
 Data
Code Segment
Segment
Register contains
the Base
Address i.e.
Starting Address
on which the
instructions
data started to
started to enter.
enter.
Segment Registers and
Memory Segmentation
Dedicated, Reserved And
General Use Memory

The Area from FFFFCH to


FFFFFH is reserved pointer
area for future products and
should not be used.
Dedicated, Reserved And
General Use Memory
Topics to Cover: (Ch-2)

 Software Model of 8088/8086 µP


 Segment Registers and Memory
Segmentation
 Instruction Pointer
 Pointer Register
 Index Registers
 Data Registers
 Status Register
 Generating a Memory Address
 The Stack
 Input/Output Address Space
Instruction Pointer
Code Segment : Instruction
Pointer
Code Segment : Instruction Pointer

16 Bit
Address
in
Segment
Registers
20 Bit
Address
Bus
Code Segment : Instruction
Pointer
Code Segment : Instruction Pointer

Offset Address
Physical
Address

20 Bit
Base Address Address
Bus
Code Segment : Instruction
Pointer
CS: IP = 0000:0001

0001

0000

Base Address: 0000 B.Add: 0000(0)


Offset Address: 0001 Off. Add:+ 0001
Phy. Add:= 00001
Code Segment : Instruction
Pointer
Code Segment : Instruction Pointer

0003

0000

Base Address: 0000 B.Add: 0000(0)


Offset Address: 0001 Off. Add:+ 0003
Phy. Add:= 00003
Code Segment : Instruction
Pointer
CS:IP = 0000:FFFF

FFFF

0000

Base Address: 0000 B.Add: 0000(0)


Offset Address: 0001 Off. Add:+ FFFF
Phy. Add:= 0FFFF
Topics to Cover: (Ch-2)

 Software Model of 8088/8086 µP


 Segment Registers and Memory
Segmentation
 Instruction Pointer
 Index Registers
 Pointer Register
 Data Registers
 Status Register
 Generating a Memory Address
 The Stack
 Input/Output Address Space
Index Registers
 Two Index Registers:
1) Source Index Register
2) Destination Index
These two registers hold the offset addresses
w.r.t Data/Extra Segments.
DS(0):SI = 20 Bit Address
B.A(0):Offs.A = P.A
DS(0):DI = 20 Bit address
Index Registers (SI,DI)
Topics to Cover: (Ch-2)

 Software Model of 8088/8086 µP


 Segment Registers and Memory
Segmentation
 Instruction Pointer
 Index Registers
 Pointer Register
 Data Registers
 Status Register
 Generating a Memory Address
 The Stack
 Input/Output Address Space
Pointer Registers
 Two Pointer Registers:
1) Stack Pointer Registers
2) Base Pointer Registers
These two registers hold the offset addresses
w.r.t Stack Segments.
SS(0):SP = 20 Bit Address
B.A(0):Offs.A = P.A
SS(0):BP = 20 Bit address
Pointer Registers (SP, BP)
Topics to Cover: (Ch-2)

 Software Model of 8088/8086 µP


 Segment Registers and Memory
Segmentation
 Instruction Pointer
 Index Registers
 Pointer Register
 Data Registers
 Status Register
 Generating a Memory Address
 The Stack
 Input/Output Address Space
Data Registers
 These are also known as General Purpose Registers.
 Mainly used for Data Operation, Logics Calculation &
Manipulation of Data.
Data Registers
Data Registers
Topics to Cover: (Ch-2)

 Software Model of 8088/8086 µP


 Segment Registers and Memory
Segmentation
 Instruction Pointer
 Index Registers
 Pointer Register
 Data Registers
 Status Register
 Generating a Memory Address
 The Stack
 Input/Output Address Space

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