CHAPTER 3

OPERATIONAL
AMPLIFIER
(OP-AMP)
DEE30043-ELECTRONIC CIRCUITS
LEARNING OUTCOMES
1. Remember general Op-Amp circuit
design
2. Understand characteristics of ideal
Operational Amplifier
3. Construct components of Differential
Amplifier block diagram
4. Apply theory of Op-Amp in electronic
circuits
LEARNING Upon completing this part, you
should be able to :
OUTCOME • State general design of op-
OPERATIONAL amp
AMPLIFIER • Identify symbol of op-amp
(OP-AMP) • Describe block diagram of
op-amp
(Lecture 1)
• Explain characteristics of
ideal op-amp
 Introduction
 Op-amp stands for operational amplifier. It is available in
IC (Integrated Circuit) chip. The most common Op-Amp
is the 741
 It is an electronic components already connected and
packaged inside a chip of many pins for external
connection.
 Originally, op-amps were so named because
they were used to model the basic mathematical
operations addition, subtraction, integration,
differentiation, etc
 OP - AMP is a solid state device capable of sensing and
amplifying dc and ac input signals. An op-amp is a high
quality amplifier.
 Used in oscillator, filter and instrumentation
Op Amp Pin
Internal circuitry of 741 Op-Amp IC
Pin 7

+Vcc
Pin 3
Pin 2

Vin(+) Vin(-)

Pin 6

Vo

Pin 4

-Vcc
Op Amp Symbol
Positive voltage supply

7
2
Non-inverting input + 6
Output
3
Inverting input -
4

Negative voltage supply

• op amps have 3 terminals: 2 input and 1 output.

• An op amp also requires dc power to operate.
• requires both positive and negative voltage supplies (V+ and V-).
• The pin number 6 is the output terminal.
• A dc voltage or ac signal connected to pin 2
(inverting i/p) will be 180° out of phase at the
output.
• A dc voltage or ac signal connected to pin 3 (non
inverting i/p) will be in phase at the output.
• Pin 4(-Vcc) and 7(+Vcc) are the power supply
terminals
• The pin 1 and 5 are Null adjustment pins. Null
adjustment pins are used to null the output
voltage, when equal voltages are input terminals
for perfect balance.
• Pin number 8 indicates No connection
Op Amp Block Diagram
The block diagram of an Op-amp
An op-amp is a high quality amplifier. It contains three stages,
which are connected in cascaded manner which consists of
three stages :
i. Differential amplifier (double ended) – provides low noise
amplification, high input impedance, usually a differential
output.
ii. Intermediate voltage amplifier (gain stage) .
Voltage amplifier – provides high voltage gain, usually
single-ended output.
iii. Output amplifier stage  – provides high current driving
capability, low output impedance, current limiting and short
circuit protection circuitry.
 The Op Amp Model
v+
Non-inverting input +
Ro vo
Rin +
v- -
Inverting input - A(v+ - v- )

• The op amp is designed to sense the difference between the

voltage signals applied to the two input terminals and then multiply
it by a gain factor A such that the voltage at the output terminal is
A(v+-v-).
• The voltage gain A is very large (practically infinite). The gain A is
often referred to as the differential gain or open-loop gain.
• The input resistance Rin is very large (practically infinite). The
output resistance Ro is very small (practically zero).
Op Amp Transfer Characteristic Curve

saturation
active region
vo  A vi  A ( v  v )

Saturation is caused by
increasing/decreasing the
input voltage to cause the
output voltage to equal the
power supply’s voltage
 Ideal Op Amp Characteristics
1. Open Loop Gain (AOL) - Infinite
• The main function of an operational amplifier is to amplify the input
signal and the more open loop gain it has the better.
• Open-loop gain is the gain of the op-amp without positive or
negative feedback and for an ideal amplifier the gain will be
infinite but
• For real op amp the gain range from about 20,000 to 200,000.
2. Input impedance (Zin) - Infinite
• Input impedance is the ratio of input voltage to input current and is
assumed to be infinite to prevent any current flowing from the
source supply into the amplifiers input circuitry (Iin = 0).
• Real op-amps have input leakage currents from a few pico-amps
to a few milli-amps.
– So for real op-amp, the input impedance about 1012  for FET input
op-amps
3. Output impedance, (Zout) - Zero
• The output impedance of the ideal operational amplifier is
assumed to be zero acting as a perfect internal voltage source
with no internal resistance so that it can supply as much current
as necessary to the load. This internal resistance is effectively in
series with the load thereby reducing the output voltage available
to the load.
• Real op-amps have output-impedance in the 100-200Ω range.

4. Bandwidth, (BW) - Infinite

• An ideal operational amplifier has an infinite frequency
response and can amplify any frequency signal from DC to the
highest AC frequencies so it is therefore assumed to have an
infinite bandwidth.
• With real op-amps, the bandwidth is limited by the Gain-
Bandwidth product (GB), which is equal to the frequency where
the amplifiers gain becomes unity.
• So real op-amp limited to few MHz range
5. Offset Voltage - Zero
• The amplifiers output will be zero when the voltage
difference between the inverting and the non-inverting
inputs is zero, the same or when both inputs are grounded.
• Real op-amps have some amount of output offset voltage.

6. Offset Current. - Zero

• In ideal op amp, the offset current is zero. Offset current
is the difference between current bias needed by the two
input transistor in the op-amp.
• Real op-amps have some amount of offset current
This is due to mismatch between the beta (ß) of the input
transistor, ( Beta 1 is not equal to Beta 2 )
Characteristics of the Ideal Op Amplifier

i. Input impedance is infinite. [ Zin = ∞ ]

ii. Output impedance is zero [ Zout = 0 ]
iii. Open Loop Gain (AOL) is infinite.
iv. CMRR is infinite.
v. Bandwidth is infinite.
vi. Offset voltage and Offset current is zero.
 Exercise
With the aid of op-amp block diagram,
explain briefly each of the stages.
LEARNING Upon completing this part, you should be
able to :
OUTCOME • Construct component of op-amp block
diagram
OPERATIONAL
• Explain operation differential amplifier
AMPLIFIER
• Write input bias current, input offset
(OP-AMP) current and input offset voltage
• Write the common mode gain and
(Lecture 2) common mode rejection ratio
• Explain operation intermediate voltage
amplifier
• Explain operation of push-pull
amplifier circuit
DIFFERENTIAL AMPLIFIER

• The circuit shows a generalized form of a

differential amplifier with two inputs marked V1 and V2.
• The circuit operates from a dual supply +Vcc and -Vee which ensures a
constant supply.
• The two identical transistors TR1 and TR2 are both biased at the same
operating point with their emitters connected together and returned to the
common rail, -Vee by way of resistor Re.
• The voltage that appears at the output, Vout of the amplifier is the
difference between the two input signals as the two base inputs are in anti-
phase with each other.
• So as the forward bias of transistor, TR1 is increased, the forward bias of
transistor TR2 is reduced and vice versa.
• Then if the two transistors are perfectly matched, the current flowing
through the common emitter resistor, Re will remain constant.
Input Bias Current
• The input circuit of an op-amp is always a
differential amplifier.
• The input bias current is one-half the sum
of the bias currents taken by each input of
the op-amp.
I B  I B
IB 
2
• The input bias current is 10 to 50 nA for a
bipolar transistor input op-amp and as low
as 10 to 100 pA for the FET input op-amp.
Input Offset Current
• The difference between the bias currents is known
as the input offset current.

I os  I B   I B 

• The range of 3-20 nA for bipolar transistor input op-

amps and a few pico-amperes (pA) for FET input op-
amps.
• One of the practical op-amp limitations is that the input
bias currents for the two inputs may be slightly different.
• Even though the inputs are designed to be symmetrical,
slight differences which occur in the manufacturing
process may give slightly different bias currents.
Input Offset Voltage
• The output voltage of an op-amp should be zero
when the value of an applied voltage at both the input
terminals is zero.

Input offset volt = o/p volt (for zero i/p)

AOL
• Ideally, if both inputs of an op amp are at exactly
the same voltage, then the output should be at zero
volts.
• In practice, a small differential voltage must be
applied to the inputs to force the output to zero.
This is known as the input offset voltage.
Single-Ended Input

•+ terminal : Source
• – terminal : Ground
• 0o phase change

• + terminal : Ground
• – terminal : Source
• 180o phase change
Double-Ended Input

+
V o

~ V 1 
~
V 2

• Apply signal input at each input pin

(inverting and non inverting point)
• To solve use superposition method
Common mode input

+
V o


V i ~

• Same phase input signal is at both

input pin
Common-mode gain and common-mode
rejection ratio
• The output voltage of an op-amp is proportional to the
voltage applied to the inverting and non-inverting
terminals.

• Ideally when the two

voltages are equal, the
output voltage should be
zero.

• A signal applied to both the input terminals is

called a common-mode signal.
Common-Mode Operation

• Same voltage source is applied at both terminals

• Ideally, two input are equally amplified
•Output voltage is ideally zero due to differential
voltage is zero

+ Note for differential circuits:

V o Opposite inputs : highly amplified
Common inputs : slightly

amplified
V i ~  Common-Mode Rejection
• Practically, a small output signal can
still be measured
• It is nearly always an unwanted noise
voltage.
• The ability of an op-amp to suppress
common-mode signals is expressed in
terms of its common-mode rejection
ratio (CMRR).
Common-Mode Rejection Ratio

A where A is the differential

CMRR  mode gain and Acm is the
Acm common mode gain

A
CMRRdB  20 log dB
Acm

Ideally: CMRR Typically: 60 dB  CMRR  120 dB

 INTERMEDIATE VOLTAGE AMPLIFIER

• The second stage is a high-gain voltage

amplifier.
• This stage may be made from several
transistors to provide high gain.
• A typical operational amplifier could have a
voltage gain of 200,000. Most of this gain
comes from the voltage amplifier stage.
 OUTPUT AMPLIFIER

• The final stage of the OP AMP is an output amplifier.

The output amplifier provides low output
impedance and high input resistance.
Emitter follower-class B push pull amplifier

• The actual circuit used could be an

emitter follower-class B push pull
amplifier which produces unity gain.
• The output stage should allow the
operational amplifier to deliver
several milliamperes to a load
• A Class B push–pull output driver
using bipolar junction transistor
configured as emitter followers.
• A push–pull output is a type of
electronic circuit that can drive either
a positive or a negative current into a
load.
 Exercise
Find the op-amp common mode configuration
LEARNING Upon completing this part, you should
be able to :
OUTCOME • Construct and explain operation of
op-amp circuit in configuration :
OPERATIONAL
a. Non-inverting amplifier
AMPLIFIER
b. Inverting amplifier
(OP-AMP) c. Summing amplifier
(Lecture 3) • Derive voltage gain for inverting
and non-inverting amplifier
Op-Amp Configurations
Golden Rules of Op-Amp Analysis
Rule 1: VA = VB
The Differential Input Voltage is Zero as
V1 = V2 = 0 (Virtual Earth)

Rule 2: IA = IB = 0
No current flows into the input terminals
Steps in Analyzing Op-Amp Circuits

1. Remove the op-amp from the circuit and

draw two circuits (one for the + and one for
the – input terminals of the op amp).
2. Write equations for the two circuits.
3. Simplify the equations using the rules for
op- amp analysis and solve for Vout/Vin
OP-AMP CONFIGURATION
a. Inverting Amplifier

Vin at the inverting (-) input

 Analyzing of Inverting Amplifier

inverting input (-):

non-inverting input (+):

 Inverting Amplifier Analysis

1) :

:

V Vin  VB VB  Vout
2)  : i   
R Rin Rf
 : VA  0
Vin  Vout
3) VA  VB  0 
Rin Rf
Vout Rf

Vin Rin
OP-AMP CONFIGURATION
a. Inverting Amplifier

Vout Rf

Vin Rin

Rf
AV  
Rin
 Example
Calculate the voltage gain
 Exercise 4
8.3 k R1
a) Calculate the necessary Vin
resistor value (R1) in this
circuit to give it voltage
gain of 7.5.
Vout

Vout
b) Calculate the output
5 k 27 k voltage of this op-amp
1.5 V circuit
 Exercise 5
Calculate the voltage gain for each stage of this
amplifier circuit (both as a ratio and in units of decibels),
then calculate the overall voltage gain.

4.7 k 8.3 k 22 k 10 k
Vin

Vout
 OP-AMP CONFIGURATION
b. Non-Inverting Amplifier

Vin at the non-inverting (+) input

 Analysis of Non-Inverting Amplifier
Note that step 2 uses a voltage
divider to find the voltage at VB
relative to the output voltage.
2)  : V A  Vin
Rg
 : VB  Vout
R f  Rg
Rg
3) VA  VB Vin  Vout
R f  Rg
1)  : Vout R f  Rg

: Vin Rg
Vout Rf
 1
Vin Rg
OP-AMP CONFIGURATION
b. Non-Inverting Amplifier

Vout Rf
 1
Vin Rg

Rf
AV  1 
Rg
 Example
Name the configuration of this op-amp circuit and
calculate the voltage gain.
 Exercise 6
Calculate the output voltage.
 Final Exam Question
(Jun 2016)
Referring to Figure C1, define the Common Mode Rejection
Ratio (CMRR) of a non-inverting amplifier. Then, calculate the
CMRR and express it in Decibel (dB). Its common mode gain is
0.001.
 Exercise
Calculate the input voltage if the final output, VO
is 10.08 V 
OP-AMP CONFIGURATION
c. Summing amplifier

Vout  Av1.V1  Av 2 .V2

Rf  Rf 
 .V1   .V2 
R1  R2 
 V1 V2 
  R f   
 R1 R2 
Rf Rf
Av1   Av 2 
R1 R2
 Summing Amplifier Analysis
I1

If

I2
3]
V1  VA V2  V A V A  Vout
I f  I1  I 2 I1  I2  If 
R1 R2 Rf
V A  Vout V1  V A V2  V A
  V A  VB  0
Rf R1 R2
 Vout V1 V2  V1 V2 
  Vout   R f   
Rf R1 R2  R1 R2 
 Example
Find the output voltage of the following Summing
Amplifier circuit.
 Example
What is the value Vin1 from the Inverting Summing
Amplifier circuit shown below?

24kΩ
Vin1
24kΩ RF
24kΩ
-2V
24kΩ
-6V 
+12V
+
 Example
Calculate the output voltage, VO if V1 = V2 = 700 mV
 Final Exam Question
(Dis 2017)
Operational amplifier (op-amp) is an integrated circuit that
contains several levels and a differential amplifier configuration.
With the aid of op-amp block diagram, explain briefly each of the
stages. Calculate the output voltage of the circuit in Figure C1, if
R1 = R2 = R3 = 2kΩ, RF = 40kΩ, V1 = 0.10V, V2 = - 0.5V and
V3 = 1.5V.
LEARNING Upon completing this part, you should be
able to :
OUTCOME • Construct and explain operation of
OPERATIONAL op-amp circuit in configuration :
AMPLIFIER d. Subtractor
e. Differentiator
(OP-AMP)
f. Integrator
(Lecture 4) g. Comparator
OP-AMP CONFIGURATION
d. Differential Amplifier

Differential amplifiers amplify the difference between

two voltages making this type of circuit a Subtractor.

 R3   R4   R3 
Vout   V1    V2   1 
 R1   R 2  R4   R 1 
OP-AMP CONFIGURATION
e. Differentiator Amplifier
• The input signal to the
differentiator is applied to the
capacitor.
• The capacitor blocks any DC
content so there is no
current flow to the amplifier
summing point, X resulting
in zero output voltage. At low frequencies the reactance
• The capacitor only allows of the capacitor is "High" resulting
AC type input voltage in a low gain (Rf/Xc) and low
changes to pass through output voltage from the op-amp.
and whose frequency is At higher frequencies the
dependant on the rate of reactance of the capacitor is much
change of the input signal. lower resulting in a higher gain
and higher output voltage
• However, at high frequencies a differentiator circuit
becomes unstable and will start to oscillate.

• This is due mainly to the first-order effect, which

determines the frequency response of the op-amp
circuit causing a second-order response which, at
high frequencies gives an output voltage far higher
than what would be expected.

• To avoid this the high frequency gain of the circuit

needs to be reduced by adding an additional small
value capacitor across the feedback resistor Rf.
ANALYSIS OF DIFFERENTIATOR AMPLIFIER
-The charge on the capacitor Q = C x Vin

- The rate of change of this charge is:

dQ = C dVin
dt dt

but dQ = ic (capacitor current) ,

dt
Since the node voltage of the operational
amplifier at its inverting input terminal is
zero, the current, i flowing through the
capacitor will be given as:-
iC= - iR
ic = C d Vin and - iR = - Vout/R
dt
C d Vin = - Vout
dt R
Vout = - CR d Vin
dt
OP-AMP CONFIGURATION
f. Integrator Amplifier

The magnitude of the output signal is determined by the length of time

a voltage is present at its input as the current through the feedback
loop charges or discharges the capacitor as the required negative
feedback occurs through the capacitor.
 When Vin applied;
• the uncharged capacitor C has very
little resistance and acts a bit like a
short circuit (voltage follower circuit)
giving an overall gain of less than one.
• No current flows into the amplifiers
input and point X is a virtual earth
resulting in zero output.

When Feedback:
- capacitor C begins to charge up,
- reactance Xc increases ; ratio of
Xc/Rin increasing producing an output
voltage that continues to increase until
the capacitor is fully charged.

When Capacitor Fully Charge;

the capacitor acts as an open circuit, blocking anymore flow of DC current
The ratio of feedback capacitor to input resistor (Xc/Rin) is now infinite
resulting in infinite gain
The result of this high gain is that the output of the amplifier goes into
saturation
• The rate at which the output voltage increases (the rate
of change) is determined by the value of the resistor and
the capacitor, "RC time constant".
• By changing this RC time constant value, either by
changing the value of the Capacitor, C or the Resistor,
R, the time in which it takes the output voltage to reach
saturation can also be changed
• If we apply a constantly changing input signal such as a
square wave, then the capacitor will charge and discharge in
response to changes in the input signal.

• This results in the output signal being that of a sawtooth

waveform whose frequency is dependant upon the RC
time constant of the resistor/capacitor combination. This type
of circuit is also known as a Ramp Generator and the transfer
function is given below.
Analysis of Integrator Amplifier

ic = C dVout
dt
iR = Vin
R
ic = - iR

C d Vout = - Vin
dt R

Integrate both side,

C∫d Vout = - ∫Vin
dt R
C∫d Vout = - ∫Vin .dt
R
Vout = - 1 ∫Vin .dt
CR
OP-AMP CONFIGURATION
g. Comparator

When,
V2 > V1 output is equal to + VCC ( + Sat)
V1 > V2 output is equal to - VCC (- Sat)
OP-AMP CONFIGURATION
h. The Voltage Follower

Vout
1
Vin

AV  1
analysis :
1] VA  Vout 2] VB  Vin
VA  VB therefore , Vout  Vin
 TUTORIAL
1. Compare the THREE(3) ideal to the practical characteristics of
operational amplifier.

2. Describe the Common Mode Rejection Ratio (CMRR) and

calculate CMRR in dB when differential-mode voltage gain = 10.04
and common mode voltage gain = 0.083.

3. Figure 1 shows a three-stage Operational Amplifier (op-amp)

circuit with voltage gains of +10 at Amplifier 1, -18 at Amplifier 2
and -27 at Amplifier 3. Calculate the value of R1, R2 and R3 if
feedback resistor, Rf is 270kΩ for all three circuits. What is the
output voltage of the circuit if the input voltage, Vin is 150µV?
 TUTORIAL

Figure 1
4. An inverting summing amplifier is an op-amp circuit that combines several
inputs and produces an output that is weighted sum of the inputs. Carry
out the output voltage (Vo) by drawing the inverting summing amplifier
which has TWO(2) inputs. Hence, calculate the current input I1, I2 and
output voltage if RF = 10kΩ, R1 = 5kΩ and R2 = 2.5kΩ, input voltage
V1=2V and V2=1V. Draw the waveform of the input and output
 THE
CHAPTER
END
OPERATIONAL
3
AMPLIFIER
(OP-AMP)

DEE30043-ELECTRONIC CIRCUITS