TIMER OPERATIONS

Features
• A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
• Counter or Timer operation
• Up to four 32-bit capture channels per timer, that can take a snapshot of the timer value
when an input signal transitions. A capture event may also optionally generate an interrupt.
• Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
• Up to four external outputs corresponding to match registers, with the following
capabilities:
– Set low on match.
– Set high on match.
– Toggle on match.
– Do nothing on match.
Applications
 Timer Registers
• A timer has a Timer Counter (TC) and Prescale Register(PR) associated
with it.
• When Timer is Reset and Enabled TC is set to 0 and incremented by 1
every ‘PR+1′ clock cycles.
• When it reaches its maximum value it gets reset to 0 and hence restarts
counting.
• Prescale Register is used to define the resolution of the timer.
• If PR=0 then TC is incremented every 1 clock cycle of the peripheral
clock. If PR=1 then TC is incremented every 2 clock cycles of peripheral
clock and so on.
• By setting an appropriate value in PR we can make timer increment or
count : every peripheral clock cycle or 1 microsecond or 1 millisecond
or 1 second and so on.
• Match Register (MR0, MR1, MR2, MR3)
A Match Register is a Register which contains a specific value set by the
user. When the Timer starts – every time after TC is incremented the
value in TC is compared with match register. If it matches then it can
Reset the Timer or can generate an interrupt as defined by the user.
Match Registers can be used to:
• Stop Timer on Match(i.e when the value in count register is same as
that in Match register) and trigger an optional interrupt.
• Reset Timer on Match and trigger an optional interrupt.
• To count continuously and trigger an interrupt on match.
• MAT0.0 (2 pins) : P0.3 and P0.22
• MAT0.1 (1 pin) : P0.5
• MAT0.2 (2 pin) : P0.16 and P0.28
• MAT0.3 (1 pin) : P0.29
• MAT1.0 (1 pin) : P0.12
• MAT1.1 (1 pin) : P0.13
• MAT1.2 (2 pins) : P0.17 and P0.19
• MAT1.3 (2 pins) : P0.18 and P0.20
• Capture Register (CR0, CR1, CR2, CR3)
As the name suggests it is used to Capture Input signal. When a transition
event occurs on a Capture pin , it can be used to copy the value of TC into
any of the 4 Capture Register or to generate an Interrupt.
• CAP0.0 (3 pins) : P0.2, P0.22 and P0.30
• CAP0.1 (1 pin) : P0.4
• CAP0.2 (3 pin) : P0.6 (pin30), P0.16(pin46) and P0.28
• CAP0.3 (1 pin) : P0.29
• CAP1.0 (1 pin) : P0.10
• CAP1.1 (1 pin) : P0.11
• CAP1.2 (2 pins) : P0.17 and P0.19
• CAP1.3 (2 pins) : P0.18 and P0.21
1) PR : Prescale Register (32 bit) – Stores the maximum value of Prescale counter after
which it is reset.
2) PC : Prescale Counter Register (32 bit) – This register increments on every
PCLK(Peripheral clock). This register controls the resolution of the timer. When PC
reaches the value in PR , PC is reset back to 0 and Timer Counter is incremented by 1.
Hence if PR=0 then Timer Counter Increments on every 1 PCLK. If PR=9 then Timer
Counter Increments on every 10th cycle of PCLK. Hence by selecting an appropriate
prescale value we can control the resolution of the timer.
3) TC : Timer Counter Register (32 bit) – This is the main counting register. Timer Counter
increments when PC reaches its maximum value as specified by PR. If timer is not reset
explicitly(directly) or by using an interrupt then it will act as a free running counter which
resets back to zero when it reaches its maximum value which is 0xFFFFFFFF.
4) TCR : Timer Control Register (8 bit) – This register is used to enable , disable and reset
TC. When bit0 is 1 timer is enabled and when 0 it is disabled. When bit1 is set to 1 TC and
PC are set to zero together in sync on the next positive edge of PCLK. Rest of the bits of
TCR are reserved.
5) CTCR : Count Control register (8 bit)– Used to select Timer/Counter Mode. When the
value of the CTCR is set to 0×0 Timer Mode is selected.
6) MCR : Match Control register (16 bit) – This register is used to control which all
operations can be done when the value in MR matches the value in TC. Bits 0,1,2 are
for MR0 , Bits 3,4,5 for MR1 and so on.. Heres a quick table which shows the usage:
For MR0:
• Bit 0 : Interrupt on MR0 i.e trigger an interrupt when MR0 matches TC. Interrupts
are enabled when set to 1 and disabled when set to 0.
• Bit 1 : Reset on MR0. When set to 1 , TC will be reset when it matched MR0.
Disabled when set to 0.
• Bit 2 : Stop on MR0. When set to 1 , TC & PC will stop when MR0 matches TC.
• Similarly bits 3-5 , 6-8 , 9-11 are for MR1 , MR2 , MR3 respectively.
7) IR : Interrupt Register (8 bit) – It contains the interrupt flags for 4 match and 4
capture interrupts. Bit0 to bit3 are for MR0 to MR3 interrupts respectively. And
similarly the next 4 for CR0-3 interrupts. when an interrupt is raised the
corresponding bit in IR will be set to 1 and 0 otherwise. Writing a 1 to the
corresponding bit location will reset the interrupt – which is used to acknowledge
the completion of the corresponding ISR execution.
 Setting up & configuring Timers
• Set appropriate value in TxCTCR
• Define the Prescale value in TxPR
• Set Value(s) in Match Register(s) if required
• Set appropriate value in TxMCR if using Match registers / Interrupts
• Reset Timer – Which resets PR and TC
• Set TxTCR to 0×01 to Enable the Timer when required
• Reset TxTCR to 0×00 to Disable the Timer when required
 Void initTimer0(void)
• void initTimer0(void)
{
    /*Assuming that PLL0 has been setup with CCLK = 60Mhz and PCLK
also = 60Mhz.*/
  
    T0CTCR = 0x0;
    T0PR = PRESCALE-1; //(Value in Decimal!) - Increment T0TC at every
PRESCALE clock cycles
                    
    T0TCR = 0x02; //Reset Timer
}
 Calculations
• The delay or time required for 1 clock cycle at ‘X’ MHz is given by :
(1 / X * (10^6)) Seconds
• Hence in our case when PR=0 i.e TC increments at every PCLK the
delay required for TC to increment by 1 is:
((0+1) / 60 * (10^6)) Seconds
• Similarly when we set PR = 59999 the delay in this case will be:
((59999+1) / 60 * (10^6)) = (60000 / 60 * (10^6) = 1 / (10^3) Seconds
• 1/1000 = 0.001 Seconds which is nothing but 1 Milli-Second Hence
the delay required for TC to increment by 1 will be 1mS.
 delayMS(unsigned int milliseconds);
• void delayMS(unsigned int milliseconds) //Using Timer0
{
    T0TCR = 0x02; //Reset Timer

    T0TCR = 0x01; //Enable timer
  
    while(T0TC < milliseconds); //wait until timer counter reaches the
desired delay
  
    T0TCR = 0x00; //Disable timer
}
• #include <lpc214x.h>

#define PRESCALE 60000   //60000 PCLK clock cycles to increment TC by 1 

void delayMS(unsigned int milliseconds);
void initTimer0(void);

int main(void)
{
    initTimer0(); //Initialize Timer0
    IO0DIR = 0xFFFFFFFF; //Configure all pins on Port 0 as Output
  
    while(1)
    {
        IO0SET = 0xFFFFFFFF; //Turn on LEDs
        delayMS(500); //0.5 Second(s) Delay
        IO0CLR = 0xFFFFFFFF; //Turn them off
        delayMS(500);
    }
       
}
• void initTimer0(void)
{
    /*Assuming that PLL0 has been setup with CCLK = 60Mhz and PCLK also = 60Mhz.*/
  
    T0CTCR = 0x0;
    T0PR = PRESCALE-1; //(Value in Decimal!) - Increment T0TC at every 60000 clock cycles
                     //Count begins from zero hence subtracting 1
                     //60000 clock cycles @60Mhz = 1 mS

    T0TCR = 0x02; //Reset Timer
}

void delayMS(unsigned int milliseconds) //Using Timer0
{
    T0TCR = 0x02; //Reset Timer

    T0TCR = 0x01; //Enable timer
  
    while(T0TC < milliseconds); //wait until timer counter reaches the desired delay
  
    T0TCR = 0x00; //Disable timer
}
 PWM
• Pulse Width Modulation or PWM is a way to encode data such that it
corresponds to the width of the pulse given a fixed frequency.
• Its also a way to control motors , power circuits , etc.. using the
‘width’ of the pulse.
• PWM has numerous uses like Motion Control , Dimming , Encoding
Analog Signal into its Digital form , in Power Regulation , etc.
• Pulse period and width can be any number of timer counts. This
allows complete flexibility in the trade-off between resolution and
repetition rate. All PWM outputs will occur at the same repetition
rate.
• LPC2148 supports 2 types of PWM :

• 1) Single Edge PWM – PWM outputs all go high at the beginning of

each cycle unless the output is a constant low.
• 2) Double Edge PWM – PWM outputs can have either edge occur at
any position within a cycle. This allows for both positive going and
negative going pulses.
• Seven match registers allow up to 6 single edge controlled or 3 double
edge controlled PWM outputs, or a mix of both types. The match
registers also allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
• The PWM is based on the standard Timer block and inherits all of its
features, although only the PWM function is pinned out on the
LPC2141/2/4/6/8.
• The Timer is designed to count cycles of the peripheral clock (PCLK)
and optionally generate interrupts or perform other actions when
specified timer values occur, based on seven match registers.
• It also includes four capture inputs to save the timer value when an
input signal transitions, and optionally generate an interrupt when
those events occur.
• The PWM function is in addition to these features, and is based on
match register events.
Match registers for single edge controlled
• Two match registers can be used to provide a single edge controlled
PWM output. One match register (PWMMR0) controls the PWM cycle
rate, by resetting the count upon match.
• The other match register controls the PWM edge position.
• Additional single edge controlled PWM outputs require only one
match register each, since the repetition rate is the same for all PWM
outputs. Multiple single edge controlled PWM outputs will all have a
rising edge at the beginning of each PWM cycle, when an PWMMR0
match occurs.
Match registers for single edge controlled
• Three match registers can be used to provide a PWM output with
both edges controlled.
• PWMMR0 match register controls the PWM cycle rate. The other
match registers control the two PWM edge positions.
• Additional double edge controlled PWM outputs require only two
match registers each, since the repetition rate is the same for all PWM
outputs.
Sample PWM waveform
•  Match Registers 1 to 6 (except 0) are pinned on LPC214x i.e. the
corresponding outputs are diverted to actual Pins on LPC214x MCU.
The PWM function must be selected for these Pins to get the PWM
output. These pins are :
Output PWM1 PWM2 PWM3 PWM4 PWM5 PWM6
:
Pin P0.0 P0.7 P0.1 P0.8 P0.21 P0.9
Name :

• Also Match Register 0 i.e PWMMR0 is NOT pinned because it is used

to generate the PWM Period.
• Also the PWM function must be selected for the PINs mentioned
above using appropriate PINSEL registers (PINSEL0 for PWM1,2,3,4,6
and PINSEL1 for PWM5).
• In LPC214x we have 7 match registers inside the PWM block .
• Generally the first Match register PWMMR0 is used to generate PWM
period and hence we are left with 6 Match Registers PWMMR1 to
PWMMR6 to generate 6 Single Edge PWM signals or 3 Double Edge
PWM signals.
• Double edge PWM uses 2 match registers hence we can get only 3
double edge outputs.
• Rules for single edge controlled PWM outputs
1. All single edge controlled PWM outputs go high at the beginning of a
PWM cycle unless their match value is equal to 0.
2. Each PWM output will go low when its match value is reached. If no
match occurs (i.e. the match value is greater than the PWM rate), the
PWM output remains continuously high.
 Working of PWM
• Consider:
• PWM Period duration= 6 milliseconds;
• TC increments every 1 millisecond using appropriate pre-scale value.
• Now set the match value in PWMMR0 as 6.
• Then configure PWM block such that when TC reaches value in PWMMR0 it is
reset and a new Period begins.
• Example: we want 2 PWM signals of Pulse widths 2ms and 4ms.
• So, use PWMMR1 and PWMMR2 to get the 2 outputs.
• Set PWMMR1 = 2 and PWMMR2 = 4.
• Then , Everytime a new period starts the Pin corresponding to PWMMR1 (p0.0)
and PWMMR2 (p0.7) will be set High by default.
• And whenever the value in TC reaches PWMMR1 and PWMMR2 its output will
be set to low respectively.
• Their outputs will remain low until the next Period starts after which their
outputs again become high. Hence giving us Single Edge PWM.
 Registers in PWM
1) PWMTCR (8 bit) : PWM Timer Control Register
This register is used to control the Timer Counter inside the PWM block. Only Bits: 0, 1 & 3
are used rest are reserved.
Bit 0 : This bit is used to Enable/Disable Counting. When 1 both PWM Timer counter and
PWM Prescale counter are enabled. When 0 both are disabled.
Bit 1 : This bit is used to Reset both Timer and Prescale counter inside the PWM block. When
set to 1 it will reset both of them (at next edge of PCLK).
Bit 3 : This is used to enable the PWM mode i.e the PWM outputs.
Other Bits : Reserved.
2) PWMPR (32 bit) : PWM Prescale Register
PWMPR is used to control the resolution of the PWM outputs. The Timer Counter(TC) will
increment every PWMPR+1 Peripheral Clock Cycles (PCLK).
3) PWMMR0 – PWMMR6 : Match Registers
These are the seven Match registers as explained above which contain Pulse Width Values i.e
the Number of PWMTC Ticks.
4) PWMMCR (32 bit) : PWM Match Control Registers
The PWM Match Control Register is used to specify what operations can be done
when the value in a particular Match register equals the value in TC. For each Match
Register we have 3 options : Either generate an Interrupt , or Reset the TC , or Stop ..
which stops the counters and disables PWM. Hence this register is divided into group
of 3 bits. The first 3 bits are for Match Register 0 i.e PWMMR0 , next 3 for PWMMR1 ,
and so on :
1) Bit 0 : Interrupt on PWMMR0 Match – If set to 1 then it will generate an Interrupt
else disable if set to 0.
2) Bit 1 : Reset on PWMMR0 Match – If set to 1 it will reset the Timer Counter i.e
PWMTC else disabled if set to 0.
3) Bit 2 : Stop on PWMMR0 Match – If this bit is set 1 then both PWMTC and PWMPC
will be stopped and will also make Bit 0 in PWMTCR to 0 which in turn will disable the
Counters.
*) Similarly {Bits 3,4,5} for PWMMR1 , {Bits 6,7,8} for PWMMR2 , {Bits 9,10,11} for
PWMMR3 ,{Bits 12,13,14} for PWMMR4 ,{Bits 15,16,17} for PWMMR5 , {Bits 18,19,20}
for PWMMR6.
• 5) PWMIR (16 bit) : PWM Interrupt Register
If an interrupt is generated by any of the Match Register then the
corresponding bit in PWMIR will be set high. Writing a 1 to the
corresponding location will clear that interrupt. Here :
1) Bits 0,1,2,3 are for PWMMR0, PWMMR1, PWMMR2, PWMMR3
respectively and
2) Bits 8,9,10 are for PWMMR4 , PWMMR5 , PWMMR6 respectively.
Other bits are reserved.
7) PWMPCR (16 bit) : PWM Control Register
This register is used for Selecting between Single Edged & Double Edged outputs
and also to Enable/Disable the 6 PWM outputs which go to their corresponding
Pins.
( 1) Bits 2 to 6 are used to select between Single or Double Edge mode for PWM
2,3,4,5,6 outputs.
1) Bit 2 : If set to 1 then PWM2(i.e the one corresponding to PWMMR2)
output is double edged else if set 0 then its Single Edged.

2) Similarly {Bits 3,4,5,6} for PWM3 , PWM4 , PWM5 , PWM6 respectively.

2) Bits 9 to 14 are used to Enable/Disable PWM outputs
1) Bit 9 : If set to 1 then PWM1 output is enabled , else disabled if set to 0.
2)Similarly {Bit 10,11,12,13,14} for PWM2 , PWM3 , PWM4 , PWM5 , PWM6
respectively.
•)
Rules for single edge controlled PWM
outputs

1. All single edge controlled PWM outputs go high at the beginning of a

PWM cycle unless their match value is equal to 0.

2. Each PWM output will go low when its match value is reached. If no
match occurs (i.e. the match value is greater than the PWM rate), the
PWM output remains continuously high.
 Configuring and Initializing PWM

• Configuring PWM is very much similar to Configuring Timer except ,

additionally , we need to enable the outputs and select PWM
functions for the corresponding PIN on which output will be
available. 
• First we need to define the resolution of PWM signal.
• Here the PWM resolution means the minimum increment that can be
used to increase or decrease the pulse width.
• More smaller the increment more fine will be the resolution. This
resolution is defined using an appropriate Pre scale Value. 
 Steps for initializing PWM
• Select the PWM function for the PIN on which you need the PWM output
using PINSEL0/1 register.
• Select Single Edge or Double Edge Mode using PWMPCR. By default its Single
Edge Mode.
• Assign the Calculated value to PR.
• Set the Value for PWM Period in PWMMR0.
• Set the Values for other Match Registers i.e the Pulse Widths.
• Set appropriate bit values in PWMMCR .. like for e.g. resetting PWMTC for
PWMMR0 match and optionally generate interrupts if required
• Set Latch Enable Bits for the Match Registers that you’ve used. This is
important!
• Then Enable PWM outputs using PWMPCR.
• Now Reset PWM Timer using PWMTCR.
• Finally .. Enable Timer Counter and PWM Mode using PWMTCR.
 LED Dimming example with PWM
#include <lpc214x.h>
void initPWM(void);
int main(void)
{
        initPWM(); //Initialize PWM
while(1)
    {
        if( !((IO0PIN) & (1<<1)) ) // Check P0.1
        {
            PWMMR1 = 2500; //T-ON=25% , Hence 25% Bright
            PWMLER = (1<<1); //Update Latch Enable bit for PWMMR1
        }
        else if( !((IO0PIN) & (1<<2)) ) // Check P0.2
        {
            PWMMR1 = 5000; //50% Bright
            PWMLER = (1<<1);
        }
          
 else if( !((IO0PIN) & (1<<3)) ) // Check P0.3
        {
            PWMMR1 = 7500; //75% Bright
            PWMLER = (1<<1);
        }
        else if( !((IO0PIN) & (1<<4)) ) // Check P0.4
        {
            PWMMR1 = 10000; //100% Bright
            PWMLER = (1<<1);
        }
    }
    //return 0; //normally this wont execute ever
}
void initPWM(void)
{
    /*Assuming that PLL0 has been setup with CCLK = 60Mhz and PCLK also = 60Mhz.*/
  

    PINSEL0 = (1<<1); // Select PWM1 output for Pin0.0

    PWMPCR = 0x0; //Select Single Edge PWM - by default its single Edged so this line can be removed
    PWMPR = PWMPRESCALE-1; // 1 micro-second resolution
    PWMMR0 = 10000; // 10ms period duration
    PWMMR1 = 2500; // 2.5ms - pulse duration i.e width (Brigtness level)
    PWMMCR = (1<<1); // Reset PWMTC on PWMMR0 match
    PWMLER = (1<<1) | (1<<0); // update MR0 and MR1
    PWMPCR = (1<<9); // enable PWM output
    PWMTCR = (1<<1) ; //Reset PWM TC & PR

    //Now , the final moment - enable everything

    PWMTCR = (1<<0) | (1<<3); // enable counters and PWM Mode

    //PWM Generation goes active now - LED must be 25% Bright after Reset!!
    //Now you can get the PWM output at Pin P0.0!
}