Cs 303: Computer Organization & Architecture

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CS 303 

: COMPUTER ORGANIZATION &


ARCHITECTURE 
Presented by:
Dr. Deepak Raj D.M
Assistant Professor
Department of CSE
Alliance University
MODULE 1: BASIC STRUCTURE OF
COMPUTERS           
•0  logic low: off
Functional
logic in •1  logic high: on
Digital
System

•multi i/p  single o/p called Logic gate

•Logic gate  basic building block of any digital system

•Categories logic gates  basic gates, universal gates,

special gates.
Digital Logic
Circuits - I: Basic
Logic Functions

• AND
• OR
• NOT
Types of Basic Logic Gates

There are several basic logic gates used in performing operations in


digital systems. The common ones are:

•OR Gate
•AND Gate
•NOT Gate
•XOR Gate

Additionally, these gates can also be found in a combination of one


or two. Therefore, we get other gates such as NAND Gate, NOR
Gate, EXOR Gate, and EXNOR Gate.
COA

Computer architecture: Computer organization:


• ISA
• operational units and their interconnections
• instruction formats
• instruction set
• instruction opcodes
• I/O mechanisms
• Registers
• addressing memory
• instruction and data memory
Structure and Function

• Structure: The way in which the components are interrelated


• Function: The operation of each individual component as part of the structure

Structure Function

• Central processing unit (CPU) • Data processing


• Main memory • Data storage
• I/O
• Control unit
• Data movement
• Control
Components of Motherboard
The Computer: Top-Level view Structure
Co
Le mpu
ve
l V ter C
iew om
po
ne
nts
:To
p-
Basic Instruction Cycle
Interconnection
Structures
The collection of paths
connecting the various modules
is called the interconnection
structure.
Bus Interconnection

• 50 to hundreds of separate lines


• 3-functional groups  data, address, and control lines
• data bus may consist of 32, 64, 128, or even more
separate lines
• the number of lines being referred to as the width
• Each lines consist 8-bit address bus, ex: address 01111111
Typical BUS control lines include :
Instruction sequencing

In executing a microprogram, the address of the next microinstruction to


be executed is in one of these categories:

• Determined by instruction register


• Next sequential address
• Branch
Sequencing Techniques
Branch Control Logic
Two Address Fields

• Two address fields


• Single address field
• Variable format
Branch Control Logic: Single
Address Field
BM 3033 Control Address Register
Microinstruction Sequencing
A Taxonomy of Microinstructions: Microinstructions can be classified
in a variety of ways. Distinctions that are commonly made in the
literature include the following:

• Vertical/horizontal

• Packed/unpacked

• Hard/soft microprogramming

• Direct/indirect encoding
Control Unit
Organization in
micro instruction
sequencing
Hardware – Software
Interface
Instruction set architecture
• Predicate registers: 64 1-bit registers used as predicates. Register pr0 is always set to 1 to enable unpredicted
instructions. Registers pr0 through pr15 are static, and registers pr16 through pr63 can be used as rotating
registers for software pipelining.
• Branch registers: 8 64-bit registers used for branches.
• Instruction pointer: Holds the bundle address of IA-64 instruction.
• Current frame marker: Holds state information relating to the current general register stack frame and
rotation information for fr and pr registers.
• User mask: A set of single-bit values used for alignment traps, performance monitors, and to monitor floating-
point register usage.
• Performance monitor data registers: Used to support performance monitor hardware.
• Processor identifiers: Describe processor implementation-dependent features.
• Application registers: A collection of special-purpose registers. Table 21.5 provides a brief definition of each
Memory Characteristics and Organization | Computer Architecture
Computer
Architecture and Set
of Function
Addressing Mode Cycle
Data
Representation
Types of instruction/operation in Computer Architecture

Microoperations:

• also known as a micro-ops or μops


• low-level instructions used in some designs to implement complex machine
instructions
• sometimes termed macro-instructions in this context.

Micro instruction:
• A symbolic microprogram can be translated into its binary equivalent to
assembler.
• Each line of the assembly language microprogram defines a symbolic
microinstruction.
• Each symbolic microinstruction is divided into five fields: label, microoperations,
CD, BR, and AD.
Micro program:

• A sequence of microinstructions constitutes a microprogram.


• Since alterations of the microprogram are not needed once the control unit is in operation,
• the control memory can be a read-only memory (ROM).
• ROM words are made permanent during the hardware production of the unit.
• The use of a micro program involves placing all control variables in words of ROM for
use by the control unit through successive read operations.
• The content of the word in ROM at a given address specifies a microinstruction.

Microcode:

• Microinstructions can be saved by employing subroutines that use common sections of


microcode.
• The sequence of micro-operations needed to generate the effective address in all memory
reference instructions.
• This sequence could be a subroutine that is called from within many other routines to
execute the effective address computation.
Selection of address for control memory
Condition Field

Branch Field
The Microoperation Fields
(F1, F2, and F3)

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