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010 Error Detection and Correction (CH 10)

This document discusses techniques for synchronizing data transmission and detecting/correcting errors in digital communications. It covers asynchronous and synchronous transmission, single-bit errors, burst errors, error detection codes like parity checks, and error correction codes using concepts like cyclic redundancy checks and modular arithmetic. Error correction codes add redundant bits to data blocks to detect and sometimes fix bit errors during transmission without resending the entire block.

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0% found this document useful (0 votes)
65 views66 pages

010 Error Detection and Correction (CH 10)

This document discusses techniques for synchronizing data transmission and detecting/correcting errors in digital communications. It covers asynchronous and synchronous transmission, single-bit errors, burst errors, error detection codes like parity checks, and error correction codes using concepts like cyclic redundancy checks and modular arithmetic. Error correction codes add redundant bits to data blocks to detect and sometimes fix bit errors during transmission without resending the entire block.

Uploaded by

Awais Oem
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Data and Computer

Communications

Digital Data Communications


Techniques
Error Detection and Correction
Synchronization
 timing problems require a mechanism to
synchronize the transmitter and receiver
 receiver samples stream at bit intervals
 if clocks not aligned and drifting will sample at
wrong time after sufficient bits are sent
 two solutions to synchronizing clocks
 asynchronous transmission
 synchronous transmission
Asynchronous Transmission
Asynchronous - Behavior
 simple
 cheap
 overhead of 2 or 3 bits per char (~20%)
 good for data with large gaps (keyboard)
Synchronous Transmission
 block of data transmitted sent as a frame
 clocks must be synchronized
 can use separate clock line
 or embed clock signal in data
 need to indicate start and end of block
 use preamble and postamble
 more efficient (lower overhead) than async
Error Detection and
Correction
 Single bit errors
 Burst errors
Single bit errors
 An error occurs when a bit is altered between
transmission and reception
 only one bit altered
 caused by white noise
Burst errors
 A burst error means that 2 or more bits in the data
unit have changed.
 contiguous sequence of B bits in which first last and
any number of intermediate bits in error
 caused by impulse noise or by fading in wireless
 effect greater at higher data rates
Error Detection
 Redundancy: To detect or correct errors, we need
to send extra (redundant) bits with data.
 will have errors
 detect using error-detecting code
 added by transmitter
 recalculated and checked by receiver
 still chance of undetected error
 parity
 parity bit set so character has even (even parity)

or odd (odd parity) number of ones


 even number of bit errors goes undetected
Figure 10.3 The structure of encoder and decoder

10.10
10.10
Error Detection Process
Error Correction
 correction of detected errors usually requires
data block to be retransmitted
 not appropriate for wireless applications
 bit error rate is high causing lots of retransmissions
 when propagation delay long (satellite) compared with
frame transmission time, resulting in retransmission of
frame in error plus many subsequent frames
 instead need to correct errors on basis of bits
received
 error correction provides this
Error Correction Process
Modular Arithmetic

Note
In modulo-N arithmetic, we use only the integers in the range 0
to N −1, inclusive.

10.14
10.14
Figure 10.4 XORing of two single bits or two words

10.15
10.15
BLOCK CODING

In block coding, we divide our message into blocks,


each of k bits, called datawords. We add r redundant
bits to each block to make the length n = k + r. The
resulting n-bit blocks are called codewords.

10.16
10.16
Example 10.1

The 4B/5B block coding discussed in Chapter 4 is a good


example of this type of coding. In this coding scheme,
k = 4 and n = 5. As we saw, we have 2k = 16 datawords
and 2n = 32 codewords. We saw that 16 out of 32
codewords are used for message transfer and the rest are
either used for other purposes or unused.

10.17
10.17
Error Detection in block
coding
 Enough redundancy is added to detect
an error.
 The receiver knows an error occurred
but does not know which bit(s) is(are) in
error.
 Has less overhead than error
correction.
10.18
10.18
Figure 10.6 Process of error detection in block coding

10.19
10.19
Example 10.2

Let us assume that k = 2 and n = 3. Table 10.1 shows the


list of datawords and codewords. Later, we will see how
to derive a codeword from a dataword.

Assume the sender encodes the dataword 01 as 011 and


sends it to the receiver. Consider the following cases:

1. The receiver receives 011. It is a valid codeword. The


receiver extracts the dataword 01 from it.

10.20
10.20
Example 10.2 (continued)

2. The codeword is corrupted during transmission, and


111 is received. This is not a valid codeword and is
discarded.

3. The codeword is corrupted during transmission, and


000 is received. This is a valid codeword. The receiver
incorrectly extracts the dataword 00. Two corrupted
bits have made the error undetectable.

10.21
10.21
Table 10.1 A code for error detection (Example 10.2)

10.22
10.22
Note
An error-detecting code can detect
only the types of errors for which it is designed; other types of
errors may remain undetected.

10.23
10.23
Error Correction : Structure of encoder and decoder in error correction

10.24
10.24
Example 10.3

Let us add more redundant bits to Example 10.2 to see if


the receiver can correct an error without knowing what
was actually sent. We add 3 redundant bits to the 2-bit
dataword to make 5-bit codewords. Table 10.2 shows the
datawords and codewords. Assume the dataword is 01. The
sender creates the codeword 01011. The codeword is
corrupted during transmission, and 01001 is received.
First, the receiver finds that the received codeword is not
in the table. This means an error has occurred. The
receiver, assuming that there is only 1 bit corrupted, uses
the following strategy to guess the correct dataword.
10.25
10.25
Example 10.3 (continued)

1. Comparing the received codeword with the first


codeword in the table (01001 versus 00000), the
receiver decides that the first codeword is not the one
that was sent because there are two different bits.

2. By the same reasoning, the original codeword cannot be


the third or fourth one in the table.

3. The original codeword must be the second one in the


table because this is the only one that differs from the
received codeword by 1 bit. The receiver replaces
01001 with 01011 and consults the table to find the
dataword 01.
10.26
10.26
Table 10.2 A code for error correction (Example 10.3)

10.27
10.27
Burst Errors
 Burst errors are very common, in particular in
wireless environments where a fade will affect
a group of bits in transit. The length of the
burst is dependent on the duration of the
fade.
 One way to counter burst errors, is to break
up a transmission into shorter words and
create a block (one word per row), then have
a parity check per word.
 The words are then sent column by column.
When a burst error occurs, it will affect 1 bit in
several words as the transmission is read
back into the block format and each word is
checked individually.
Figure 10.13 Burst error correction using Hamming code

10.
10-4 CYCLIC CODES

Cyclic codes are special linear block codes with one


extra property. In a cyclic code, if a codeword is
cyclically shifted (rotated), the result is another
codeword.

10.
Table 10.6 A CRC code with C(7, 4)

10.
Figure 10.14 CRC encoder and decoder

10.
Figure 10.15 Division in CRC encoder

10.
Figure 10.16 Division in the CRC decoder for two cases

10.
Figure 10.17 Hardwired design of the divisor in CRC

10.
Figure 10.18 Simulation of division in CRC encoder

10.
Figure 10.19 The CRC encoder design using shift registers

10.
Figure 10.20 General design of encoder and decoder of a CRC code

10.
Using Polynomials
 We can use a polynomial to represent a
binary word.
 Each bit from right to left is mapped onto a
power term.
 The rightmost bit represents the “0” power
term. The bit next to it the “1” power term, etc.
 If the bit is of value zero, the power term is
deleted from the expression.
Figure 10.21 A polynomial to represent a binary word

10.
Figure 10.22 CRC division using polynomials

10.
Note

The divisor in a cyclic code is normally


called the generator polynomial
or simply the generator.

10.
Note

In a cyclic code,
If s(x) ≠ 0, one or more bits is corrupted.
If s(x) = 0, either

a. No bit is corrupted. or
b. Some bits are corrupted, but the
decoder failed to detect them.

10.
Note
In a cyclic code, those e(x) errors that are divisible
by g(x) are not caught.
Received codeword (c(x) + e(x))/g(x) =
c(x)/g(x) + e(x)/gx
The first part is by definition divisible the second
part will determine the error. If “0” conclusion ->
no error occurred. Note: that could mean that an
error went undetected.

10.
Note

If the generator has more than one term and


the coefficient of x0 is 1,
all single errors can be caught.

10.
Example 10.15

Which of the following g(x) values guarantees that a


single-bit error is caught? For each case, what is the error
that cannot be caught?
a. x + 1 b. x3 c. 1
Solution
a. No xi can be divisible by x + 1. Any single-bit error can
be caught.
b. If i is equal to or greater than 3, xi is divisible by g(x).
All single-bit errors in positions 1 to 3 are caught.
c. All values of i make xi divisible by g(x). No single-bit
error can be caught. This g(x) is useless.

10.
Figure 10.23 Representation of two isolated single-bit errors using polynomials

10.
Note

If a generator cannot divide xt + 1


(t between 0 and n – 1),
then all isolated double errors
can be detected.

10.
Example 10.16

Find the status of the following generators related to two


isolated, single-bit errors.
a. x + 1 b. x4 + 1 c. x7 + x6 + 1 d. x15 + x14 + 1
Solution
a. This is a very poor choice for a generator. Any two
errors next to each other cannot be detected.
b. This generator cannot detect two errors that are four
positions apart.
c. This is a good choice for this purpose.
d. This polynomial cannot divide xt + 1 if t is less than
32,768. A codeword with two isolated errors up to
32,768 bits apart can be detected by this generator.
10.
Note

A generator that contains a factor of


x + 1 can detect all odd-numbered errors.

10.
Note

❏ All burst errors with L ≤ r will be


detected.
❏ All burst errors with L = r + 1 will be
detected with probability 1 – (1/2)r–1.
❏ All burst errors with L > r + 1 will be
detected with probability 1 – (1/2)r.

10.
Example 10.17

Find the suitability of the following generators in relation


to burst errors of different lengths.
a. x6 + 1 b. x18 + x7 + x + 1 c. x32 + x23 + x7 + 1

Solution
a. This generator can detect all burst errors with a length
less than or equal to 6 bits; 3 out of 100 burst errors
with length 7 will slip by; 16 out of 1000 burst errors of
length 8 or more will slip by.

10.
Example 10.17 (continued)

b. This generator can detect all burst errors with a length


less than or equal to 18 bits; 8 out of 1 million burst
errors with length 19 will slip by; 4 out of 1 million
burst errors of length 20 or more will slip by.

c. This generator can detect all burst errors with a length


less than or equal to 32 bits; 5 out of 10 billion burst
errors with length 33 will slip by; 3 out of 10 billion
burst errors of length 34 or more will slip by.

10.
Note

A good polynomial generator needs to have the


following characteristics:
1. It should have at least two terms.
2. The coefficient of the term x0 should
be 1.
3. It should not divide xt + 1, for t
between 2 and n − 1.
4. It should have the factor x + 1.

10.
Table 10.7 Standard polynomials

10.
10-5 CHECKSUM

The checksum is used in the Internet by several


protocols although not at the data link layer. However,
we briefly discuss it here to complete our discussion on
error checking

10.
Example 10.18

Suppose our data is a list of five 4-bit numbers that we want


to send to a destination. In addition to sending these
numbers, we send the sum of the numbers. For example, if
the set of numbers is (7, 11, 12, 0, 6), we send (7, 11, 12, 0,
6, 36), where 36 is the sum of the original numbers. The
receiver adds the five numbers and compares the result with
the sum. If the two are the same, the receiver assumes no
error, accepts the five numbers, and discards the sum.
Otherwise, there is an error somewhere and the data are not
accepted.

10.
Example 10.19

We can make the job of the receiver easier if we send the


negative (complement) of the sum, called the checksum. In
this case, we send (7, 11, 12, 0, 6, −36). The receiver can
add all the numbers received (including the checksum). If
the result is 0, it assumes no error; otherwise, there is an
error.

10.
Example 10.20

How can we represent the number 21 in one’s


complement arithmetic using only four bits?

Solution
The number 21 in binary is 10101 (it needs five bits). We
can wrap the leftmost bit and add it to the four rightmost
bits. We have (0101 + 1) = 0110 or 6.

10.
Example 10.21

How can we represent the number −6 in one’s


complement arithmetic using only four bits?

Solution
In one’s complement arithmetic, the negative or
complement of a number is found by inverting all bits.
Positive 6 is 0110; negative 6 is 1001. If we consider only
unsigned numbers, this is 9. In other words, the
complement of 6 is 9. Another way to find the complement
of a number in one’s complement arithmetic is to subtract
the number from 2n − 1 (16 − 1 in this case).

10.
Example 10.22

Let us redo Exercise 10.19 using one’s complement


arithmetic. Figure 10.24 shows the process at the sender
and at the receiver. The sender initializes the checksum to
0 and adds all data items and the checksum (the checksum
is considered as one data item and is shown in color). The
result is 36. However, 36 cannot be expressed in 4 bits. The
extra two bits are wrapped and added with the sum to
create the wrapped sum value 6. In the figure, we have
shown the details in binary. The sum is then
complemented, resulting in the checksum value 9 (15 − 6 =
9). The sender now sends six data items to the receiver
including the checksum 9.

10.
Example 10.22 (continued)

The receiver follows the same procedure as the sender. It


adds all data items (including the checksum); the result is
45. The sum is wrapped and becomes 15. The wrapped
sum is complemented and becomes 0. Since the value of
the checksum is 0, this means that the data is not
corrupted. The receiver drops the checksum and keeps the
other data items. If the checksum is not zero, the entire
packet is dropped.

10.
Figure 10.24 Example 10.22

10.
Note

Receiver site:
1. The message (including checksum) is
divided into 16-bit words.
2. All words are added using one’s
complement addition.
3. The sum is complemented and becomes the
new checksum.
4. If the value of checksum is 0, the message
is accepted; otherwise, it is rejected.

10.
Example 10.23

Let us calculate the checksum for a text of 8 characters


(“Forouzan”). The text needs to be divided into 2-byte (16-
bit) words. We use ASCII (see Appendix A) to change each
byte to a 2-digit hexadecimal number. For example, F is
represented as 0x46 and o is represented as 0x6F. Figure
10.25 shows how the checksum is calculated at the sender
and receiver sites. In part a of the figure, the value of partial
sum for the first column is 0x36. We keep the rightmost digit
(6) and insert the leftmost digit (3) as the carry in the second
column. The process is repeated for each column. Note that
if there is any corruption, the checksum recalculated by the
receiver is not all 0s. We leave this an exercise.

10.
Figure 10.25 Example 10.23

10.

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