2022 OCTOBER

PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

Chapter 5:
Computer Arithmetic

Computer Archiecture and Organization

PRESENTED BY:
DIZON, CHRISLET DIANNE:
ORIAS, MAEVIC
QUERIONES, BEA RIEGZELLE
SOLOMON, REGGIE DAVE
TULIAO, JOHN PATRICK
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

OVERVIEW
• The Arithmetic Logic Unit
• Integer Representation

Computer Archiecture and Organization

• Integer Arithmetic
• Floating-Point Representation
• Floating-Point Arithmetic
2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

WHAT IS
In the computer system, ALU is a main component of the central processing unit,
ALU?
which stands for arithmetic logic unit and performs arithmetic and logic
operations. It is also known as an integer unit (IU) that is an integrated circuit
within a CPU or GPU, which is the last component to perform calculations in the
processor. It has the ability to perform all processes related to arithmetic and logic

Computer Archiecture and Organization

operations. The arithmetic logic unit is split into AU (arithmetic unit) and LU
(logic unit). The operands and code used by the ALU tell it which operations have
to perform according to input data. When the ALU completes the processing of
input, the information is sent to the computer's memory.

2
2022 OCTOBER Computer Archiecture and Organization
2
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

OPERATIONS OF
ALU
The operations performed by ALU are:

• Logical Operations: The logical operations consist of NOR, NOT, AND, NAND, OR,
XOR, and more.
• Bit-Shifting Operations: It is responsible for displacement in the locations of the bits

Computer Archiecture and Organization

to the by right or left by a certain number of places that are known as a multiplication
operation.
• Arithmetic Operations: Although it performs multiplication and division, this refers to
bit addition and subtraction. But multiplication and division operations are more
costly to make. In the place of multiplication, addition can be used as a substitute and
subtraction for division. 2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

ALU
• DATA- Three parallel buses are contained by the ALU, which include two input
SIGNALS
and output operand. These three buses handle the number of signals, which are the
same.
• OPCODE- the input is a parallel bus that conveys to the ALU an operation
selection code, which is an enumerated value that specifies the desired arithmetic

Computer Archiecture and Organization

or logic operation to be performed by the ALU.
• STATUS
⚬ OUTPUT - it can be carry-out, zero, negative, overflow or parity.
⚬ INPUT- the status inputs allow ALU to access further information to
complete the operation successfully. Furthermore, stored carry-out from a
previous ALU operation is known as a single "carry-in" bit. 2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

Computer Archiecture and Organization

Simple Arithmetic Unit Arithmetic Logic Unit

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

Computer Archiecture and Organization

Addition Subtraction
2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER
REPRESENTATION
Integers are whole numbers or fixed-point numbers with the radix point fixed after
the least-significant bit. They are contrast to real numbers or floating-point numbers,
where the position of the radix point varies. It is important to take note that integers and
floating-point numbers are treated differently in computers. They have different

Computer Archiecture and Organization

representation and are processed differently (e.g., floating-point numbers are processed
in a so-called floating-point processor).

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

Integer Representation

Unsigned Representation Signed Representation

(+) Binary no.

Computer Archiecture and Organization

Signed magnitude 1's Complement 2's Complement

(+) & (-) Binary no.

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER
• UNSIGNED-MAGNITUDE REPRESENTATION - Example:
REPRESENTATION
Unsigned numbers don’t have any sign, these can contain Magnitude
only magnitude of the number. So, representation of
unsigned binary numbers are all positive numbers only.

The range of unsigned binary number is from

Computer Archiecture and Organization

• SIGNED-MAGNITUDE REPRESENTATION - Signed Sign bit
numbers contain sign flag, this representation distinguish
positive and negative numbers. This technique contains
Magnitude
both sign bit and magnitude of a number.

The range of Sign-Magnitude form is from

2
n = number of variables
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER
• ONE'S COMPLIMENT REPRESENTATION - 1’s

REPRESENTATION
complement binary numbers are very useful in Signed number
representation. Positive numbers are simply represented as
Example:
Determine the 1's compliment of -6.

Binary number. There is nothing to do for positive binary

number. But in case of negative binary number representation, Negation
we represent in 1’s complement. If the number is negative

Computer Archiecture and Organization

then it is represented using 1’s complement. First represent
the number with positive sign and then take 1’s complement
of that number.

The range of 1's compliment form is from

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER
• TWO'S COMPLIMENT
complement is the most
REPRESENTATION
REPRESENTATION - Two's
popular method of signifying
Example:
negative integers in computers. It is also an operation of
negation (converting positive to negative numbers or vice
versa) in computers which represent negative numbers using
two's complement. Its use is ubiquitous today because it
doesn't require the addition and subtraction circuitry to

Computer Archiecture and Organization

examine the signs of the operands to determine whether to
add or subtract, making it both simpler to implement and
capable of easily handling higher precision arithmetic.

The range of 2's compliment form is from

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

4. FIXED POINT REPRESENTATION -

• Sign bit -The fixed-point numbers in binary uses a sign bit. A positive number has a sign bit
0, while a negative number has a sign bit 1.

Computer Archiecture and Organization

• Integral Part – The integral part is of different lengths at different places. It depends on the
register's size, like in an 8-bit register, integral part is 4 bits.
• Fractional part – Fractional part is also of different lengths at different places. It depends on
the register's size, like in an 8-bit register, integral part is of 3 bits.
⚬ 8 bits = 1Sign bit + 4 bits(integral) + 3bits (fractional part)
⚬ 16 bits = 1Sign bit + 9 bits(integral) +6 bits (fractional part)
2
⚬ 32 bits = 1Sign bit + 15 bits(integral) + 9 bits (fractional part)
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
A. NEGATION

• One's Complement
The one's complement, sometimes called the bitwise complement, yields a bitwise one's
complement of its operand. That is, every bit that is 1 in the operand is 0 in the result. Conversely,

Computer Archiecture and Organization

every bit that is 0 in the operand is 1 in the result.

Example: 011101 -> 100010

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
• Two's Complement
In two's complement representation, the negation of an integer can be formed with the following
rules:
1. Take the one's complement of each bit of the integer (including the sign bit). That is set each 1 to
0 and each 0 to 1.

Computer Archiecture and Organization

2. Treating the result as an unsigned binary integer, add 1.

Example:
00010010 -> 11101101 - 1's complement
+ 1
11101110 2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
B. Addition
0+0=0
1+0=1
1 + 1 = 10, sum is 0 and carry the 1.
1 + 1 + 1 = 11, sum is 1, and carry a 1.

Computer Archiecture and Organization

• Unsigned Integer
Examples:

1.) 100001 2.) 00001010 (10)

+ 011101 + 00001110 (14)
111110 00011000 (24) 2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
• One's Complement
Add the numbers, and then add the carry coming out of the highest bit to the result (this was
called an "end-around-carry").

Examples:

Computer Archiecture and Organization

1.) 1110 2.) 0001
+ 0101 + 1010
(1)0011 -> 0011 (0)1011 -> 1011+0 = 1011
+1
0100
2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
• Two's Complement
The rules:
-Just do unsigned addition
-Throw away any carry out of the msb (most significant bit)

Examples:

Computer Archiecture and Organization

1.) 111111 2.) 1111
+ 001000 + 0101
1 000111 -> 000111 (1)0100 -> 0100
^
this bit is thrown away 2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
B. Subtraction
1-1=0
0-0=0
1-0=1
10 - 1 = 1
0 - 1 = borrow!

Computer Archiecture and Organization

• Unsigned Integer
Examples:

1.) 1011 - must borrow 2.) 1010 - must borrow

- 101
2
- 0111 0101
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
• One's Complement
Rules:
1.Write the 1’s complement of the subtrahend.
2.Then add the 1’s complement subtrahend with the minuend.
3. If the result has a carryover, then add that carry over in the least significant bit.
4. If there is no carryover, then take the 1’s complement of the resultant, and it is negative.

Computer Archiecture and Organization

Examples:
1.) 110101 – 100101
001111
110101 - minuend + 1
+ 011010 - 1’s complement of subtrahend 010000
1 001111 - carryover 2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
Examples:
2.) 101011 – 111001
101011 - minuend
+ 000110 - 1’s complement of subtrahend
110001 -> -001110

Computer Archiecture and Organization

• Two's Complement
Rules:
1.In the first step, find the 2's complement of the subtrahend.
2. Add the complement number with the minuend.
3. If we get the carry by adding both the numbers, then we discard this carry
2
and the result is positive else take 2's complement of the result which will be negative.
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
Examples:
1.) 10101 - 00111 2.) 10110 – 11010
2’s complement of 00111 is (11000 + 1) 2’s complement of 11010 is (00101 + 1)

11000 00101
+ 1 + 1

Computer Archiecture and Organization

11001 - 2's complement of subtrahend 00110 - 2's complement of subtrahend

10101 10110
+ 11001 + 00110
(1)01110 -> 01110 11100
2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
Examples:
2.) *Find the 2's complement of the result.
2’s complement of 11100 is (00011 + 1)
00011

Computer Archiecture and Organization

+ 1
-00100

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
C. Multiplication
Examples:
0x0=0
0x1=0 1.) 0111 (7) 2.) 1101 (13)
1x0=0 x 0110 (6) x 1110 (14)
1x1=1 0000 0000

Computer Archiecture and Organization

0111 1101
0111 1101
+ 0000 + 1101
0101010 (42) 10110110 (182)

2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

INTEGER ARITHMETIC
C. Division Examples:
quotient 1.) 1111 / 011
0101
divisor |dividend
011 | 1111
Or, written as fractions: -0

Computer Archiecture and Organization

dividend 11
divisor - 11
01
-0
11
- 11
2
0 (remainder)
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

FLOATING-POINT
REPRESENTATION
Floating-point representation is similar in concept to
scientific notation. Logically, a floating-point number
consists of: A signed (meaning positive or negative)
digit string of a given length in a given base (or radix).
This digit string is referred to as the significand,

Computer Archiecture and Organization

mantissa, or coefficient.

2
 The floating-point representation breaks the number into two parts, the left-hand side is a
signed, fixed-point number known as a mantissa and the right-hand side of the number is
known as the exponent. The floating-point values are also authorized with a sign; 0
denoting the positive value and 1 denoting the negative value.
THE FORM IS:

OR

EXAMPLE: FOR
EXAMPLE:
Convert 111101.1000110 into floating-point value.

111101.1000110 = 1.111011000110 * 25
Converted to floating-point value

→ Denotes negative sign value

In this example, the integer value is converted to a floating-point value by
changing the radix point next to the signed integer and scaling up the number
to the exponential form by multiplying the value with the base 2. The value
remains unaltered and this phase is known as the normalized method.
IEEE STANDARD FOR BINARY
FLOATING-POINT
REPRESENTATION
IEEE 754 has 3 basic components:
• The Sign of Mantissa –
This is as simple as the name. 0 represents a positive number while 1 represents a negative
number.

2. The Biased exponent –

The exponent field needs to represent both positive and negative exponents. A bias is added to
the actual exponent in order to get the stored exponent.

3. The Normalised Mantissa –

The mantissa is part of a number in scientific notation or a floating-point number, consisting of
its significant digits. Here we have only 2 digits, i.e. O and 1. So a normalised mantissa is one
with only one 1 to the left of the decimal.
IEEE 754 numbers are divided into two based on the above
three components: single precision
IEEE 754 numbers are divided into two based on the above three
components: double precision
EXAMPL
E:
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

FLOATING-POINT
ARITHMETIC
Arithmetic operations on floating point numbers consist of
addition, subtraction, multiplication and division. The

Computer Archiecture and Organization

operations are done with algorithms similar to those used on
sign magnitude integers

2
ADDITION
SUBTRACTION
MULTIPLICATION
 DIVISION

It is similar to multiplication.
do unsigned division on the mantissas (don’t forget the hidden bit)
subtract TRUE exponents

The organization of a floating point adder unit and the algorithm is given below.
PRECISION CONSIDERATION
StatsDirect calculates all of its functions in IEEE-754 double precision (8 byte, 64 bit)
for floating point arithmetic and 4 byte (32 bit) integers for integer arithmetic.

Results are displayed to the level of precision that you specify under Options in the
analysis menu. The default number of decimal places shown is 6. Double precision
numbers are accurate up to sixteen decimal places but after calculations have been done
there may be some rounding errors to account for. In theory this should affect no more
than the last significant digit but in practice it is safer to rely upon fewer decimal
places.
IEEE 754 numbers are divided into two based on the above three components:
single precision and double precision.
Some statistical software applications, including the statistical routines in widely used
spreadsheets, produce inaccurate results due to the use of algorithms that do not handle
precision properly (McCullough and Wilson, 1999). StatsDirect uses robust and reliable
algorithms in order to maximise the accuracy of its results. The American National
Institute of Standards and Technology produces reference data sets for testing the
accuracy of statistical software (see http://www.nist.gov/itl/div898/strd/).

Double precision specifications:

• minimum = 2.22 * 10^-308
• maximum = 1.79 * 10^308
• closest to 0 without being 0 = +/- 10^323
• precision = 2.22 * 10^-16
• minimum exponent = -1022
• maximum exponent = 1024
 IEEE Standard for Binary Floating-Point Arithmetic

The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for
floating-point computation which was established in 1985 by the Institute of Electrical
and Electronics Engineers (IEEE). The standard addressed many problems found in the
diverse floating point implementations that made them difficult to use reliably and
reduced their portability. IEEE Standard 754 floating point is the most common
representation today for real numbers on computers, including Intel-based PC’s, Macs,
and most Unix platforms.
The features required by the IEEE standard make it possible to support interval
arithmetic, the retrospective diagnosis of anomalies, efficient implementations of
standard elementary functions like exp and cos, multiple precision arithmetic, and many
other tools that are useful in numerical computation.

IEEE 754 floating-point arithmetic offers users greater control over computation than
does any other kind of floating-point arithmetic. The IEEE standard simplifies the task
of writing numerically sophisticated, portable programs not only by imposing rigorous
requirements on conforming implementations, but also by allowing such
implementations to provide refinements and enhancements to the standard itself.
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

REFERENC
ES
• https://computersciencewiki.org/index.php/
Functions_of_the_arithmetic_logic_unit_(ALU)
• https://www.javatpoint.com/what-is-alu
• https://en.m.wikipedia.org/wiki/Arithmetic_logic_unit
• https://www.math-only-math.com/signed-magnitude-representation.html

Computer Archiecture and Organization

• https://academickids.com/encyclopedia/index.php/Two's_complement
• https://www.tutorialspoint.com/unsigned-and-signed-binary-numbers
• https://byjus.com/maths/binary-subtraction/
• https://arcb.csc.ncsu.edu/~mueller/codeopt/codeopt00/notes/intarit.html
• https://cnx.org/contents/[email protected]:ET2nPmjR@1/Module-3-Computer-Arithmetic
2
 2022 OCTOBER
PANGASINAN STATE UNIVERSITY -- URDANETA CAMPUS

REFERENC
ES
• https://pages.cs.wisc.edu/~markhill/cs354/Fall2008/notes/arith.int.html
• https://www.javatpoint.com/addition-and-subtraction-using-2s-complement-in-digital-
electronics
• https://pages.cs.wisc.edu/~smoler/x86text/lect.notes/arith.flpt.html
• https://www.cs.umd.edu/~meesh/411/CA-online/chapter/floating-point-arithmetic-

Computer Archiecture and Organization

unit/index.html
• https://www.tutorialspoint.com/what-is-floating-point-representation-in-computer-
architecture
• https://www.geeksforgeeks.org/ieee-standard-754-floating-point-numbers/
• https://docs.oracle.com/cd/E19957-01/806-3568/ncg_math.html
2