Digital Electronics and Computer Architecture Laboratory

1
 Laboratory Exercises / Practical's
1. Design and Implement Code Converters using basic logic gates
2. Design and Implement Combinational Logic Design using MUX/Decoder ICs
======================================================
3. Design and Implement MOD-N asynchronous counter using JK- Flip flop
4. Design and Implement MOD-N asynchronous counter using JK- Flip flop/IC7490.
5. Design and implement Synchronous Counter
6. Design and implement Sequence Detector
=====================================================
7. Displaying hex values using 64-bit Assembly language programming (ALP). 
8. Accepting hex values user input using 64-bit ALP. 
9. Implementation of addition and subtraction of 8-bit numbers (Using user input, macro and procedure)
with 64-bit ALP.
10. Performing basic string operations using ALP.

DELD Lab (ECE2003A) T4 S.Y. B. Tech.

9/1/2021 2
Assignment 4 2021-22
 Assignment No 6
Problem statement : . Design and implement Sequence Detector
To detect sequence 110

OBJECTIVES:
• To learn Finite State Machine
• To understand Moore and Mealy Machine
• To learn and implement Sequence Detector

IC Number IC Name
7476 Dual MS JK FF

Platform Used in On line mode: https://www.deldsim.com/simulator/

 State Machine Applications
State machines are used in a number of system control applications
• In DSP: As sequencers for digital signal processing (DSP) applications, state machines
offer speed and sufficient functionality without the overkill of complex
microprocessors
• In video controller: It generates addresses for scanning purposes, using counters with
various sequences and lengths
• In peripheral control: Both encoding and decoding can be translated into state
machines, which examine the serial data stream as it is read, and generate the output
data
• Industrial control and robotics: Mechanical positioning of a robot arm, simple
decision making, and calculation of a trigonometric function
• Data encryption and decryption: A programmable state machine device with a
security Bit is ideal for this because memory is internally programmed and cannot be
accessed by someone tampering with the system
10/9/2022 Computer Science and Information Technology-I 4
 Finite State Machines
• Sequential Circuits with finite number of states are called as Finite State Machines
(FSM)
• Sequence Generator, Synchronous counter are examples of Finite State Machines
(FSM)
• Those parts of digital systems whose outputs depend on their past inputs as well as
their current ones can be modeled as finite state machines.
• When a new input is presented to the FSM, an output is generated which depends
on this input and the present state of the FSM, and the machine is caused to move
into new state, referred to as the next state
• The internal state is stored in a block labeled “memory.”

10/9/2022 Computer Science and Information Technology-I 5

 Types of FSMs
• There are two different ways to express the FSMs with respect to the
output.

• Sequential circuits in which outputs are function of only present state

are called Moore Machines

• Sequential circuits in which outputs are function of present state as

well as input are called Mealy Machines

• For either type, the control sequencing depends upon both states
and input signals
10/9/2022 Computer Science and Information Technology-I 6
 Moore machines

10/9/2022 7
Computer Science and Information Technology-I
 Mealy machine

10/9/2022 Computer Science and Information Technology-I 8

 Comparison Mealy Machine with Moore Machine

10/9/2022 Computer Science and Information Technology-I 9

 Sequence detector circuit

In communication system, receiver receives sequence of continuous 1s

and 0s in random combination.

To detect the start of the transmission or detection of sender etc, it is

required to detect some specific sequence of 1s and 0s.

Sequence detector is a circuit whose output becomes 1 whenever the

specified sequence is detected. The sequence can be considered as
overlapped or non overlapped.

Example: Let us detect sequence 010.

10/9/2022 Computer Science and Information Technology-I 10

 Sequence detector circuit

Example: Let us detect sequence 010.

• Z1 is the output if overlapping condition is considered and
• Z2 is output if sequence is considered in non overlapped mode.
• X is the input sequence received

Z1 = 0 0 0 0 0 0 1 0 1 0 0 Overlapping

Z2 = 0 0 0 0 0 0 1 0 0 0 0 Non Overlapping

10/9/2022 Computer Science and Information Technology-I 11

 Steps to design a sequential synchronous circuit

1. Draw state diagram

2. Make a state table
3. Apply state reduction if required
4. Assign states
5. Re-write the state table using states assigned
6. Prepare state transition table
7. Use k-maps to find inputs to Flip Flop
8. Draw the circuit diagram.

10/9/2022 Computer Science and Information Technology-I 12

 Problem statement:
Design a sequence detector to detect the bit
sequence 110 using Mealy Machine.

10/9/2022 Computer Science and Information Technology-I 13

 State diagram: Sequence detector 110 Mealy Machine
1. Draw state diagram
2. Make a state table
3. Apply state reduction if required
4. Assign states
5. Re-write the state table using states assigned
6. Prepare state transition table
7. Use k-maps to find inputs to Flip Flop
8. Draw the circuit diagram.

10/9/2022 Computer Science and Information Technology-I 14

 State Table: Sequence detector 110
X/Y

Consider Input = X and Output = Z

Present Next State Output (Y)

state X=0 X=1 X=0 X=1
a b 0 0
a c
a 0 0
b 1. Draw state diagram
a b 1 0 2. Make a state table
c 3. Apply state reduction if required
Check if state reduction is required. As no 4. Assign states
two rows of next state and output in the 5. Re-write the state table using states assigned
6. Prepare state transition table
state table are same, state reduction is not 7. Use k-maps to find inputs to Flip Flop
required in this design 8. Draw the circuit diagram.
10/9/2022 Computer Science and Information Technology-I 15
 State assignment: Sequence detector 110
State assignment State Table with state Assignment

a = 00 Pres Next State Output

b = 01 ent X = X = X = X =
c = 10 stat 0 1 0 1
e
00 01 0 0
00 00 10 0 0

1. Draw state diagram 01 00 01 1 0

2. Make a state table 10
3. Apply state reduction if required Let us call MSB flip flop as A
4. Assign states
5. Re-write the state table using states assigned And LSB flip flop as B
6. Prepare state transition table Input = X
7. Use k-maps to find inputs to Flip Flop Output = Y 16

8. Draw the circuit diagram.

10/9/2022 Computer Science and Information Technology-I
 State assignment: Sequence detector 110

1. Draw state diagram

2. Make a state table
3. Apply state reduction if required
4. Assign states
5. Re-write the state table using states assigned
6. Prepare state transition table
7. Use k-maps to find inputs to Flip Flop
8. Draw the circuit diagram.

10/9/2022 Computer Science and Information Technology-I 17

 Excitation table: Sequence detector 110
Prese Next State Output
nt Present Input Next State Flip Flop Inputs Out
X=0 X=1 X= X= State put
state 0 1
Q A QB X QA+1 QB+ J KA JB KB Y
1
A
QA QB QA+1 QA+1 Y Y
QB+1 QB+1
0 0 0 0 0 0 X 0 X 0
00 00 01 0 0 0 0 1 0 1 0 X 1 X 0
01 00 10 0 0 0 1 0 0 0 0 X X 1 0
10 00 01 1 0
0 1 1 1 0 1 X X 1 0
Excitation Table of JK flip flop
1 0 0 0 0 X 1 0 X 1
1 0 1 0 1 X 1 1 X 0
1 1 0 X X X X X X X
1 1 1 X X X X X X X

10/9/2022 Computer Science and Information Technology-I 18

 Example of Sequence detector 110 Contd.

1. Draw state diagram

2. Make a state table
3. Apply state reduction if required
4. Assign states
5. Re-write the state table using states assigned
6. Prepare state transition table
7. Use k-maps to find inputs to Flip Flop
8. Draw the circuit diagram.

10/9/2022 Computer Science and Information Technology-I 19

 K-maps: Sequence detector 110
QB X QB X For JB JB = X
For JA JA = QB.X QA
QA
0 0 1 0 0 1 X X
X X X X 0 1 X X

QB X For KA KA = 1 QB X For KB KB = 1
QA QA
X X X X X X 1 1
1 1 X X X X X X

QB X
QA For Y Y = QA.X’

0 0 0 0
1 0 X X
10/9/2022 20
 Example of Sequence detector 110 Contd.

1. Draw state diagram

2. Make a state table
3. Apply state reduction if required
4. Assign states
5. Re-write the state table using states assigned
6. Prepare state transition table
7. Use k-maps to find inputs to Flip Flop
8. Draw the circuit diagram.

10/9/2022 Computer Science and Information Technology-I 21

 Circuit Diagram: Sequence detector 110

CLOCK

X’
Y

10/9/2022 Computer Science and Information Technology-I 22