Faculty of Computing and Informatics

Department of Computer Science

Operating Systems
OPS621S
2020 - Semester 2
Event Specific Picture –Chapter 3
behind red graphic
Memory Management
(Virtual Memory Systems)
 Learning Objectives
 After completing the chapter, you should be able to describe:
 How complex memory allocation methods function
 How page allocation methods spawned virtual memory
 How several page replacement policies compare in function
and best uses
 How paging works and how a memory allocation scheme
determines which pages should be swapped out of memory
 How the concept of the working set is used in memory
allocation schemes
 How cache memory issued by the operating system to
improve response time
 Chapter Outline
 Paged Memory Allocation
 Demand Paging Memory Allocation
 Page Replacement Policies
 FIFO
 LRU
 MRU
 Mechanics of Paging
 Working Set
 Segmented Memory Allocation
 Virtual Memory
 Cache Memory
 Introduction
 Evolution of virtual memory
– Paged, demand paging, segmented,
segmented/demand paging
– Foundation of current virtual memory methods
 Areas of improvement from the need for:
– Continuous program storage
– Placement of entire program in memory during
execution
 Enhanced Memory Manager performance:
cache memory
 Paged Memory Allocation (1 of 10)
 Incoming job: divided into pages of equal size
 Best condition
– Pages, sectors, and page frames: same size
• Exact sizes: determined by disk’s sector size
 Memory manager tasks: prior to program execution
– Determine number of pages in program
– Locate enough empty page frames in main memory
– Load all program pages into page frames
 Program: stored in non-contiguous page frames
– Advantages: more efficient memory use; compaction scheme
eliminated (no external fragmentation)
– New problem: keeping track of job’s pages (increased operating
system overhead)
 Paged Memory Allocation (2 of 10)

(figure 3.1)
In this example, each
page frame can hold
100 bytes. This job, at
350 bytes long, is
divided among four
page frames. The
resulting internal
fragmentation (wasted
space) is associated
with Page 3, loaded
into Page Frame 11.
© Cengage Learning
2018
 Paged Memory Allocation (3 of 10)
 Internal fragmentation: job’s last page frame only
 Entire program: required in memory during its
execution
 Three tables for tracking pages: Job Table (JT),
Page Map Table (PMT), and Memory Map Table
(MMT)
– Stored in main memory: operating system area
 Job Table: information for each active job
– Job size
– Memory location: job’s PMT
 Paged Memory Allocation (4 of 10)
 Page Map Table: information for each page
– Page number: beginning with Page 0
– Memory address
 Memory Map Table: entry for each page
frame
– Location
– Free/busy status
 Paged Memory Allocation (5 of 10)

(table 3.1)
Three snapshots of the Job Table. Initially the Job Table has one entry for
each job (a). When the second job ends (b), its entry in the table is released.
Finally, it is replaced by the entry for the next job (c).
© Cengage Learning 2018
 Paged Memory Allocation (6 of 10)
 Line displacement (offset)
– Line distance: how far away a line is from the beginning
of its page.
– Line location: Used to locate that line within its page
frame.
– Relative value
 Determining page number and displacement of a
line
– Divide job space address by the page size
– Page number: integer quotient
– Displacement: remainder
 Paged Memory Allocation (7 of 10)
 For example, lines 0, 100, 200, and 300 are first lines for pages 0,
1, 2, and 3 respectively so each has displacement of zero.
 Likewise, if the operating system needs to access byte 214, it can
first go to page 2 and then go to byte 14 (the fifteenth line). The
first byte of each page has a displacement of zero, and the last
byte, has a displacement of 99.
 Divide the line number by the page size, keeping the remainder
as an integer.
 Paged Memory
Allocation (8 of 10)

(figure 3.2)
This job is 350 bytes long
and is divided into four
pages of 100 bytes each
that are loaded into four
page frames in memory.
Notice the internal
fragmentation at the end of
Page 3.
© Cengage Learning 2018
 Paged Memory Allocation (9 of 10)

 Instruction: determining exact location in memory

 Refer to the book to check the steps
 7th Edition: page 63-66
 8th Edition: page 62-67
 Paged Memory Allocation (10 of 10)
 Advantages
– Efficient memory use: job allocation in non-
contiguous memory
 Disadvantages
– Increased overhead: address resolution
– Internal fragmentation: last page
 Page size: crucial
– Too small: very long PMTs
– Too large: excessive internal fragmentation
– The best size depends on the nature of the jobs being
processed and on the constraints placed on the system.
 Demand Paging Memory Allocation (1 of 9)
 Demand paging is a system which a page is loaded
into the memory only when it is needed during
program execution. Pages that are never accessed
are never loaded into the memory.

 A demand paging system combines the features of

paging with swapping. To facilitates swapping, the
entire virtual address space is stored contiguously
on the disk.
 Demand Paging Memory Allocation (2 of 9)
 Whenever a process/job is to be executed, an area
on the disk is allocated to it on which pages are
copied, called swap space of the process. During
the execution of a process/job, whenever a page is
required, it is loaded into the main memory from
the swap space. Similarly, when a process is to be
removed from main memory, it is written back into
the swap space if it has been modified.
 Demand Paging Memory Allocation (3 of 9)
 Loads only a part of the program into memory
– Removes restriction: entire program in memory
– Requires high-speed page access
 Makes use of multiprogramming techniques by
reducing the amount of physical memory required for a
process.
– Modules: written sequentially
• All pages: not needed simultaneously
– Examples
• Error-handling modules instructions
• Mutually exclusive modules
• Certain program options: mutually exclusive or not always
accessible
 Demand Paging Memory Allocation (4 of 9)
 Virtual memory
– Appearance of vast amounts of physical memory
 Less main memory required than paged memory
allocation scheme
 Requires high-speed direct access storage device
(DASDs): e.g., hard drives or flash memory
 Swapping: how and when pages passed between
memory and secondary storage
– Depends on predefined policies
 Demand Paging Memory Allocation (5 of 9)
(figure 3.5)
Demand paging requires that
the Page Map Table for each
job keep track of each page
as it is loaded or removed
from main memory. Each
PMT tracks the status of the
page, whether it has been
modified, whether it has
been recently referenced,
and the page frame number
for each page currently in
main memory. (Note: For
this illustration, the Page
Map Tables have been
simplified. See Table 3.3 for
more detail on 30th slide.)
© Cengage Learning 2018
 Demand Paging Memory Allocation (6 of 9)
 Algorithm implementation: tables, e.g., Job
Table, Page Map Table, and Memory Map
Table
 Page Map Table
– First field: page requested already in memory?
– Second field: page contents modified?
– Third field: page referenced recently?
– Fourth field: frame number
 Demand Paging Memory Allocation (7 of 9)
 Swapping process
– Resident memory page: exchanged with
secondary storage page
• Resident page: copied to disk (if modified)
• New page: written into available page frame
– Requires close interaction between:
• Hardware components
• Software algorithms
• Policy schemes
 Demand Paging Memory Allocation (8 of 9)
 Hardware components:
– Generate the address: required page
– Find the page number
– Determine page status: already in memory
 Page fault: failure to find page in memory
 Page fault handler: part of operating system:
– Determines if empty page frames in memory
• Yes: requested page copied from secondary storage
• No: swapping (dependent on the predefined policy)
 Demand Paging Memory Allocation (9 of 9)
 Tables updated when page swap occurs
– PMT for both jobs (page swapped out; page swapped
in) and the MMT
 Thrashing:
– Excessive page swapping: inefficient operation
– Main memory pages: removed frequently; called back
soon thereafter
– Occurs across jobs
• Large number of jobs: limited free pages
– Occurs within a job
• Loops crossing page boundaries
 Page Replacement Policies and Concepts
 Page replacement policy
– Crucial to system efficiency
 Two well-known algorithms
– First-in first-out (FIFO) policy
• Best page to remove: page in memory longest
– Least Recently Used (LRU) policy
• Best page to remove: page least recently accessed
– Most Recently Used (MRU) policy
• Find out about this one.
 First-In-First-Out (1 of 3)
 Removes page: longest in memory
 Failure rate
– Ratio of page interrupts to page requests
 More memory: does not guarantee better
performance
 First-In-First-Out (2 of 3)

(figure 3.7)
First, Pages A and B are loaded into the two available page frames. When Page C is
needed, the first page frame is emptied so C can be placed there. Then Page B is
swapped out so Page A can be loaded there.
© Cengage Learning 2018
 First-In-First-Out (3 of 3)

(figure 3.8)
Using a FIFO policy, this page trace analysis shows how each page requested is swapped into
the two available page frames. When the program is ready to be processed, all four pages are
in secondary storage. When the program calls a page that isn’t already in memory, a page
interrupt is issued, as shown by the gray boxes and asterisks. This program resulted in nine
page interrupts.
© Cengage Learning 2018
 Least Recently Used (1 of 2)
 Removes page: least recent activity
– Theory of locality
 Efficiency
– Additional main memory: causes either decrease
in or same number of interrupts
 Least Recently Used (2 of 2)

figure 3.9)
Memory management using an LRU page removal policy for the program shown in
Figure 3.8. Throughout the program, 11 page requests are issued, but they cause only 8
page interrupts.
© Cengage Learning 2018
 The mechanics of Paging (1 of 4)
 Page swapping
– Memory manage requires specific information:
Page Map Table

(table 3.3)
Page Map Table for Job 1 shown in Figure 3.5. For the bit indicators,
1 = Yes and 0 = No.
© Cengage Learning 2018
 The mechanics of Paging (2 of 4)
 Page Map Table: bit meaning
– Status bit: page currently in memory
– Referenced bit: page referenced recently
• Determines page to swap: LRU algorithm
– Modified bit: page contents altered
• Determines if page must be rewritten to secondary
storage when swapped out
 Bits checked when swapping
– FIFO: modified and status bits
– LRU: all bits (status, modified, and reference bits)
 The mechanics of Paging (3 of 4)
(table 3.4)
The meaning of the zero and one bits in the Page Map Table.
© Cengage Learning 2018
Status Bit Modified Bit

Value Meaning Value Meaning

0 not in memory 0 not modified
1 resides in memory 1 was modified
Referenced Bit

Value Meaning
0 not called
1 was called
 The mechanics of Paging (4 of 4)
Modified? Referenced? What it Means
Case 1 0 0 Not modified AND not referenced
Case 2 0 1 Not modified BUT was referenced
Case 3 1 0 Was modified BUT not referenced
(Impossible?)
Case 4 1 1 Was modified AND was
referenced

(table 3.5)
Four possible combinations of modified and referenced bits and the
meaning of each.
Yes = 1, No = 0.
© Cengage Learning 2018
 The Working Set
 Set of pages residing in memory accessed directly without
incurring a page fault
– Demand paging schemes: improves performance
 The set of pages that is currently being used.
 If the entire working set is in memory then no page
faults will occur
 Requires “locality of reference” concept
– Structured programs: only small fraction of pages needed during
any execution phase
 System needs definitive values:
– Number of pages comprising working set
– Maximum number of pages allowed for a working set
 Segmented Memory Allocation (1 of 6)
 Each job divided into several segments: different
sizes
– One segment for each module: related functions
 Reduces page faults
 Main memory: allocated dynamically
 Program’s structural modules: determine segments
– Each segment numbered when program
compiled/assembled
– Segment Map Table (SMT) generated
 Segmented Memory Allocation (2 of 6)

(figure 3.14)
Segmented memory allocation. Job 1 includes a main program and two
subroutines. It is a single job that is structurally divided into three segments of
different sizes.
© Cengage Learning 2018
 Segmented Memory Allocation (3 of 6)

(figure 3.15)
The Segment
Map Table
tracks each
segment for this
job. Notice that
Subroutine B
has not yet been
loaded into
memory.
© Cengage
Learning 2018
 Segmented Memory Allocation (4 of 6)

(figure 3.16)
During
execution, the
main program
calls Subroutine
A, which
triggers the
SMT to look up
its location in
memory.
© Cengage
Learning 2018
 Segmented Memory Allocation (5 of 6)
 Memory Manager: tracks segments in memory
– Job Table: one for whole system
• Every job in process
– Segment Map Table: one for each job
• Details about each segment
– Memory Map Table: one for whole system
• Main memory allocation
 Instructions within each segment: ordered
sequentially
 Segments: not necessarily stored contiguously
 Segmented Memory Allocation (6 of 6)
 Two-dimensional addressing scheme
– Segment number and displacement
 Disadvantage
– External fragmentation
 Major difference between paging and
segmentation
– Pages: physical units; invisible to the program
– Segments: logical units; visible to the program;
variable sizes
 Segmented/Demand Paged Memory Allocation (1 of 4)

 Subdivides segments: equal-sized pages

– Smaller than most segments
– More easily manipulated than whole segments
– Segmentation’s logical benefits
– Paging’s physical benefits
 Segmentation problems removed
– Compaction, external fragmentation, secondary storage
handling
 Three-dimensional addressing scheme
– Segment number, page number (within segment), and
displacement (within page)
 Segmented/Demand Paged Memory Allocation (2 of 4)

 Scheme requires four tables

– Job Table: one for the whole system
• Every job in process
– Segment Map Table: one for each job
• Details about each segment
– Page Map Table: one for each segment
• Details about every page
– Memory Map Table: one for the whole system
• Monitors main memory allocation: page frames
Segmented/Demand Paged Memory Allocation (3 of 4)

(figure 3.17)
How the Job
Table, Segment
Map Table,
Page Map
Table, and main
memory
interact in a
segment/paging
scheme.
© Cengage
Learning 2018
 Segmented/Demand Paged Memory Allocation (4 of 4)

 Disadvantages
– Overhead: managing the tables
– Time required: referencing tables
 Associative memory
– Several registers allocated to each job
• Segment and page numbers: associated with main memory
 Associative memory
– Primary advantage (large associative memory)
• Increased speed
– Disadvantage
• High cost of complex hardware
 Virtual Memory (1 of 3)
 Virtual memory is a technique that allows execution of a program
that is bigger than the physical memory of the computer system.

 In this technique, the operating system loads only those parts of

program in memory that are currently needed for the execution of
the process. The rest part is kept in the disk and is loaded into
memory only when needed.

 Virtual memory gives the illusion that the system has a much
larger memory than is actually available.

 Virtual memory frees programs from the constraints of physical

memory limitation.
 Virtual Memory (2 of 3)
 Made possible by swapping pages in/out of
memory
 Program execution: only a portion of the
program in memory at any given moment
 Requires cooperation between:
– Memory Manager: tracks each page or segment
– Processor hardware: issues the interrupt and
resolves the virtual address
 Virtual Memory (3 of 4)

(table 3.6)
Comparison of the advantages and disadvantages of virtual memory
with paging and segmentation.
© Cengage Learning 2018
 Virtual Memory (4 of 4)
 Advantages
– Job size: not restricted to size of main memory
– More efficient memory use
– Unlimited amount of multiprogramming possible
– Code and data sharing allowed
– Dynamic linking of program segments facilitated
 Disadvantages
– Higher processor hardware costs
– More overhead: handling paging interrupts
– Increased software complexity: prevent thrashing
 Cache Memory (1 of 2)
 Small, high-speed intermediate memory unit
 Computer system’s performance increased
– Faster processor access compared to main memory
– Stores frequently used data and instructions
 Cache levels
– L2: connected to CPU; contains copy of bus data
– L1: pair built into CPU; stores instructions and data
 Data/instructions: move between main memory and
cache
– Methods similar to paging algorithms
 Cache Memory (2 of 2)

(figure 3.19)
The traditional path used by early computers was direct: from secondary
storage to main memory to the CPU registers, but speed was slowed by the
slow connections (top). With cache memory directly accessible from the C P
U registers (bottom), a much faster response is possible. © Cengage
Learning 2018
 The big picture. This is a comparison of the memory allocation
schemes discussed in Chapters 2 and 3. © Cengage Learning 2018

Scheme Problem Problem Created Key Software Changes

Solved
Single-User Job size limited to physical
contiguous memory size; CPU often idle
Fixed Idle CPU Internal fragmentation; job Add Processor
partitions time size limited to partition size Scheduler; add
protection handler
Dynamic Internal External fragmentation Algorithms to manage
partitions fragmentatio partitions
n
Relocatable External Compaction overhead; Job Algorithms for
dynamic fragmentatio size limited to physical compaction
partitions n memory size
Paged Need for Memory needed for tables; Algorithms to manage
compaction Job size limited to physical tables
memory size; internal
fragmentation returns
 The big picture. This is a comparison of the memory allocation
schemes discussed in Chapters 2 and 3. © Cengage Learning 2018

Scheme Problem Problem Created Key Software

Solved Changes
Demand Job size limited Large number of tables; Algorithm to replace
paged to memory size; possibility of thrashing; pages; algorithm to
inefficient overhead required by page search for pages in
memory use interrupts; paging hardware secondary storage
added

Segmented Internal Difficulty managing Dynamic linking

fragmentation variable-length segments package; two-
in secondary storage; dimensional
external fragmentation addressing scheme

Segmented/ Segments not Table handling overhead; Three-dimensional

demand paged loaded on memory needed for page addressing scheme
demand and segment tables
End