Assignment

On
Computer Architecture and
Organization
SUBMITTED TO-
SUBMITTED BY-
DR. SUMIT MOUDGIL SAMBHAV JAIN
ASSISTANT PROFESSOR (181302070)
(CSE DEPARTMENT) B.TECH. - CSE(IBM)
4TH SEMESTER
Questions

 Q 1) Explain with examples Floating point numbers and operations.

 Q 2) Write short note on Semiconductor RAMs and  ROMs
 Q 3) Explain the basic operational concepts in computer organization ?
 Q 4) What are  Basic I/O operations and also explain Stacks and queues.
 Q 5) Explain Multiple bus organization and  Hardwired control 
 Q 6) Explain Design of fast adders
 Q 7) Explain  Addressing modes and Assembly language?
 1. Floating Point Numbers

Usually, a real number in binary will be represented in the Depending on base and the number of bits used to encode
following format, various components, the IEEE 754 standard defines five
basic formats. Among the five formats, the binary32 and the
binary64 formats are single precision and double precision
ImIm-1…I2I1I0.F1F2…FnFn-1 formats respectively in which the base is 2.

Where Im and Fn will be either 0 or 1 of integer and fraction parts Precision Base Sign Exponent Significa
respectively. nd
Single 2 1 8 23+1
A finite number can also represented by four integers components, precision
a sign (s), a base (b), a significand (m), and an exponent (e). Then
the numerical value of the number is evaluated as Double 2 1 11 52+1
precision
(-1)s x m x be ________ Where m < |b|
 1. Single Precision Format

As mentioned in Table, the single precision format has 23 bits for significand (1 represents implied bit, details
below), 8 bits for exponent and 1 bit for sign.
For example, the rational number 9÷2 can be converted to single precision float format as following,
9(10) ÷ 2(10) = 4.5(10) = 100.1(2)

The result said to be normalized, if it is represented with leading 1 bit, i.e. 1.001(2) x 22. (Similarly when the
number 0.000000001101(2) x 23 is normalized, it appears as 1.101(2) x 2-6). Omitting this implied 1 on left extreme
gives us the mantissa of float number. A normalized number provides more accuracy than corresponding de-
normalized number. The implied most significant bit can be used to represent even more accurate significand (23
+ 1 = 24 bits) which is called subnormal representation. The floating point numbers are to be represented in
normalized form.
The subnormal numbers fall into the category of de-normalized numbers. The subnormal representation slightly
reduces the exponent range and can’t be normalized
since that would result in an exponent which doesn’t fit in the field. Subnormal numbers are less accurate,
i.e. they have less room for nonzero bits in the fraction field, than normalized numbers. Indeed, the accuracy
drops as the size of the subnormal number decreases. However, the subnormal representation is useful in filing
gaps of floating point scale near zero.
In other words, the above result can be written as (-1)0 x 1.001(2) x 22 which yields the integer components as s
= 0, b = 2, significand (m) = 1.001, mantissa = 001 and e = 2. The corresponding single precision floating
number can be represented in binary as shown below,​
Where the exponent field is supposed to be 2, yet encoded as 129 (127+2) called biased exponent. The
exponent field is in plain binary format which also represents negative exponents with an encoding (like sign
magnitude, 1’s complement, 2’s complement, etc.). The biased exponent is used for the representation of
negative exponents. The biased exponent has advantages over other negative representations in performing
bitwise comparing of two floating point numbers for equality.​
A bias of (2n-1 – 1), where n is number of bits used in exponent, is added to the exponent (e) to get biased
exponent (E). So, the biased exponent (E) of single precision number can be obtained as​
E = e + 127​
The range of exponent in single precision format is -128 to +127. Other values are used for special symbols.​
1. Double Precision Format

As mentioned in Table, the double precision format has 52 bits for

significand (1 represents implied bit), 11 bits for exponent and 1 bit
for sign. All other definitions are same for double precision format,
except for the size of various components
1. Floating Point Operations

Addition and Subtraction: Multiplication and Division

• They Require realignment so that all the • No Requirement realignment

operands have same exponent
• The result may need to be normalized again
• The result may need to be normalized again

 Eg: 3.02×10^3 + 7×10^3 = 1.002 × 10^4
 Eg: 3×10^3 × 7×10^4 = 2.1×10^8
 Eg: 3.1×10^3 – 3×10^3 = 1×10^2
 Eg: 3×10^4 ÷ 1.5×10^2 = 2×10^2
 2. Short Note on RAM and ROM

RAM - Random Access Memory:    ROM - Read Only Memory: 

 As the names suggest, the RAM or random access memory is a form  A ROM is a form of semiconductor memory technology used
of semiconductor memory technology that is used for reading and where the data is written once and then not changed. In view of
writing data in any order - in other words as it is required by the this it is used where data needs to be stored permanently, even
processor. when the power is removed - many memory technologies lose the
 It is used for such applications as the computer or processor memory data once the power is removed.
where variables and other stored and are required on a random basis.  As a result, this type of semiconductor memory technology is
Data is stored and read many times to and from this type of memory widely used for storing programs and data that must survive when
 Random access memory is used in huge quantities in computer a computer or processor is powered down. For example the BIOS
applications as current day computing and processing technology of a computer will be stored in ROM. As the name implies, data
requires large amounts of memory to enable them to handle the cannot be easily written to ROM. Depending on the technology
memory hungry applications used today. Many types of RAM used in the ROM, writing the data into the ROM initially may
including SDRAM with its DDR3, DDR4, and soon DDR5 variants require special hardware. Although it is often possible to change
are used in huge quantities. the data, this gain requires special hardware to erase the data ready
for new data to be written in.
 3. Basic Operational Concepts in Computer
Organization

A Computer has following five functional independent units

1. Input Unit
2. Memory Unit
3. Arithmetic & Logic Unit
4. Control Unit
5. Output Unit.
3. Input Unit

Computers take coded information via input unit. The most

famous input device is keyboard. Whenever we press any
key it is automatically being translated to corresponding
binary code & transmitted over a cable to memory
or processor.
 4. Memory Unit

It stores programs as well as data and there are two types- 

1. Primary Memory
2. Secondary Memory

Primary Memory is quite fast which works at electronic speed. Programs should be stored in memory before
getting executed. Random Access Memory are those memory in which location can be accessed in a
shorter period of time after specifying the address. 
Primary memory is essential but expensive so we went for secondary memory which is quite cheaper. It is
used when large amount of data & programs are needed to store, particularly the information that
we don't access very frequently. Ex- Magnetic Disks, Tapes
 3. ALU, CU, Memory Unit

Arithmetic & Logic Unit Control Unit Output Unit

 All the arithmetic & Logical
 It tells the computer's memory,   It displays the processed result
operations are performed by ALU and arithmetic and logic unit and input to outside world.
this operation are initiated once the and output devices how to respond
operands are brought into the to the instructions that have been
processor. sent to the processor
4. Basic Input-Output Operations

 To perform any useful task, the computer must interact with outside world
 And this is done with the help of input/output operations.
 It provides the necessary data communication link between the  processor and the
enviroment
 Information is accepted through input devices, then processed by the processor and
output is shown to the users with the help of output devices 
 4. Types of Input/Output Operations

There are three principal I/O techniques: 

 Programmed I/O:
In which I/O occurs under the direct and continuous control of the program requesting the I/O operation

 Interrupt-driven I/O:
In which a program issues an I/O commandant then continues to execute, until it is interrupted by the I/O
hardware to signal the end of the I/O operation

 Direct Memory Access(DMA):

In which a specialized I/O processor takes over control of an I/O operation to move a large block of data.
 4. Stack and Queue

Stack Queue
 A stack is a container of objects that are inserted and removed  A queue is a container of objects (a linear collection) that are
according to the last-in first-out (LIFO) principle. In the pushdown inserted and removed according to the first-in first-out (FIFO)
stacks only two operations are allowed: push the item into the stack, principle. An excellent example of a queue is a line of students in
and pop the item out of the stack. A stack is a limited access data the food court of the UC. New additions to a line made to the back
structure - elements can be added and removed from the stack only at of the queue, while removal (or serving) happens in the front. In
the top. push adds an item to the top of the stack, pop removes the item the queue only two operations are allowed enqueue and dequeue.
from the top. A helpful analogy is to think of a stack of books; you can Enqueue means to insert an item into the back of the queue,
remove only the top book, also you can add a new book on the top. dequeue means removing the front item. The picture demonstrates
the FIFO access
 Applications:
The simplest application of a stack is to reverse a word. You push a given  Applications:
word to stack - letter by letter - and then pop letters from the stack.
Serving requests on a single shared resource, like a printer, CPU task
scheduling etc.
 5. Multiple Bus Organization

Multiple bus organization is primarily used in industrial systems. In this structure, various devices that
have different transfer rates can be connected. At the same time, maximum throughput is maintained.

Some benefits of multiple bus architecture are:

 Allows more number of devices to be connected to the computer
 Faster execution because many devices can work simultaneously resulting in performance
enhancement
 Compatible with both old and new devices alike
 Multi-core processor that transfers more information and minimizes the wait time
 5. Hardwired Control 

 The control hardware can be viewed as a state machine that changes from one state to another in every
clock cycle, depending on the contents of the instruction register, the condition codes and the external
inputs. The outputs of the state machine are the control signals. The sequence of the operation carried out
by this machine is determined by the wiring of the logic elements and hence named as “hardwired”.
 Fixed logic circuits that correspond directly to the Boolean expressions are used to generate the control
signals.
 Hardwired control is faster than micro-programmed control.
 A controller that uses this approach can operate at high speed.
 RISC architecture is based on hardwired control unit
6. Fast Adder

 A carry-look ahead adder (CLA) or fast adder is a type of adder used in digital logic.
 A carry-look ahead adder improves speed by reducing the amount of time required to determine carry bits.
 It can be contrasted with the simpler, but usually slower, ripple-carry adder (RCA), for which the carry bit is calculated
alongside the sum bit, and each stage must wait until the previous carry bit has been calculated to begin calculating its
own sum bit and carry bit.
 The carry-lookahead adder calculates one or more carry bits before the sum, which reduces the wait time to calculate the
result of the larger-value bits of the adder
 A carry-Lookahead adder is a fast parallel adder as it reduces the propagation delay by more complex hardware, hence it
is costlier.
 This method makes use of logic gates so as to look at the lower order bits of the augend and addend to see whether a
higher order carry is to be generated or not.
6. Digital Circuit and Truth Table of Fast Adder
6. Explanation of Diagrams
6. Explanation Continues
 7. Assembly Language 

 In computer programming, assembly language (or assembler language), often abbreviated ASM, is

any low-level programming language in which there is a very strong correspondence between the
instructions in the language and the architecture's machine code instructions.

 Because assembly depends on the machine code instructions, every assembler has its own assembly
language which is designed for exactly one specific computer architecture. Assembly language may also be
called symbolic machine code.

 Assembly code is converted into executable machine code by a utility program referred to as an assembler.
The conversion process is referred to as assembly, as in assembling the source code.
 7. Addressing Modes and Types

Addressing modes refers to the way in which the operand of an instruction is specified. The
addressing mode specifies a rule for interpreting or modifying the address field of the
instruction before the operand is actually executed

Types of Addressing Modes:

There are many types of Addressing Modes.
Some of Them are:

1. Immediate
2. Register
3. Direct
4. Indirect
5. Register Indirect
6. Stack
 7. Immediate and Register Addressing Mode

Register mode:  Immediate addressing mode:

In register addressing the operand is placed in one of In this mode data is present in address field
8 bit or 16 bit general purpose registers. The data is in of instruction .Designed like one address
the register that is specified by the instruction. instruction format.
Here one register reference is required to access the Note:Limitation in the immediate mode is
data. that the range of constants are restricted by
size of address field
 7. Direct and Indirect Addressing Modes

Direct Mode Indirect addressing Mode

The operand’s offset is given in the instruction as an 8 In this mode address field of instruction
bit or 16 bit displacement element. In this contains the address of effective address.
addressing mode the 16 bit effective address of
the data is the part of the instruction. Here two references are required.
Here only one memory reference operation is 1st reference to get effective address.
required to access the data. 2nd reference to access the data.
 7. Registered Indirect and Stack Addressing Mode

Registered Indirect Mode Stack Mode:

In this addressing the operand’s offset is placed in
any one of the registers BX,BP,SI,DI as specified
in the instruction. The effective address of the
data is in the base register or an index register that
is specified by the instruction.

Here two register reference is required to access

the data.