This document discusses loosely coupled distributed memory architectures. It describes how each processor has its own private local memory, and processors communicate through message passing. Communication memory is used as an intermediate buffer for interprocessor communication. The performance is limited by communication between processors. Clusters of tightly coupled processors with shared memory are connected through an interconnection network to form a loosely coupled distributed memory system.
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Loosely Coupled Architecture
This document discusses loosely coupled distributed memory architectures. It describes how each processor has its own private local memory, and processors communicate through message passing. Communication memory is used as an intermediate buffer for interprocessor communication. The performance is limited by communication between processors. Clusters of tightly coupled processors with shared memory are connected through an interconnection network to form a loosely coupled distributed memory system.
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Unit 6:Distributed Memory Architecture.
Point 1–Loosely Coupled Architecture.
Dr. Mrs Mamata Sachin Kalas
Email id:[email protected] Introduction • A multiprocessor system is an interconnection of two or more CPUs with memory and input-output equipment. • The term “processor” in multiprocessor can mean either a central processing unit (CPU) or an input-output processor (IOP). • Multiprocessors are classified as multiple instruction stream, multiple data stream (MIMD) systems.
Unit 6:Distributed Memory Architecture-
08/28/22 2 Point 1.Loosely coupled architecture Multiprocessor • Attributes of multiprocessor: 1. Single computer with multiple processor. 2. Processors communicate and cooperate at different levels. • Communication occurs by: sending messages or sharing common memory. • Multiprocessor and multicomputer proposed same basic goal- concurrent operations in the system.
Unit 6:Distributed Memory Architecture-
08/28/22 3 Point 1.Loosely coupled architecture Introduction(cont.) • The similarity and distinction between multiprocessor and multicomputer are – Similarity • Both support concurrent operations – Distinction • The network consists of several autonomous computers that may or may not communicate with each other. • A multiprocessor system is controlled by one operating system that provides interaction between processors and all the components of the system cooperate in the solution of a problem.
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08/28/22 4 Point 1.Loosely coupled architecture Introduction(cont.) • Multiprocessing improves the reliability of the system. • The benefit derived from a multiprocessor organization is an improved system performance. – Multiple independent jobs can be made to operate in parallel. – A single job can be partitioned into multiple parallel tasks. • Multiprocessing can improve performance by decomposing a program into parallel executable tasks. – The user can explicitly declare that certain tasks of the program be executed in parallel. • This must be done prior to loading the program by specifying the parallel executable segments. – The other is to provide a compiler with multiprocessor software that can automatically detect parallelism in a user’s program.
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08/28/22 5 Point 1.Loosely coupled architecture Introduction(cont.) • Multiprocessor are classified by the way their memory is organized. – A multiprocessor system with common shared memory is classified as a shared-memory or tightly coupled multiprocessor. • Tolerate a higher degree of interaction between tasks. – Each processor element with its own private local memory is classified as a distributed-memory or loosely coupled system. • Are most efficient when the interaction between tasks is minimal
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08/28/22 6 Point 1.Loosely coupled architecture Tightly coupled Multiprocessor
A multiprocessor is a tightly coupled computer
system having two or more processing units (Multiple Processors) each sharing main memory and peripherals, in order to simultaneously process programs
Tightly coupled Multiprocessor is also known as
shared memory system
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08/28/22 7 4/17/2012 Point 1.Loosely coupled architecture Loosely Coupled Multiprocessor • Each processor has a set of input-output devices and a large local memory. • Computer module: processor, local memory, i/o interface. • Processes in different CM communicates through MTS. • Degree of coupling is loose which is determined by communication topology of MTS. • Efficient when interactions are minimum.
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08/28/22 8 Point 1.Loosely coupled architecture Computer Module Local memory I/O (LM) Processor (P)
Channel and Arbiter Switch(CAS)
Figure: A computer module
• Consist of processor, local memory, local input output devices and
interface to other computer modules.
• Interface contains a channel and Memory Unit 6:Distributed arbiter switch(CAS). Architecture- 08/28/22 9 • Computer modules Point are1.Loosely connected through MTS. coupled architecture Computer Module connection
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08/28/22 10 Point 1.Loosely coupled architecture Role of CAS • In case of collision while accessing physical segment of the MTS, CAS choose one of the request according to service discipline. • Delays other requests until selected request is serviced completely. • The channel within the CAS may have high speed communication memory. • Communication memory is used for buffering block transfers of message. • Communication memory is accessible to all the processors.
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08/28/22 11 Point 1.Loosely coupled architecture MTS • It determines the performance of multiprocessor system. • MTS can be implemented as 1. Simple time shared bus 2. Shared memory system • In case of time shared bus performance is limited by the message arrival rate on the bus, message length and bus capacity. • Shared memory system can be implemented with set of memory modules and processor memory interconnection network /multiported main memory. Performance is limited by memory conflict problem. Unit 6:Distributed Memory Architecture- 08/28/22 12 Point 1.Loosely coupled architecture Working of communication memory • Communication memory types: 1. Centralized connected to shared bus 2. As a part of shared memory • Each task has it’s input port in local memory. • Task in same processor communicate through local input port. • Tasks allocated to different processors communicate through communication port in communication memory. • One communication port is associated with each processor as input port.
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08/28/22 13 Point 1.Loosely coupled architecture Working of Communication memory
Unit 6:Distributed Memory Architecture-
08/28/22 14 Point 1.Loosely coupled architecture Example : Communication memory • A process allocated to processor P1 puts a message into i/p port of another task in P1 marked by arrow ‘a’ in figure. • Message transfer between processors is shown by arrow labeled ‘b’. • Interprocessor communication is two-step: 1. the message first transferred to i/p port in comm. memory(b1). 2. From comm. Memory it is transferred to i/p port of the destination process in local memory(b2).
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08/28/22 15 Point 1.Loosely coupled architecture Example: cm* Architecture
08/28/22 Unit 6:Distributed Memory Architecture- 16
Point 1.Loosely coupled architecture Network of clusters
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08/28/22 17 Point 1.Loosely coupled architecture Network of clusters • Cluster –Lowest level consists of computer modules,K map and map bus • Enhance the cooperative ability of the processors in cluster to operate on shared data with low communication overhead. • Provides hardware facilities to execute group of tightly coupled cooperating processes. • Kmap –handles any nonlocal reference to memory. • Clusters communication handled by inter cluster buses connected between Kmaps.
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08/28/22 18 Point 1.Loosely coupled architecture Address mapping in Slocal
Unit 6:Distributed Memory Architecture-
08/28/22 19 Point 1.Loosely coupled architecture Kmap
Unit 6:Distributed Memory Architecture-
08/28/22 20 Point 1.Loosely coupled architecture Components of K map • Kbus-Bus controller arbitrates the requests to mapbus. • Linc –managescommunication between Kmap and other Kmap. • Pmap-Mapping processor responds to requests from Kbus and Linc. • Performs most of the request processing. • Three sets of queues provide interfaces between Kbus,Linc and Pmap. • Kmap is multiprogrammed to handle 8 concurrent requests(partitions) called context. Unit 6:Distributed Memory Architecture- 08/28/22 21 Point 1.Loosely coupled architecture Intracluster communication
Unit 6:Distributed Memory Architecture-
08/28/22 22 Point 1.Loosely coupled architecture Steps in Intracluster Communication • Whenever processor of computer module makes nonlocal reference-Master Cm. • In response to service requests,Kbus allocates Pmap context and fetches virtual address of memory reference via mapbus. • Kbus activates new context containing virtual address. • Pmap context performs virtual to physical address translation. • Context is initiated invoking Kbus operation by loading request in to Kbus outqueue. • Pmap makes context switch to another runnable context. • Kmap services out requests by sending physical address via mapbus to destination Cm. • Destination Cm completes memory access, signals return request to Kmap. Unit 6:Distributed Memory Architecture- 08/28/22 23 Point 1.Loosely coupled architecture Intercluster memory access • Intercluster memory access is done by passing messages via intercluster bus. • Messages are of two types: 1. Forward message 2. Return message • Forward msg invokes new context at dest Kmap. It also contains source Kmap number and originating Pmap context number. • Return msg contains the context number of the context to be reactivated.
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08/28/22 24 Point 1.Loosely coupled architecture Intercluster memory access