Basic Microprocessors System

Central Processing Unit

Arithmetic-
Control
Logic
Unit
ProcessingUnit
Input Data into Output
Devices Information
Primary Storage Devices
Unit
Keyboard, Monitor
Mouse Printer
etc

Disks, Tapes, Optical Disks

Secondary Storage Devices 1

 UNIT

1
THE 8086 MICROPROCESSOR

2
 UNIT 1 Syllabus
• Introduction to 8086
• Microprocessor architecture
• Addressing modes
• Instruction set
• Assembler directives
• Assembly language programming
• Modular Programming
1.Linking and Relocation
2.Stacks , Procedures , Macros
• Interrupts and interrupt service routines
• Byte & String Manipulation. 3
 8086 Microprocessor-introduction
 INTEL launched 8086 in 1978
 8086 is a 16-bit microprocessor with
• 16-bit Data Bus {D0-D15}
• 20-bit Address Bus {A0-A19} [can access upto
2^20= 1 MB memory locations] .
 It has multiplexed address and data bus
AD0-AD15 and A16–A19.
 It can support upto 64K I/O ports
4
 8086 Microprocessor
 It provides 14, 16-bit registers.
 8086 requires one phase clock with a 33%
duty cycle to provide optimized internal
timing.
– Range of clock:
• 5 MHz for 8086
• 8Mhz for 8086-2
• 10Mhz for 8086-1
5
 8086 Internal Architecture
 8086 employs parallel processing
 8086 CPU has two parts which operate at the
same time
• Bus Interface Unit 8086 CPU
• Execution Unit
 CPU functions Bus Interface
Unit (BIU)
1. Fetch

2. Decode Execution Unit

3. Execute (EU)

6
 Bus Interface Unit
 Sends out addresses for memory locations
 Fetches Instructions from memory
 Reads/Writes data to memory
 Sends out addresses for I/O ports
 Reads/Writes data to Input/Output ports

7
 Execution Unit
 Tells BIU (addresses) where to fetch
instructions or data
 Decodes & Executes instructions

 Dividing the work between BIU & EU

speeds up processing

8
Architecture Diagram of 8086

9
 Memory
∑ Interface

EXTRA SEGMENT (ES) BIU

CODE SEGMENT (CS)
6 5 4 3 2 1
STACK SEGMENT (SS)
DATA SEGMENT (DS) Instruction Queue
INSTRUCTION POINTER (IP)

Instruction
Decoder
AH AL
BH BL
ARITHMETIC
CH CL LOGIC UNIT
DH DL CONTROL
SYSTEM
STACK POINTER (SP)
BASE POINTER (BP)
OPERANDS
SOURCE INDEX (SI)
DESTINATION INDEX (DI)
FLAGS
EU 10
 Execution Unit
 Main components are
• Instruction Decoder
• Control System
• Arithmetic Logic Unit
• General Purpose Registers
• Flag Register
• Pointer & Index registers

11
 Instruction Decoder
 Translates instructions fetched from memory
into a series of actions which EU carries out

Control System
 Generates timing and control signals to
perform the internal operations of the
microprocessor

Arithmetic Logic Unit

 EU has a 16-bit ALU which can ADD,
SUBTRACT, AND, OR, increment, decrement,
complement or shift binary numbers
12
 General Purpose Registers
 EU has 8 general AH AL
purpose registers BH BL
 Can be individually
used for storing 8-bit CH CL
data DH DL
 AL register is also
called Accumulator AH AL AX
 Two registers can also
BH BL BX
be combined to form
16-bit registers CH CL CX
 The valid register pairs
are – AX, BX, CX, DX DH DL DX
13
 Flag Register
 8086 has a 16-bit flag register
 Contains 9 active flags
 There are two types of flags in 8086
• Conditional flags – six flags, set or reset
by EU on the basis of results of some
arithmetic operations
• Control flags – three flags, used to control
certain operations of the processor

14
 Flag Register
U U U U OF DF IF TF SF ZF U AF U PF U CF

1. CF CARRY FLAG
Conditional Flags
2. PF PARITY FLAG
(Compatible with 8085,
3. AF AUXILIARY CARRY
except OF)
4. ZF ZERO FLAG
5. SF SIGN FLAG

6. OF OVERFLOW FLAG

7. TF TRAP FLAG Control Flags 15

8. IF INTERRUPT FLAG
 Flag Register
Auxiliary Carry Flag
Carry Flag
This is set, if there is a carry from the
lowest nibble, i.e, bit three during This flag is set, when there is
addition, or borrow for the lowest a carry out of MSB in case of
nibble, i.e, bit three, during addition or a borrow in case
subtraction. of subtraction.

Sign Flag Zero Flag Parity Flag

This flag is set, when the This flag is set, if the result of This flag is set to 1, if the lower
result of any computation the computation or comparison byte of the result contains even
is negative performed by an instruction is number of 1’s ; for odd number
zero of 1’s set to zero.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

OF DF IF TF SF ZF AF PF CF

Trap Flag
Over flow Flag If this flag is set, the processor
This flag is set, if an overflow occurs, i.e, if the result of a signed
enters the single step execution
operation is large enough to accommodate in a destination
mode by generating internal
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit interrupts after the execution of
sign operations, then the overflow will be set. each instruction

Direction Flag Interrupt Flag

This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest Causes the 8086 to recognize
address to the highest address, i.e., auto incrementing mode. external mask interrupts; clearing IF
Otherwise, the string is processed from the highest address disables these interrupts.
towards the lowest address, i.e., auto decrementing mode. 16
 Registers, Flag

8086 registers
categorized 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

into 4 groups OF DF IF TF SF ZF AF PF CF

Sl.No. Type Register width Name of register

1 General purpose 16 bit AX, BX, CX, DX
register
8 bit AL, AH, BL, BH, CL, CH, DL, DH

2 Pointer register 16 bit SP, BP

3 Index register 16 bit SI, DI

4 Instruction Pointer 16 bit IP

5 Segment register 16 bit CS, DS, SS, ES

6 Flag (PSW) 16 bit Flag register

17
 Registers and Special Functions

Register Name of the Register Special Function

16-bit Accumulator Stores the 16-bit results of arithmetic and logic

AX operations

8-bit Accumulator Stores the 8-bit results of arithmetic and logic

AL operations
Base register Used to hold base value in base addressing mode
BX to access memory data

Count Register Used to hold the count value in SHIFT, ROTATE

CX and LOOP instructions

Data Register Used to hold data for multiplication and division

DX operations

Stack Pointer Used to hold the offset address of top stack

SP memory

Base Pointer Used to hold the base value in base addressing

BP using SS register to access data from stack
memory
Source Index Used to hold index value of source operand (data)
SI for string instructions

Data Index Used to hold the index value of destination

DI operand (data) for string operations 18
 Bus Interface Unit
 Main Components are
• Instruction Queue
• Segment Registers
• Instruction Pointer

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 Instruction Queue
 8086 employs parallel processing
 When EU is busy decoding or executing
current instruction, the buses of 8086 may
not be in use.
 At that time, BIU can use buses to fetch upto
six instruction bytes for the following
instructions
 BIU stores these pre-fetched bytes in a FIFO
register called Instruction Queue
 When EU is ready for its next instruction, it
simply reads the instruction from the queue
in BIU
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 Pipelining
 EU of 8086 does not have to wait in
between for BIU to fetch next
instruction byte from memory
 So the presence of a queue in 8086
speeds up the processing
 Fetching the next instruction while the
current instruction executes is called
pipelining

21
 Memory Segmentation
 8086 has a 20-bit address bus
 So it can address a maximum of 1MB of
memory
 8086 can work with only four 64KB segments
at a time within this 1MB range
 These four memory segments are called
• Code segment
• Stack segment
• Data segment
• Extra segment

22
 Memory
64KB Memory 1
00000H
Segment 2

3
4
4
5
Only 4 such segments can be 6
addressed at a time 7

8
1MB
9 Address
10 Range
11

12

13

14

15

16
FFFFFH
23
 Code Segment
 That part of memory from where BIU is
currently fetching instruction code bytes

Stack Segment
 A section of memory set aside to store
addresses and data while a subprogram
executes

Data & Extra Segments

 Used for storing data values to be used in the
program

24
 Memory
Code Segment 1
00000H
2

4
Data & Extra 5

Segments 6

8 1MB
9 Address
10 Range
11

12

13

14

15

Stack Segment 16
FFFFFH
25
 Segment Registers
 Hold the upper 16-bits of the starting
address for each of the segments
 The four segment registers are
• CS (Code Segment register)
• DS (Data Segment register)
• SS (Stack Segment register)
• ES (Extra Segment register)

26
 Memory
1 00000H
CS 1000 0H Code Segment
3

DS 4000 0H Data Segment

Extra Segment
ES 5000 0H
7

Starting Addresses
8
1MB
9
Address
10
Range
of Segments
11

12

13

14

15

SS F000 0H Stack Segment

FFFFFH 27
 Address of a segment is of 20-bits
 A segment register stores only upper 16-
bits
 BIU always inserts zeros for the lowest 4-
bits of the 20-bit starting address.
 E.g. if CS = 348AH, then the code
segment will start at 348A0H
 A 64-KB segment can be located
anywhere in the memory, but will start at
an address with zeros in the lowest 4-bits
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Instruction Pointer (IP) Register
 a 16-bit register
 Holds 16-bit offset, of the next instruction
byte in the code segment
 BIU uses IP and CS registers to generate
the 20-bit address of the instruction to be
fetched from memory

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 Physical Address Calculation Memory
Start of Code Segment 1 00000H
348A0H Data
Segment
IP = 4214H 3

4
Code Byte 38AB4H MOV AL, BL
Code
Segment
Extra
Segment
7
1MB
8
9
Address
10
Range
CS 348A0 H 11
IP + 4214 H 12

13
Physical Address 38AB4 H 14
15

Stack
Segment 30
FFFFFH
 Stack Segment (SS) Register
Stack Pointer (SP) Register
 Upper 16-bits of the starting address of
stack segment is stored in SS register
 It is located in BIU
 SP register holds a 16-bit offset from the
start of stack segment to the top of the
stack
 It is located in EU

31
Other Pointer & Index Registers
 Base Pointer (BP) register
 Source Index (SI) register
 Destination Index (DI) register
 Can be used for temporary storage of data
 Main use is to hold a 16-bit offset of a data
word in one of the segments

32
ADDRESSING
MODES OF
8086
33
 Various Addressing Modes
1. Immediate Addressing Mode
2. Register Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Index Addressing Mode
6. Based Addressing Mode
7. Based & Indexed Addressing Mode
8. Based & Indexed with displacement Addressing Mode
9. Strings Addressing Mode

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 1. IMMEDIATE ADDRESSING MODE
• The instruction will specify the name
of the register which holds the data
to be operated by the instruction.

• Source data is within the instruction

• Ex: MOV AX,10AB H

 AL=ABH, AH=10H

35
 2.REGISTER ADDRESSING MODE
• In immediate addressing mode, an
8-bit or 16-bit data is specified as
part of the instruction.
• It means that the register is the
source of an operand for an
instruction.
• Ex: MOV AX,BX
MOV AX,CX
MOV CL,DH

36
 3. DIRECT ADDRESSING MODE
• Memory address is supplied with in
the instruction.
• The addressing mode in which the
effective address of the memory
location is written directly in the
instruction.
• Mnemonic: MOV AH,[MEMBDS]
AH [1000H]
• But the memory address is not
index or pointer register
37
 4. REGISTER INDIRECT ADDRESSING MODE

• Memory address is supplied in an

index or pointer register
• EX:
MOV AX,[SI] ; AL [SI] ; AH [SI+1]
JMP [DI] ; IP [DI+1: DI]
INC BYTE PTR [BP] ; [BP] [BP]+1
DEC WORD PTR [BX] ;
[BX+1:BX] [BX+1:BX]-1

38
 5.Indexed Addressing Mode
• Memory address is the sum of index
register(SI or DI) plus 8 bit or 16 bit
displacement
MOV AX,[SI+02] AL [SI+2]; AH [SI+3]
JMP [DI+02] IP [DI+3:DI+2]

39
 6. Based Addressing Mode
• Memory address is the sum of the (BX or BP)
base register plus a 8 bit or 16 bit
displacement within instruction
• Ex:
MOV AX,[BP+2] AL [BP+2]; AH [BP+3]
JMP [BX+2] IP [BX+3:BX+2]

40
 7.BASED & INDEX ADDRESSING MODES

• Memory address is the sum of the index register

& base register
Ex:
MOV AX,[BX+SI] ; AL [BX+SI] ; AH [BX+SI+1]
JMP [BX+DI] ; IP [BX+DI+1 : BX+DI]
INC BYTE PTR [BP+SI] ;
DEC WORD PTR [BP+DI] ;

41
8. BASED & INDEXED WITH DISPLACEMENT
ADDRESSING MODE
• Memory address is the sum of an index
register , base register and
displacement within instruction

MOV AX,[BX+SI+6] ; AL [BX+SI+6] ; AH

[BX+SI+7]
JMP [BX+DI+6] ;IP [BX+DI+7 : BX+DI+6]
INC BYTE PTR [BP+SI+5] ;
DEC WORD PTR [BP+DI+5] ;

42
 9. Strings Addressing Mode

• The memory source address is a register SI in

the data segment, and the memory
destination address is register DI in the extra
segment
• Ex: MOVSB [ES:DI] [DS:SI]
• If DF=0 SI SI+1 , DI DI+1
DF=1 SI SI-1 , DI DI-1

43
INSTRUCTION
SET of 8086
44
 Instruction set basics
• Instruction:- An instruction is a binary pattern designed
inside a microprocessor to perform a specific function.

• Mnemonics:- these are the symbolic codes for either

instructions or commands to perform a particular
function.
• E.g. MOV, ADD, SUB etc.

• Opcode:- It stands for operational code. It specifies the

type of operation to be performed by CPU. It is the first
field in the machine language instruction format.
• E.g. 08 is the opcode for instruction “MOV X,Y”.
45
 Instruction set basics
• Operand:- We can also say it as data on which
operation should act. operands may be register values
or memory values. The CPU executes the instructions
using information present in this field. It may be 8-bit
data or 16-bit data.

• Assembler:- It converts the instruction into sequence of

binary bits, so that this bits can be read by the
processor.

46
Types of instruction set of 8086
microprocessor
(1). Data Copy/Transfer instructions.

(2). Arithmetic & Logical instructions.

(3). Branch instructions.

(4). Loop instructions.

(5). Machine Control instructions.

(6). Flag Manipulation instructions.

(7). Shift & Rotate instructions.

(8). String instructions.

47
(1). Data copy/transfer instructions.

(1). MOV Destination, Source

There will be transfer of data from source to destination.

Source can be register, memory location or immediate data.
Destination can be register or memory operand.
Both Source and Destination cannot be memory location or
segment registers at the same time.
E.g.
(1). MOV CX, 037A H;
(2). MOV AL, BL;
(3). MOV BX, [0301 H];

48
BEFORE AFTER
EXECUTION EXECUTION
AX 2000H MOV BX,AX BX 2000H

BEFORE AFTER
EXECUTION EXECUTION
AH AL AH AL
BH BL BH BL
CH CL MOV CL,M CH CL 40
DH DL 40 DH DL 40

49
Stack Pointer
It is a 16-bit register, contains the address of the data
item currently on top of the stack.

Stack operation includes pushing (providing) data on

to the stack and popping (taking)data from the stack.

Pushing operation decrements stack pointer and

Popping operation increments stack pointer. i.e. there
is a last in first out (LIFO) operation.

50
(2). Push Source

Source can be register, segment register or memory.

This instruction pushes the contents of specified source
on to the stack.
In this stack pointer is decremented by 2.
The higher byte data is pushed first (SP-1).
Then lower byte data is pushed (SP-2).

E.g.:
(1). PUSH AX;
(2). PUSH DS;
(3). PUSH [5000H];
51
 INITIAL POSITION

(1) STACK
POINTER
DECREMENTS SP & STORES HIGHER
BYTE
(2) STACK
POINTER HIGHER BYTE

DECREMENTS SP & STORES LOWER

BYTE
(3) STACK
LOWER BYTE
POINTER
HIGHER BYTE

52
 BEFORE EXECUTION
SP 2002H
2000H
BH BL
2001H
CH 10 CL 50
DH DL
2002H

PUSH CX
AFTER EXECUTION
2000H 50
SP 2000H
BH BL
2001H 10
CH 10 CL 50

DH DL 2002H

53
(3) POP Destination

Destination can be register, segment register or memory.

This instruction pops (takes) the contents of specified
destination.
In this stack pointer is incremented by 2.
The lower byte data is popped first (SP+1).
Then higher byte data is popped (SP+2).

E.g.
(1). POP AX;
(2). POP DS;
(3). POP [5000H];
54
 INITIAL POSITION AND READS LOWER
BYTE
(1) STACK
POINTER LOWER BYTE

INCREMENTS SP & READS HIGHER BYTE

LOWER BYTE
(2) STACK HIGHER BYTE
POINTER

INCREMENTS SP

LOWER BYTE
HIGHER BYTE

(3) STACK
POINTER
55
 BEFORE EXECUTION

2000H 30
SP 2000H
2001H 50
BH BL
2002H

POP BX
AFTER EXECUTION
2000H 30
SP 2002H 2001H 50
BH 50 BL 30 2002H
56
(4). XCHG Destination, source;

• This instruction exchanges contents of Source with

destination.

• It cannot exchange two memory locations directly.

•The contents of AL are exchanged with BL.

•The contents of AH are exchanged with BH.

•E.g.
(1). XCHG BX, AX;
(2). XCHG [5000H],AX;
57
BEFORE EXECUTION AFTER EXECUTION

AH 20 AL 40 AH 70 AL 80

BH 70 BL 80 BH 20 BL 40

XCHG AX,BX
58
(5) XLAT

Also known as translate instruction.

It is used to find out codes in case of code conversion.
i.e. it translates code of the key pressed to the
corresponding 7-segment code.
After execution this instruction contents of AL register
always gets replaced.
E.g. XLAT;

59
(6)IN AL/AX, 8-bit/16-bit port address

It reads from the specified port address.

It copies data to accumulator from a port with 8-
bit or 16-bit address.
DX is the only register is allowed to carry port
address.
E.g.
(1). IN AL, 80H;
(2). IN AX,DX; //DX contains address of 16-bit
port.
60
 BEFORE EXECUTION

PORT 10 AL
80H

IN AL,80H
AFTER EXECUTION

PORT 10 AL 10
80H
61
(7)OUT 8-bit/16-bit port address, AL/AX

It writes to the specified port address.

It copies contents of accumulator to the port with
8-bit or 16-bit address.
DX is the only register is allowed to carry port
address.
E.g.
(1). OUT 50H,AL;
(2). OUT DX,AX; //DX contains address of 16-bit
port.
62
 BEFORE EXECUTION

PORT 10 AL 40
50H

OUT 50H,AL
AFTER EXECUTION

PORT 40 AL 40
50H
63
8.LEA 16-bit register (source), address (dest.)

LEA Also known as Load Effective Address

(LEA).
It loads effective address formed by the
destination into the source register.

E.g.
LEA BX,Address;

64
(9). LDS 16-bit register (source), address (dest.);
(10). LES 16-bit register (source), address (dest.);

LDS Also known as Load Data Segment (LDS).

LES Also known as Load Extra Segment (LES).
It loads the contents of DS (Data Segment) or ES
(Extra Segment) & contents of the destination to
the contents of source register.

E.g.
(1). LDS BX,5000H;
(2). LES BX,5000H;
65
 (1). LDS BX,5000H;
(2). LES BX,5000H;

15 0 7 0
BX 20 10 10
5000H
20
5001H
30
DS/ES 40 30 5002H
40
5003H

66
(11). LAHF:- This instruction loads the AH register
from the contents of lower byte of the flag register.
This command is used to observe the status of the all
conditional flags of flag register.
E.g. LAHF;

(12). SAHF:- This instruction sets or resets all

conditional flags of flag register with respect to the
corresponding bit positions.
If bit position in AH is 1 then related flag is set
otherwise flag will be reset.
E.g. SAHF;
67
PUSH & POP
(13). PUSH F:- This instruction decrements the stack
pointer by 2.
It copies contents of flag register to the memory location
pointed by stack pointer.
E.g. PUSH F;

(14). POP F:- This instruction increments the stack pointer

by 2.
It copies contents of memory location pointed by stack
pointer to the flag register.
E.g. POP F;
68
(2). Arithmetic Instructions
These instructions perform the
operations like:

Addition,
Subtraction,
Increment,
Decrement.

69
(2). Arithmetic Instructions
(1). ADD destination, source;

This instruction adds the contents of source operand with the

contents of destination operand.
The source may be immediate data, memory location or register.
The destination may be memory location or register.
The result is stored in destination operand.
AX is the default destination register.

E.g. (1). ADD AX,2020H;

(2). ADD AX,BX;
70
 BEFORE EXECUTION AFTER EXECUTION

AH 30 AL 30
AH 10 AL 10 ADD AX,2020H

1010
+2020
3030

BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 10 AH 30 AL 30
ADD AX,BX
BH 20 BL 20 BH 20 BL 20

71
2. ADC destination, source
This instruction adds the contents of source operand with
the contents of destination operand with carry flag bit.
The source may be immediate data, memory location or
register.
The destination may be memory location or register.
The result is stored in destination operand.
AX is the default destination register.

E.g. (1). ADC AX,2020H;

(2). ADC AX,BX;
72
(3) INC source
This instruction increases the contents of source
operand by 1.
The source may be memory location or register.
The source can not be immediate data.
The result is stored in the same place.

E.g. (1). INC AX;

(2). INC [5000H];

73
 BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 11 INC AX AH 10 AL 12

BEFORE EXECUTION AFTER EXECUTION

5000H 1011 INC [5000H] 5000H 1012

74
4. DEC source
This instruction decreases the contents of source
operand by 1.
The source may be memory location or register.
The source can not be immediate data.
The result is stored in the same place.

E.g. (1). DEC AX;

(2). DEC [5000H];

75
 BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 11 DEC AX AH 10 AL 10

BEFORE EXECUTION AFTER EXECUTION

5000H 1051 DEC [5000H] 5000H 1050

76
(5) SUB destination, source;
This instruction subtracts the contents of source
operand from contents of destination.
The source may be immediate data, memory location
or register.
The destination may be memory location or register.
The result is stored in the destination place.

E.g. (1). SUB AX,1000H;

(2). SUB AX,BX;
77
BEFORE EXECUTION AFTER EXECUTION

AH 20 AL 00 SUB AX,1000H AH 10 AL 00

2000
-1000
=1000

BEFORE EXECUTION AFTER EXECUTION

AH 20 AL 00 AH 10 AL 00
BH 10 BL 00 SUB AX,BX
BH 10 BL 00
78
(6). SBB destination, source;
Also known as Subtract with Borrow.
This instruction subtracts the contents of source operand
& borrow from contents of destination operand.
The source may be immediate data, memory location or
register.
The destination may be memory location or register.
The result is stored in the destination place.

E.g. (1). SBB AX,1000H;

(2). SBB AX,BX;
79
 BEFORE EXECUTION AFTER EXECUTION

B 1 SBB AX,1000H
AH 20 AL 20 AH 10 AL 19
2020
- 1000
1020-1=1019
BEFORE EXECUTION AFTER EXECUTION
B 1
AH 20 AL 20 AH 10 AL 09
SBB AX,BX
BH 10 BL 10 BH 10 BL 10
2050
80
(7). CMP destination, source
Also known as Compare.
This instruction compares the contents of source
operand with the contents of destination operands.
The source may be immediate data, memory location
or register.
The destination may be memory location or register.
Then resulting carry & zero flag will be set or reset.

E.g. (1). CMP AX,1000H;

(2). CMP AX,BX;
81
 D=S: CY=0,Z=1
BEFORE EXECUTION D>S: CY=0,Z=0
D<S: CY=1,Z=0 AFTER EXECUTION

AH 10 AL 00
CMP AX,BX CY 0 Z 1
BH 10 BL 00

BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 00
CMP AX,BX CY 0 Z 0
BH 00 BL 10

BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 00
CMP AX,BX CY 1 Z 0
BH 20 BL 00

82
 AAA (ASCII Adjust after Addition):
The data entered from the terminal is in ASCII format.

In ASCII, 0 – 9 are represented by 30H – 39H.

This instruction allows us to add the ASCII codes.

This instruction does not have any operand.

Other ASCII Instructions:

AAS (ASCII Adjust after Subtraction)

AAM (ASCII Adjust after Multiplication)

AAD (ASCII Adjust Before Division)

83
 DAA (Decimal Adjust after Addition)
It is used to make sure that the result of adding two BCD
numbers is adjusted to be a correct BCD number.
It only works on AL register.

DAS (Decimal Adjust after Subtraction)

It is used to make sure that the result of subtracting two

BCD numbers is adjusted to be a correct BCD number.
It only works on AL register.

84
MUL operand
Unsigned Multiplication.
Operand contents are positively signed.
Operand may be general purpose register or memory location.
If operand is of 8-bit then multiply it with contents of AL.
If operand is of 16-bit then multiply it with contents of AX.
Result is stored in accumulator (AX).

E.g. (1). MUL BH // AX= AL*BH; // (+3) * (+4) = +12.

 (2). MUL CX // AX=AX*CX;

85
IMUL operand
Signed Multiplication.
Operand contents are negatively signed.
Operand may be general purpose register, memory location or
index register.
If operand is of 8-bit then multiply it with contents of AL.
If operand is of 16-bit then multiply it with contents of AX.
Result is stored in accumulator (AX).

E.g. (1). IMUL BH // AX= AL*BH; // (-3) * (-4) = 12.

 (2). IMUL CX // AX=AX*CX;

86
DIV operand
Unsigned Division.
Operand may be register or memory.
Operand contents are positively signed.
Operand may be general purpose register or memory
location.
AL=AX/Operand (8-bit/16-bit) & AH=Remainder.

E.g. MOV AX, 0203 // AX=0203

 MOV BL, 04 // BL=04
 IDIV BL // AL=0203/04=50 (i.e. AL=50 & AH=03)
87
IDIV operand
Signed Division.
Operand may be register or memory.
Operand contents are negatively signed.
Operand may be general purpose register or memory
location.
AL=AX/Operand (8-bit/16-bit) & AH=Remainder.

E.g. MOV AX, -0203 // AX=-0203

 MOV BL, 04 // BL=04
 DIV BL // AL=-0203/04=-50 (i.e. AL=-50 & AH=03)
88
Multiplication and Division Examples

89
 BEFORE EXECUTION

AH 00 AL 05
BH 00 BL 03
CH CL

MUL BX AX=16 bit {000F}

AFTER EXECUTION 0005*0003 = 0000 000F

AH 00 AL 0F
BH BL
CH CL
DH 00 DL 00
90
 BEFORE EXECUTION

AH 00 AL 05
BH 00 BL 03
CH CL

MUL BX AX=lower 16 bit {000F}

DX=Higher 16 bit {0000}
AFTER EXECUTION 0005*0003 = 0000 000F

AH 00 AL 0F
BH BL
CH CL
DH 00 DL 00
91
 BEFORE EXECUTION

AH 00 AL 0F

BH 00 BL 02
CH CL AL=Quotient {07}
AH=Reminder {01}

DIV BX 000F =7 1
AFTER EXECUTION
0002 2
AH 01 AL 07
BH BL
CH CL
DH 00 DL 00
92
 BEFORE EXECUTION

AH 00 AL 0F

BH 00 BL 02
CH CL AX=Quotient {0007}
DX=Reminder {0001}

DIV BX 000F =7 1
AFTER EXECUTION
0002 2
AH 00 AL 07
BH BL
CH CL
DH 00 DL 01
93
94
95
96
 LOGICAL (or) Bit Manipulation
Instructions
These instructions are used at the bit level.

These instructions can be used for:

Testing a zero bit

Set or reset a bit

Shift bits across registers

97
Bit Manipulation Instructions(LOGICAL Instructions)

• AND
– Especially used in clearing certain bits (masking)
xxxx xxxx AND 0000 1111 = 0000 xxxx
(clear the first four bits)
– Examples: AND BL, 0FH

• OR
– Used in setting certain bits
xxxx xxxx OR 0000 1111 = xxxx 1111
(Set the upper four bits)

98
 XOR
– Used in Inverting bits

xxxx xxxx XOR 0000 1111 = xxxx x’x’x’x’

-Example:
AND CL, FCH ; 1111 1100B
OR CL, C0H ; 1100 0000B
XOR CL, 20H ; 0010 0000B

99
BEFORE EXECUTION AFTER EXECUTION

AH FF AL FF AH 11 AL 11
AND AX,BXH
BH 11 BL 11 BH 11 BL 11

AX = FFFFH = 1111 1111 1111 1111

BX = 1111H = 0001 0001 0001 0001 AND (&)

AND 0001 0001 0001 0001 = 1111H

100
BEFORE EXECUTION AFTER EXECUTION

AH FF AL FF AH FF AL FF
OR AX,BXH
BH 11 BL 11 BH 11 BL 11

AX = FFFFH = 1111 1111 1111 1111

BX = 1111H = 0001 0001 0001 0001 OR

OR 1111 1111 1111 1111 = FFFFH

101
BEFORE EXECUTION AFTER EXECUTION

AH FF AL FF AH EE AL EE
XOR AX,BXH
BH 11 BL 11 BH 11 BL 11

AX = FFFFH = 1111 1111 1111 1111

BX = 1111H = 0001 0001 0001 0001

XOR 1110 1110 1110 1110 = EEEEH

102
BEFORE EXECUTION AFTER EXECUTION

AH FF AL FF AH 00 AL 00
NOT AXH

AX = FFFFH = 1111 1111 1111 1111

NOT 0000 0000 0000 0000 = 0000H

103
 SHL Instruction
The SHL (shift left) instruction performs a logical left
shift on the destination operand, filling the lowest bit
with 0.

0
CF

mov dl,5d

shl dl,1

104
 SHR Instruction
The SHR (shift right) instruction performs a logical
right shift on the destination operand. The highest bit
position is filled with a zero.

0
CF

MOV DL,80d
SHR DL,1 ; DL = 40
SHR DL,3 ; DL = 10
105
 SAR Instruction
SAR (shift arithmetic right) performs a right
arithmetic shift on the destination operand.

CF

An arithmetic shift preserves the number's sign.

MOV DL,-80
SAR DL,1 ; DL = -40
SAR DL,3 ; DL = -10
106
 Shifting left n bits multiplies the operand by 2n
For example, 5 * 22 = 20

Shifting right n bits divides the operand by 2n

For example, 80 / 23 = 10

mov dl,5 Before: 00000101 =5

shl dl,1 After: 0 0 0 0 1 0 1 0 = 10

107
 ROL Instruction
ROL (rotate left) shifts each bit to the left
The highest bit is copied into both the Carry flag
and into the lowest bit
No bits are lost

CF

MOV Al,11110000b
ROL Al,1 ; AL = 11100001b

MOV Dl,3Fh
ROL Dl,4 ; DL = F3h
108
 ROR Instruction
ROR (rotate right) shifts each bit to the right
The lowest bit is copied into both the Carry flag and
into the highest bit
No bits are lost

CF

MOV AL,11110000b
ROR AL,1 ; AL = 01111000b

MOV DL,3Fh
ROR DL,4 ; DL = F3h
109
 RCL Instruction
 RCL (rotate carry left) shifts each bit to the left
 Copies the Carry flag to the least significant bit
 Copies the most significant bit to the Carry flag

CF

CLC ; CF = 0
MOV BL,88H ; CF,BL = 0 10001000b
RCL BL,1 ; CF,BL = 1 00010000b
RCL BL,1 ; CF,BL = 0 00100001b
110
 RCR Instruction
RCR (rotate carry right) shifts each bit to the right
Copies the Carry flag to the most significant bit
Copies the least significant bit to the Carry flag

CF

STC ; CF = 1
MOV AH,10H ; CF,AH =1 00010000
RCR AH,1 ; CF,AH =0 10001000

111
 SHL Instruction
The SHL (shift left) instruction performs a logical left
shift on the destination operand, filling the lowest bit
with 0.
0
CF

BEFORE
0 0 0 0 0 1 0 1 =05H
EXECUTION
CF
=0AH
AFTER 0 0 0 0 0 1 0 1 0
EXECUTION

112
 SHR Instruction

0
CF

BEFORE
0 0 0 0 0 1 0 1 =05H
EXECUTION
CF
AFTER 0 0 0 0 0 0 1 0 1
EXECUTION
=02H

113
 ROL Instruction

CF

BEFORE
EXECUTION 0 0 0 0 0 1 0 1 =05H

CF
AFTER 0 0 0 0 0 1 0 1 0 =0AH
EXECUTION

114
 ROR Instruction

CF

BEFORE
0 0 0 0 0 1 0 1 =05H
EXECUTION

CF

AFTER 1 0 0 0 0 0 1 0 1 =82H
EXECUTION

115
 Branching Instructions (or)
Program Execution Transfer
Instructions
These instructions cause change in the sequence of the
execution of instruction.
This change can be through a condition or sometimes
unconditional.
The conditions are represented by flags.

116
 CALL Des:

This instruction is used to call a subroutine or function or

procedure.
The address of next instruction after CALL is saved onto
stack.
RET:

It returns the control from procedure to calling program.

Every CALL instruction should have a RET.

117
SUBROUTINE & SUBROUTINE HANDILING
INSTRUCTIONS

Main program

Subroutine A

First Instruction
Call subroutine A
Next instruction

Return
Call subroutine A
Next instruction

118
 JMP Des:

This instruction is used for unconditional jump from one

place to another.

Jxx Des (Conditional Jump):

All the conditional jumps follow some conditional

statements or any instruction that affects the flag.

119
 Conditional Jump Table
Mnemonic Meaning
JA Jump if Above
JAE Jump if Above or Equal
JB Jump if Below
JBE Jump if Below or Equal
JE Jump if Equal
JNE Jump if Not Equal
JC Jump if Carry
JNC Jump if Not Carry
JPE Jump if Parity Even
JPO Jump if Parity Odd
JZ Jump if Zero
JNZ Jump if Not Zero
120
 Loop Des:

This is a looping instruction.

The number of times looping is required is placed in the CX

register.
With each iteration, the contents of CX are decremented.

ZF is checked whether to loop again or not.

121
 String Instructions
String in assembly language is just a sequentially stored
bytes or words.
There are very strong set of string instructions in 8086.

By using these string instructions, the size of the program

is considerably reduced.

122
 CMPS Des, Src:

It compares the string bytes or words.

SCAS String:

It scans a string.

It compares the String with byte in AL or with word

in AX.

123
 MOVS / MOVSB / MOVSW:

It causes moving of byte or word from one string to

another.
In this instruction, the source string is in Data Segment
and destination string is in Extra Segment.
SI and DI store the offset values for source and destination
index.

124
 Copying a string (MOV SB)
MOV CX,0003 copy 3 memory locations
MOV SI,1000
MOV DI,2000
L1 CLD
MOVSB
DEC CX decrement CX
JNZ L1
HLT
125
 REP (Repeat):

This is an instruction prefix.

It causes the repetition of the instruction until CX

becomes zero.
E.g.: REP MOVSB STR1, STR2

 It copies byte by byte contents.

 REP repeats the operation MOVSB until CX becomes zero.

126
 Find & Replace

127
 Processor Control Instructions
These instructions control the processor itself.

8086 allows to control certain control flags that:

causes the processing in a certain direction

processor synchronization if more than one microprocessor

attached.

128
 STC
It sets the carry flag to 1.

CLC
It clears the carry flag to 0.

CMC
It complements the carry flag.

129
 STD:
It sets the direction flag to 1.

If it is set, string bytes are accessed from higher memory

address to lower memory address.

CLD:
It clears the direction flag to 0.

If it is reset, the string bytes are accessed from lower

memory address to higher memory address.

130
  HLT instruction – HALT processing
The HLT instruction will cause the 8086 to stop fetching and
executing instructions.

NOP instruction
This instruction simply takes up three clock cycles and does
no processing.

LOCK instruction
This is a prefix to an instruction. This prefix makes sure that
during execution of the instruction, control of system bus is not
taken by other microprocessor.

WAIT instruction
this instruction takes 8086 to an idle condition. The
CPU will not do any processing during this.
131
 INSTRUCTION SET-summary
1.DATA TRANSFER INSTRUCTIONS

Mnemonic Meaning Format Operation

MOV Move Mov D,S (S)  (D)

XCHG Exchange XCHG D,S (S) (D)

LEA Load Effective Address LEA Reg16,EA EA  (Reg16)

pushes the operand into top of sp=sp-2

PUSH PUSH BX Copy 16 bit value to top
stack.
of stack
pops the operand from top of Copy top of stack to 16
POP POP BX bit reg
stack to Des.
sp=sp+2
IN transfers the operand from IN AL,28
specified port to accumulator
register.

OUT transfers the operand from OUT 28,AL

accumulator to specified
port.
132
 2. ARITHMETIC INSTRUCTIONS
Mnemonic Meaning Format Operation

ADD Addition ADD D,S (S)+(D)  (D) carry  (CF)

ADC Add with carry ADC D,S (S)+(D)+(CF)  (D) carry  (CF)

INC Increment by one INC D (D)+1  (D)

AAA ASCII adjust for AAA If the sum is >9, AH

addition is incremented by 1
DAA Decimal adjust for DAA Adjust AL for decimal Packed BCD
addition
SUB Subtract SUB D,S (D) - (S)  (D)
Borrow  (CF)

SBB Subtract with SBB D,S (D) - (S) - (CF)  (D)

borrow

DEC Decrement by one DEC D (D) - 1  (D)

NEG Negate NEG D

DAS Decimal adjust for DAS Convert the result in AL to packed

subtraction decimal format

AAS ASCII adjust for AAS (AL) difference (AH) dec by 1 if

133
subtraction borrow
3. Bit Manipulation Instructions(Logical Instructions)
Mnemonic Meaning Format Operation

AND Logical AND AND D,S (S) · (D) → (D)

OR Logical Inclusive OR OR D,S (S)+(D) → (D)

XOR Logical Exclusive OR XOR D,S (S) + (D)→(D)

NOT LOGICAL NOT NOT D (D) → (D)

134
Presented by C.GOKUL,AP/EEE , Velalar College of Engg & Tech, Erode
 Shift & Rotate Instructions
Mnemonic Meaning Format
SAL/SHL Shift arithmetic Left/ SAL/SHL D, Count
Shift Logical left

SHR Shift logical right SHR D, Count

Shift arithmetic SAR D, Count

SAR right

Mnemonic Meaning Format

ROL Rotate Left ROL D,Count

ROR Rotate Right ROR D,Count

RCL Rotate Left through Carry RCL D,Count

RCR Rotate right through Carry RCR D,Count

135
 4. Branching or PROGRAM EXECUTION
TRANSFER INSTRUCTIONS
• CALL - call a subroutine
• RET - returns the control from procedure to calling
program
• JMP Des – Unconditional Jump
• Jxx Des – conditional Jump (ex: JC 8000)
• Loop Des

136
 5. STRING INSTRUCTIONS
• CMPS Des, Src - compares the string bytes
• SCAS String - scans a string
• MOVS / MOVSB / MOVSW - moving of byte or
word
• REP (Repeat) - repetition of the instruction

137
 6. PROCESSOR CONTROL INSTRUCTIONS
• STC – set the carry flag (CF=1)
• CLC – clear the carry flag (CF=0)
• STD – set the direction flag (DF=1)
• CLD – clear the direction flag (DF=0)
• HLT – stop fetching & execution
• NOP – no operation(no processing)
• LOCK - control of system bus is not taken by other µP
• WAIT - CPU will not do any processing

138
Assembler
Directives
139
Directives Expansion

140
• ASSUME Directive - The ASSUME directive is
used to tell the assembler that the name of
the logical segment should be used for a
specified segment.

• DB(define byte) - DB directive is used to

declare a byte type variable or to store a byte
in memory location.

• DW(define word) - The DW directive is used

to define a variable of type word or to reserve
storage location of type word in memory. 141
• DD(define double word) :This directive is used to
declare a variable of type double word or to
reserve 2 words of storage in memory locations.

• DQ (define quadword) :This directive is used to

tell the assembler to declare a variable 4 words in
length or to reserve 4 words of storage in memory
.

• DT (define ten bytes):It is used to inform the

assembler to define a variable which is 10 bytes in
length or to reserve 10 bytes of storage in
memory.
142
• PROC - The PROC directive is used to identify the
start of a procedure.
• PTR -This PTR operator is used to assign a
specific type of a variable or to a label.
• ORG -Originate : The directive ORG assigns the
location counter with the value specified in the
directive. It helps in placing the machine code in
the specified location while translating the
instructions into machine code by the assembler.
ORG 1000
The above statement informs the assembler to
initialize the location counter to 1000.
143
• END- End program .This directive indicates the
assembler that this is the end of the program
module. The assembler ignores any
statements after an END directive.
• ENDP- End procedure: It indicates the end of
the procedure (subroutine) to the assembler.
• ENDS-End Segment: This directive is used with
the name of the segment to indicate the end
of that logical segment.
• EQU - This EQU directive is used to give a
name to some value or to a symbol.
144
 Directives examples
• ASSUME CS:CODE cs=> code segment
• ORG 3000
• NAME DB ‘THOMAS’
• POINTER DD 12341234H
• FACTOR EQU 03H

145
Assembly Language
Programming(ALP)
8086

146
 Program 1: Increment an 8-bit number

• MOV AL, 05H Move 8-bit data to AL.

• INC AL Increment AL.
After Execution AL = 06H

Program 2: Increment an 16-bit number

• MOV AX, 0005H Move 16-bit data to AX.

• INC AX Increment AX.
After Execution AX = 0006H

147
 Program 3: Decrement an 8-bit number

• MOV AL, 05H Move 8-bit data to AL.

• DEC AL Decrement AL.
After Execution AL = 04H

Program 4: Decrement an 16-bit number

• MOV AX, 0005H Move 16-bit data to AX.

• DEC AX Decrement AX.
After Execution AX = 0004H

148
 Program 5: 1’s complement of an 8-bit
number.
• MOV AL, 05H Move 8-bit data to AL.
• NOT AL Complement AL.
After Execution AL = FAH

Program 6: 1’s complement of a 16-bit

number.
• MOV AX, 0005H Move 16-bit data to AX.
• NOT AX Complement AX.
After Execution AX = FFFAH

149
 Program 7: 2’s complement of an 8-bit
number.
• MOV AL, 05H Move 8-bit data to AL.
• NOT AL Complement AL.
• INC AL Increment AL
After Execution AX = FAH + 1 = FB

Program 8: 2’s complement of a 16-bit

number.
• MOV AX, 0005H Move 16-bit data to AX.
• NOT AX Complement AX.
• INC AX Increment AX
After Execution AX = FFFAH + 1 = FFFB

150
 Program 9: Add two 8-bit numbers
MOV AL, 05H Move 1 8-bit number to AL.
st

MOV BL, 03H Move 2nd 8-bit number to BL.

ADD AL, BL Add BL with AL.
After Execution AL = 08H

Program 10: Add two 16-bit numbers

MOV AX, 0005H Move 1 16-bit number to AX.
st

MOV BX, 0003H Move 2nd 16-bit number to BX.

ADD AX, BX Add BX with AX.
After Execution AX = 0008H

151
 Program 11: subtract two 8-bit numbers
MOV AL, 05H Move 1 8-bit number to AL.
st

MOV BL, 03H Move 2nd 8-bit number to BL.

SUB AL, BL subtract BL from AL.
After Execution AL = 02H

Program 12: subtract two 16-bit numbers

MOV AX, 0005H Move 1 16-bit number to AX.
st

MOV BX, 0003H Move 2nd 16-bit number to BX.

SUB AX, BX subtract BX from AX.
After Execution AX = 0002H
152
 Program 13: Multiply two 8-bit unsigned
numbers.
MOV AL, 04H Move 1st 8-bit number to AL.
MOV BL, 02H Move 2nd 8-bit number to BL.
MUL BL Multiply BL with AL and the result will
be in AX.

Program 14: Multiply two 8-bit signed

numbers.
MOV AL, 04H Move 1st 8-bit number to AL.
MOV BL, 02H Move 2nd 8-bit number to BL.
IMUL BL Multiply BL with AL and the result will
be in AX.

153
 Program 15: Multiply two 16-bit unsigned
numbers.
MOV AX, 0004H Move 1st 16-bit number to AL.
MOV BX, 0002H Move 2nd 16-bit number to BL.
MUL BX Multiply BX with AX and the result will
be in DX:AX {4*2=0008=> 08=> AX , 00=> DX}

Program 16: Divide two 16-bit unsigned

numbers.
MOV AX, 0004H Move 1st 16-bit number to AL.
MOV BX, 0002H Move 2nd 16-bit number to BL.
DIV BX Divide BX from AX and the result will be in AX & DX
{4/2=0002=> 02=> AX ,00=>DX}
(ie: Quotient => AX , Reminder => DX )

154
 Detailed coding
16 BIT ADDITION

155
 Detailed coding
16 BIT SUBTRACTION

156
16 BIT MULTIPLICATION

157
16 BIT DIVISION

158
 SUM of N numbers
MOV AX,0000
MOV SI,1100
MOV DI,1200
MOV CX,0005 5 NUMBERS TO BE TAKEN SUM
MOV DX,0000
L1: ADD AX,[SI]
INC SI
INC DX
CMP CX,DX
JNZ L1
MOV [1200],AX
HLT

159
 Average of N numbers
MOV AX,0000
MOV SI,1100
MOV DI,1200
MOV CX,0005 5 NUMBERS TO BE TAKEN AVERAGE
MOV DX,0000
L1: ADD AX,[SI]
INC SI
INC DX
CMP CX,DX
JNZ L1
DIV CX AX=AX/5(AVERAGE OF 5 NUMBERS)
MOV [1200],AX
HLT
160
 FACTORIAL of N
MOV CX,0005 5 Factorial=5*4*3*2*1=120=>78
MOV DX,0000
MOV AX,0001
L1: MUL CX
DEC CX
CMP CX,DX
JNZ L1
MOV [1200],AX
HLT

161
ASCENDING ORDER

162
163
 DECENDING ORDER

Note: change the coding JC L1 into JNC L1

164
LARGEST, smallest NUMBER IN AN ARRAY

165
LARGEST NUMBER

166
SMALLEST NUMBER

167
 Modular
Programming
168
• Generally , industry-programming projects consist of
thousands of lines of instructions or operation code.
• The size of the program are reduced from humanly
comprehensible to a manageable level.
• Program is composed from several smaller
modules.
• Modules could be developed by separate teams
concurrently. OBJ modules (Object modules).
• The .OBJ modules so produced are combined using a
LINK program.
• Modular programming techniques simplify the
software development process
169
CHARACTERISTICS of module:
1. Each module is independent of other modules.
2. Each module has one input and one output.
3. A module is small in size.
4. Programming a single function per module is a goal
Advantages of Modular Programming:
• It is easy to write, test and debug a module.
• Code can be reused.
• The programmer can divide tasks.
• Re-usable Modules can be re-used within a program
DRAWBACKS:
Modular programming requires extra time and memory
170
MODULAR PROGRAMMING:
1. Linking & Relocation
2. Stacks
3. Procedures
4. Macros
5. Interrupts & Interrupt Routines

171
 LINKING &
RELOCATION
172
 LINKER
• A linker is a program used to join together several
object files into one large object file.
• The linker produces a link file which contains the
binary codes for all the combined modules.

The linker program is invoked using the following

options.
C> LINK
or
C>LINK MS.OBJ
173
• The loader is a part of the operating system
and places codes into the memory after
reading the ‘.exe’ file
• A program called locator reallocates the
linked file and creates a file for permanent
location of codes in a standard format.

174
Creation and execution of a program

175
Loader
->Loader is a utility program which takes object code as input
prepares it for execution and loads the executable code into
the memory .
->Loader is actually responsible for initializing the process of
execution.
Functions of loaders:
1. It allocates the space for program in the memory(Allocation)
2. It resolves the code between the object modules(Linking)
3. some address dependent locations in the program, address
constants must be adjusted according to allocated
space(Relocation)
4. It also places all the machine instructions and data of
corresponding programs and subroutines into the memory .
(Loading)
176
 Relocating loader (BSS Loader)
• When a single subroutine is changed then all the
subroutine needs to be reassembled.
• The binary symbolic subroutine (BSS) loader used
in IBM 7094 machine is relocating loader.
• In BSS loader there are many procedure
segments
• The assembler reads one sourced program and
assembles each procedure segment
independently
177
• The output of the relocating loader is the object program
• The assembler takes the source program as input; this source
program may call some external routines.
SEGMENT COMBINATION:
ASM-86 assembler regulating the way segments with the
same name are concatenated & sometimes they are overlaid.
Form of segment directive:
Segment name SEGEMENT Combine-type
Possible combine-type are:
• PUBLIC
• COMMON
• STACK
• AT
• MEMORY
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Procedures
CALL & RET instruction

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• Procedure is a part of code that can be called from your
program in order to make some specific task. Procedures
make program more structural and easier to
understand.
• syntax for procedure declaration:
name PROC
…………. ; here goes the code
…………. ; of the procedure ...
RET
name ENDP
Here PROC is the procedure name (used in top & bottom)
RET - used to return from OS.
CALL - call a procedure
PROC & ENDP - complier directives
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CALL & RET - instructions
 EXAMPLE 1 (call a procedure)
ORG 100h
CALL m1
MOV AX, 2
RET ; return to operating system.

m1 PROC
MOV BX, 5
RET ; return to caller.
m1 ENDP
END
• The above example calls procedure m1, does MOV BX, 5 &
returns to the next instruction after CALL: MOV AX, 2.

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Example 2 : several ways to pass parameters
to procedure
ORG 100h
MOV AL, 1
MOV BL, 2
CALL m2
CALL m2
CALL m2
CALL m2
RET ; return to operating system.

m2 PROC
MUL BL ; AX = AL * BL.
RET ; return to caller.
m2 ENDP
END value of AL register is update every time the
procedure is called.
final result in AX register is 16 (or 10h)
STACK
PUSH & POP instruction

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• Stack is an area of memory for keeping temporary
data.
• STACK is used by CALL & RET instructions.
PUSH -stores 16 bit value in the stack.
POP -gets 16 bit value from the stack.
• PUSH and POP instruction are especially useful
because we don't have too much registers to operate
1. Store original value of the register in stack (using
PUSH).
2. Use the register for any purpose.
3. Restore the original value of the register from stack
(using POP).
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Example 1 (store value in STACK using PUSH
& POP)
ORG 100h
MOV AX, 1234h
PUSH AX ; store value of AX in stack.
MOV AX, 5678h ; modify the AX value.
POP AX ; restore the original value of AX.
RET
END

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 Example 2: use of the stack is for
exchanging the values
ORG 100h
MOV AX, 1212h ; store 1212h in AX.
MOV BX, 3434h ; store 3434h in BX
PUSH AX ; store value of AX in stack.
PUSH BX ; store value of BX in stack.
POP AX ; set AX, with the original value of BX.
POP BX ; set BX with the original value of AX.
RET
END
push 1212h and then 3434h, on pop we will first get 3434h and
only after it 1212h 186
MACROS
187
• Macros are just like procedures, but not really.
• Macros exist only until your code is compiled
• After compilation all macros are replaced with
real instructions
• several macros to make coding easier(Reduce
large & complex programs)
Example (Macro definition)
name MACRO [parameters,...]
<instructions>
ENDM
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189
 Example1 : Macro Definitions
SAVE MACRO definition of MACRO name SAVE

PUSH AX
PUSH BX
PUSH CX
ENDM

RETREIVE MACRO Another definition of MACRO name RETREIVE

POP CX
POP BX
POP AX
ENDM

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 MACROS with Parameters
Example:
COPY MACRO x, y ; macro named COPY with
2 parameters{x, y}
PUSH AX
MOV AX, x
MOV y, AX
POP AX
ENDM
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 INTERRUPTS
&
INTERRUPT SERVICE
ROUTINE(ISR)
192
 INTERRUPT & ISR ?
• ‘Interrupts’ is to break the sequence of
operation.
• While the CPU is executing a program, on
‘interrupt’ breaks the normal sequence of
execution of instructions, diverts its execution
to some other program called Interrupt
Service Routine (ISR)

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194
195
196
• Maskable Interrupt: An Interrupt that can be
disabled or ignored by the instructions of CPU
are called as Maskable Interrupt.

• Non- Maskable Interrupt: An interrupt that

cannot be disabled or ignored by the instructions
of CPU are called as Non- Maskable Interrupt.

• Software interrupts are machine instructions

that amount to a call to the designated interrupt
subroutine, usually identified by interrupt
number.  Ex: INT0 - INT255
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198
199
200
201
202
 INTERRUPT VECTOR TABLE

256 INTERRUPTS OF 8086 ARE DIVIDED IN TO 3 GROUPS

1. TYPE 0 TO TYPE 4 INTERRUPTS-

These are used for fixed operations and hence are called
dedicated interrupts

2. TYPE 5 TO TYPE 31 INTERRUPTS

Not Used By 8086,reserved For Higher Processors Like 80286
80386 Etc

3. TYPE 32 TO 255 INTERRUPTS

Available For User, called User Defined Interrupts These Can
Be H/W Interrupts And Activated Through Intr Line Or Can Be
S/W Interrupts. 203
Type – 0 Divide Error Interrupt
Quotient is too large cant be fit in AL/AX or Divide By Zero {AX/0=∞}
Type –1 Single Step Interrupt
used for executing the program in single step mode by setting Trap Flag
To Set Trap Flag PUSHF
MOV BP,SP
OR [BP+0],0100H; SET BIT8
POPF

Type – 2 Non Maskable Interrupt

This Interrupt is used for executing ISR of NMI Pin (Positive Egde Signal). NMI
cant be masked by S/W

Type – 3 Break Point Interrupt

used for providing BREAK POINTS in the program

Type – 4 Over Flow Interrupt

used to handle any Overflow Error after signed arithmetic
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 PRIORITY OF INTERRUPTS
Interrupt Type Priority

INT0, INT3-INT 255, Highest

NMI(INT2)

INTR

SINGLE STEP Lowest

205
 Byte &
String
Manipulation
206
Move, compare, store, load, scan

207
 Byte Manipulation
Example 3:
Example 1:
MOV AX,[1000]
MOV AX,[1000]
MOV BX,[1002]
MOV BX,[1002]
AND AX,BX XOR AX,BX
MOV [2000],AX MOV [2000],AX
HLT HLT
Example 2: Example 4:
MOV AX,[1000]
MOV AX,[1000]
MOV BX,[1002]
OR AX,BX
NOT AX
MOV [2000],AX MOV [2000],AX
HLT HLT
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