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Computer Function: 1. Reading (Fetching) Instruction From Memory by CPU 2. Execution of Each Fetched Instruction

The basic operation of a computer is program execution through instruction fetch and execution cycles, where the CPU reads instructions from memory, increments the program counter, and performs the specified actions which may involve data transfer, arithmetic operations, or altering execution sequence; interrupts can notify the CPU of external events and cause it to suspend the current program, service the interrupt handler, and then resume the program from where it left off using priority levels or disabling interrupts to handle multiple simultaneous interrupts.

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49 views19 pages

Computer Function: 1. Reading (Fetching) Instruction From Memory by CPU 2. Execution of Each Fetched Instruction

The basic operation of a computer is program execution through instruction fetch and execution cycles, where the CPU reads instructions from memory, increments the program counter, and performs the specified actions which may involve data transfer, arithmetic operations, or altering execution sequence; interrupts can notify the CPU of external events and cause it to suspend the current program, service the interrupt handler, and then resume the program from where it left off using priority levels or disabling interrupts to handle multiple simultaneous interrupts.

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domainname9
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Function

• The basic operation performed by a computer is


program execution.
• The program is nothing but set of instructions stored
in memory. CPU does the processing by executing
each instructions specified in the program.
• Instruction processing consist of two steps:
1. Reading (fetching) instruction from memory by CPU
2. Execution of each fetched instruction
• Program execution consists of repeating the process
of instruction fetch and instruction execution.
Instruction Cycle
• The processing required for a single instruction is called an
instruction cycle.
• It consists of two steps:
Fetch cycle Execute cycle
• Program execution halts only if the machine is turned off, or
some unrecoverable error occurs or because of some program
instruction halts the computer.

Basic Instruction Cycle


The Fetch Cycle & Execute Cycle
• CPU fetches an instruction from memory, a register
called Program Counter (PC) is used to hold the
address of next instruction to fetch.
• CPU increments the PC after each instruction fetch,
unless told otherwise.
• The fetched instruction is loaded into a register in
CPU known as Instruction Register (IR).
• CPU interprets the instruction and performs the
required action.
The actions may involve four steps:

• CPU-memory
Data transfer between CPU and main memory.
• CPU-I/O
Data transfer to or from outside world by transferring
between CPU and I/O module.
• Data processing
Some arithmetic or logical operation on data.
• Control
An instruction may specify alteration of sequence of
execution, e.g. jump
• Execution cycle for a particular instruction
may involve more than one reference to
memory or it may specify an I/P operation.
• So a detailed state diagram of instruction is
as follows.
• Instruction Address Calculation (iac): Determines address of
next instruction to be executed.
• Instruction Fetch (if): Read instruction from memory
location into CPU.
• Instruction Operation Decoding (iod): Determines the type
of operation to be performed and operands to be used.
• Operand Address Calculation (oac): Determines the address
of operand (operand may be referenced from memory or
available via I/O) .
• Operand Fetch (of): Fetches the operand from memory or
reads it from I/O.
• Data Operation (do): Performs the operation indicated in
instruction.
• Operand Store (os): write the result into memory or to I/O.
Interrupts
• A signal informing a program that an event has occurred.
• All computers provide a mechanism by which other modules may
interrupt the normal processing of CPU.
• List of common classes of interrupts are :
1. Program: Generated by some condition that occurs
because of an instruction execution. E.g. arithmetic
overflow, division by zero, reference outside a user’s
allowed memory space.
2. Timer: Generated by timer within the processor.
3. I/O: Generated by I/O controller
4. Hardware failure: Generated by a failure such as power
failure or memory parity error.
• Interrupts are provided primarily to improve processing
efficiency.
• From the point of view of user program, an interrupt is just
an interruption of normal sequence of execution.
• If the CPU is idle, interrupt is served.
• When interrupt processing is completed, execution resumes.
• The processor and the operating system are responsible for
suspending the user program and then resuming it at the same
point.
Interrupt Cycle

• Added to instruction cycle


• Processor checks for interrupt
─ Indicated by presence of an interrupt signal
• If no interrupt, fetch next instruction
• If interrupt pending:
─ Suspend execution of current program.
─ Save context. i.e. save the address of next instruction
to be executed (in current program) and any other data
relevant to processor’s current activity.
─ Set PC to start address of interrupt handler routine
─ Process interrupt
─ Restore context and continue interrupted program
Multiple interrupts
• How to handle multiple (more than one) interrupt.
• E.g. if a program receives data from a communication line
and prints the result. The printer will generate interrupt
every time it completes a print operation. The
communication line controller will generate interrupt every
time a unit of data arrives.
• Here it is possible for a communication interrupt to occur
while a printer interrupt is being processed.
• There are 2 ways to handle them.
• Disable interrupts
– Disable the interrupt while an interrupt is being processed
– Disabled interrupts means processor can & will ignore
that interrupt
– If interrupts occur during this time, they remain pending
and are checked after processor has enabled interrupt.
– Interrupts are handled in sequence as they occur

• Define priorities
– Low priority interrupts can be interrupted by higher
priority interrupts
– When higher priority interrupt has been processed,
processor returns to previous interrupt

•Multiple interrupts can be sequential or nested.


Example of multiple interrupts (considering priorities):
We have a system with 3 I/O devices: a printer, a disk, and a
communication line, with priorities of 2, 4, 5 respectively.
At t=0, user program begins.
At t=10, a printer interrupt occurs
At t=15, a communications interrupt occurs
At t=25, a disk interrupt occurs
Transfer of control occurs in a manner as shown in next figure.

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