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Industrial Training Report Submitted in Partial Fulfillment For The Requirement of The Degree of

VLSI is the process of integrating thousands of transistors into a single chip. This allows complex functions like CPUs, memory, and logic to be integrated on one chip. Verilog and VHDL are hardware description languages used to design and test VLSI circuits. Verilog is easier to learn and more similar to C, while VHDL is more similar to Ada. Verilog allows designs to be modeled at different levels of abstraction from behavioral to gate level. It uses always blocks and initial constructs to describe designs.

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51 views18 pages

Industrial Training Report Submitted in Partial Fulfillment For The Requirement of The Degree of

VLSI is the process of integrating thousands of transistors into a single chip. This allows complex functions like CPUs, memory, and logic to be integrated on one chip. Verilog and VHDL are hardware description languages used to design and test VLSI circuits. Verilog is easier to learn and more similar to C, while VHDL is more similar to Ada. Verilog allows designs to be modeled at different levels of abstraction from behavioral to gate level. It uses always blocks and initial constructs to describe designs.

Uploaded by

Alkesh Verma
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Industrial Training Report submitted in partial fulfillment for the

requirement of the Degree of

BACHELOR OF TECHNOLOGY
By
MANSI SHARMA
(1629031023)

In
ELECTRONICS AND COMMUNICATION
ENGINEERING
ABESIT, GHAZIABAD

AFFILIATED TO
Dr. A.P.J. ABDUL KALAM UNIVERSITY
UTTAR PRADESH,LUCKNOW
(AUGUST- 2019)
DEPARTMENT OF ELECTRONICS &
COMMUNICATION

To impart in depth knowledge to the students of Electronics & Communication


Engineering for achieving academic excellence, professional attitude and ethical
VISION values, inculcating research culture to meet the challenges of global industrial
demands.
Impart quality and value based education, with practical orientation to transform students into
M1 the skilled, trained and competent individuals.

Infusing research culture among students and faculty so that the Department be recognized as
M2
MISSION Center of Excellence in various domains.

M3 Inculcating team work, leadership qualities, professional ethics and social responsibilities

M4 Prepare graduates for working in multicultural and multidisciplinary environment.


PROGRAM EDUCATIONAL OBJECTIVES(PEOs)
Graduates of the program will be able to identify and apply domain specific knowledge to have a successful career in
PEO1
real world applications by keeping abreast of the technological changes.

Graduates of the program will continue to learn and adapt in a world of constantly evolving technology through
PEO2
advanced degrees, professional courses and/or research.

Graduates of the program will be committed to acquire professional ethics, moral values and devotion to duty so that
PEO3
they prove to be worthy citizen of India with International outlook.

PROGRAM SPECIFIC OUTCOMES (PSOs)


PSO1 Analyze and apply the acquired knowledge in designing application in the field of VLSI and Embedded System.

Should possess the skills to develop, analyze and synthesize various functional elements of communication system
PSO2
and signal processing.

Proficiency in specialized cutting-edge software packages and computer programming useful for the analysis/design
PSO3
of electronic engineering systems.
VLSI DESIGN
Over the past several years, Silicon CMOS technology has
become the dominant fabrication process for relatively high
performance and cost effective VLSI circuits. The
revolutionary nature of these developments is understood by
the rapid growth in which the number of transistors
integrated on circuit on single chip.
What is VLSI?
Very-large-scale integration (VLSI) is the process of creating
an integrated circuit (IC) by combining thousands of transistors into a
single chip. VLSI began in the 1970’s when complex semiconductor and
communication technologies were being developed.

Before the introduction of VLSI technology, most ICs had a limited set of
functions they could perform. An electronic circuit might consist of a
CPU, ROM, RAM and other glue logic. VLSI lets IC designers add all
of these into one chip.
The electronics industry has achieved a phenomenal growth over the
last few decades, mainly due to the rapid advances in large scale
integration technologies and system design applications. With the
advent of VLSI designs, the number of applications of ICs in high-
performance computing, controls, telecommunications, image and
video processing, and consumer electronics has been rising at a very
fast pace.

The current cutting-edge technologies such as high resolution and


low bit-rate video and cellular communications provide the end-users
a marvelous amount of applications, processing power and
portability.
VLSI

Front end Back end


 Functionality  Manufacturing
CODING  Testing
 Packing

VHDL VERILOG
Very high-speed integrated circuit Hardware VERI+LOG = Verify Logic
Description Language
COMPARISION BETWEEN VHDL & VERILOG

VHDL VERILOG

 Not case sensitive  Case sensitive


 Difficult to learn  Easy to learn
 Based on pascal & ada  Based on C
 Strongly typed  Weakly typed
What is Verilog ?
 Verilog is one of the two major Hardware Description Languages
(HDL) used by hardware designers in industry and academia.
 VHDL is another one
 Verilog is easier to learn and use than VHDL
 Verilog is C-like . VHDL is very Aad-like.
 Verilog HDL allows a hardware designer to describer designs at a
high level of abstraction such as at the architectural or behavioral
level as well as the lower implementation levels(i.e., gate and
switch levels).
Development of Verilog

 Verilog was introduced in 1985 by Gateway Design System Corporation,


now a part of Cadence Design Systems. Until May, 1990, with the
formation of Open Verilog International (OVI),
 Verilog HDL was a proprietary language of Cadence. Cadence was
motivated to open the language to the Public Domain with the expectation
that the market for Verilog HDL-related software products would grow
more rapidly with broader acceptance of the language
Why use VERILOG?

To reduce complexity of digital system.


Verilog language provides the digital designer a software platform.
Verilog allows user to express their design with BEHAVIORAL
CONSTRUCTS.
A program tool can convert the Verilog program to a description that was
used to make exact chips, like VLSI.
Program structure
Declares
section specifies data objects as registers, memories
and wires as well as procedural constructs such as
functions and tasks.

. Module items
initial constructs
always constructs
assignment

End module
Different styles of modelling
Verilog supports a design at many levels of abstraction.
The major three are −

 Behavioral level
 Register-transfer level
 Gate level
Example
module Full_adder (a, b, cin, sum, carry);
input a, b, cin;
output reg sum;
output reg carry;
always@(a, b, cin)
begin
if(a==0 && b==0 && cin==0)
begin
sum=0;
carry=0;
end
else if (a==0 && b==0 && cin==1)
begin
sum=1;
carry=0;
end
else if (a==0 && b==1 && cin==0)
begin
sum=1;
carry=0;
end
else if(a==0 && b==1 && cin==1)
begin
sum=0;
carry=1;
end
else if (a==1 && b==0 && cin==0)
begin
sum=1;
carry=0;
end
else if (a==1 && b==0 && cin==1)
begin
sum=0;
carry=1;
end
else if (a==1 && b==1 && cin==0)
begin
sum=1;
carry=0;
end
else if(a==1 && b==1 && cin==1)
begin
sum=1;
carry=1;
Language convention
 Case-sensitivity
 Verilog is case-sensitive.
 Some simulators are case-insensitive
 Advice: - Don’t use case-sensitive feature!
 Keywords are lower case

 Different names must be used for different items within the same scope

 Identifier alphabet:
 Upper and lower case alphabetical
 decimal digits
 underscore
Data Types - Nets - Semantics

wire - connectivity only; no logical


tri - same as wire, but indicates will be 3- stated in hardware
wand - multiple drivers - wired and
wor - multiple drivers - wired or
triand - same as wand, but 3-state
trior - same as wor but 3-state
supply0 - Global net GND
supply1 - Global Net VCC (VDD)
THANK YOU

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