0% found this document useful (0 votes)
61 views16 pages

Analog and Digital Electronics Lab: Experiment - 7

The document describes Experiment 7 which has two parts. The first part involves realizing a 3x8 decoder using basic logic gates. The second part uses a 3x8 decoder IC to implement a full adder. Truth tables are provided for the 3x8 decoder and full adder. Logic circuits are shown for the 3x8 decoder and implementing the full adder with the decoder.

Uploaded by

Ashutosh Gupta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
61 views16 pages

Analog and Digital Electronics Lab: Experiment - 7

The document describes Experiment 7 which has two parts. The first part involves realizing a 3x8 decoder using basic logic gates. The second part uses a 3x8 decoder IC to implement a full adder. Truth tables are provided for the 3x8 decoder and full adder. Logic circuits are shown for the 3x8 decoder and implementing the full adder with the decoder.

Uploaded by

Ashutosh Gupta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 16

Analog and Digital Electronics Lab

Experiment – 7

Realization of 3*8 Decoder using basic gates and implement the Full
Adder using 3*8 Decoder IC.
Truth Table of 3to8 Decoder
A B C D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1

D0 = A’B’C’ D1 = A’B’C D2 = A’BC’ D3 = A’BC

D4 = AB’C’ D5 = AB’C D6 = ABC’ D7 = ABC


Logic Circuit of 3to8 Decoder
Full Adder using 3to8 Decoder
A B C SUM Cout
SUM = A’B’C+A’BC’+AB’C’+ABC Cout = A’BC+AB’C+ABC’+ABC 0 0 0 0 0
0 0 1 1 0
D0 = A’B’C’ D1 = A’B’C D2 = A’BC’ D3 = A’BC
0 1 0 1 0
D4 = AB’C’ D5 = AB’C D6 = ABC’ D7 = ABC 0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
SUM = D1+D2+D4+D7 Cout = D3+D5+D6+D7
1 1 0 0 1
1 1 1 1 1
Logic Circuit for Implementation of Full
Adder using 3to8 Decoder
Analog and Digital Electronics Lab
Experiment – 8

Verify the truth table of following Flip-Flops:


a)SR Flip-Flop
b) D Flip-Flop
Flip-Flops
• Flip-Flops are sequential circuits used to store data. It works as one bit storage device.

S R Qn Qn+1
0 0 0 0
Qn
Memory
0 0 1 1
0 1 0 0
Reset
State 0 1 1 0
1 0 0 1
S R Qn+1
1 0 1 1
0 0 Qn Set
State0 1 0 1 1 0 X
1 0 1 f(S,R,Qn) = Qn+1 1 1 1 X Invalid State
1 1 X
Functional Table Truth Table of SR Flip Flop
D Flip-Flop

D Qn Qn+1
0 0 0
0 1 0
1 0 1
1 1 1

Truth Table of D FF
D FF Circuit Diagram
Analog and Digital Electronics Lab
Experiment – 9

• Design of MOD-8 UP/DOWN Counter.


Analog and Digital Electronics Lab

Experiment – 7

• Realization of 3*8 Decoder using basic gates and implement the Full
Adder using 3*8 Decoder IC.
• The job of counter is to count by advancing the content of counter by
one count with each clock pulse.

• The number of states or counting sequences through which particular


counter advances before returning once again back to its original first
state is called the modulus (MOD).

• In other word the modulus is the number of states the counter counts.

• E.g. 2-bit counter (00 to 11)


i.e. 0 to 3 (00,01,10,11)
Hence it is called MOD-4 Counter.
Fig: MOD-8 UP Counter.

000 001 010 011

Fig: State Diagram of UP Counter.

100
111 110 101
Fig: MOD-8 Down Counter.
Analog and Digital Electronics Lab

Experiment – 11

• Verify the pn-junction diode characteristics under forward and reverse bias
conditions.

You might also like