Mini Project
Mini Project
Mini Project
In RC Passive Filters, we saw how a basic first-order filter circuits, such as the RC-LPF & RC-HPF can be made using
just a single resistor in series with a capacitor connected across a sinusoidal input signal. One of the major
disadvantages of passive filters is that the amplitude of the output signal is less than that of the input signal, i.e., the
gain is always less than unity and that the load impedance affects the filters characteristics. And if there are multiple
stages of such circuit is present, then there is a loss in signal. This loss in signal amplitude called "Attenuation" can
become quite severe. One way of restoring or controlling this loss of signal is by using amplification through the use
of Active Filters.
Active Filters contain active components such as Op-Amps, Transistors or FET's within their circuit design. They draw
their power from an external power source (Biasing Voltage) and use it to boost or amplify the output signal. Filter
amplification can also be used to either shape or alter the frequency response of the filter circuit by producing a
more selective output response, making the output bandwidth of the filter narrower or even wider.
Hence, the main difference between a "passive filter" and an "active filter" is amplification. An active filter generally
uses an operational amplifier (op-amp) within its design thus having high input impedance and low out impedance.
The voltage gain is determined by the resistor network within its feedback loop. Unlike a passive HPF which has in
theory an infinite high frequency response, the maximum frequency response of an active filter is limited to the
Gain-Bandwidth product (or open loop gain) of the operational amplifier being used. Still, active filters are generally
much easier to design than passive filters, they produce good performance characteristics, very good accuracy with a
steep roll-off and low noise when used with a good circuit design.
Figure-1
This first-order low pass active filter, consists simply of a passive RC filter stage providing a low frequency path to the
input of a non-inverting operational amplifier. The amplifier is configured as a voltage-follower (Buffer) giving it a DC
gain of one, Av = +1 or unity gain as opposed to the previous passive RC filter which has a DC gain of less than unity.
The op-amps high input impedance prevents excessive loading on the filters output.
The op-amps low output impedance prevents the filters cut-off frequency point from being affected by
changes in the impedance of the load.
The Op-Amp provides good stability to the filter.
The voltage gain is unity. (Non-attenuating)
The Power gain is very high as its output impedance is much lower than its input impedance.
Where:
Why is it called a half adder? Because this adder can only be used to add two binary digits, it cannot form a
part of an adder circuit that can add two n-bit binary numbers. The adder circuit which will be used to add
n-bit binary numbers is called a full adder. This adder is less than a full adder, and hence it is called a half
adder.
Thus, the carry digit is carried to the addition in the next digit. So, when adding two digits the output from
the operation is a sum and a carry. Remember that a carry always produced, even if it is 0. This is
important to remember, every addition result in a sum and carry, though the carry can be 0.
Binary addition for two binary numbers each containing one digit works the same way as decimal addition
for two decimal one digit numbers, but is simpler because the two input values can only have 2 states
(either 0 or 1). So, give two binary inputs to an addition (X and Y) we can summarize the possible results of
adding those bits in the following truth table. Note that the added values produce two results, a sum and a
carry, both of which are either 0 or 1.
A B S Cout
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
•The simplified Boolean function from the truth table (Using sum of product form):
S = A'B + AB'
C = A.B
Where 'S' is the sum and 'C' is the carry.
S = A (EXOR) B
C = A.B
Simulation of half adder
1.Delay between A and Sum