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Computer Architecture 1: Input/output Interfacing

This document discusses input/output interfacing in computer architecture. It covers I/O hardware such as storage, communication and user interface devices that connect to computers via ports and buses. It also describes interrupts which allow devices to notify the CPU, the interrupts cycle where the CPU services interrupts, and software polling where the CPU checks devices for requests. Finally, it discusses different I/O data transfer methods including programmed I/O, interrupt-driven I/O and direct memory access (DMA), as well as the DMA transfer process and the RS-232 device interface standard.

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0% found this document useful (0 votes)
80 views12 pages

Computer Architecture 1: Input/output Interfacing

This document discusses input/output interfacing in computer architecture. It covers I/O hardware such as storage, communication and user interface devices that connect to computers via ports and buses. It also describes interrupts which allow devices to notify the CPU, the interrupts cycle where the CPU services interrupts, and software polling where the CPU checks devices for requests. Finally, it discusses different I/O data transfer methods including programmed I/O, interrupt-driven I/O and direct memory access (DMA), as well as the DMA transfer process and the RS-232 device interface standard.

Uploaded by

Aruna Turay
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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COMPUTER

ARCHITECTURE 1
Input/output Interfacing
A. S. Bah

BSc Information Systems – IPAM 1


Topics

I/O Hardware

Interrupts

Interrupts Cycle

Software Polling

I/O Data Transfer Methods

DMA transfer step

Device Interfaces: RS232

BSc Information Systems – IPAM


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I/O Hardware
I/O devices can be roughly categorized as storage, communications, user-
interface, and other
Devices communicate with the computer via signals sent over wires or
through the air.
Devices connect with the computer via ports, e.g. a serial or parallel port.
A common set of wires connecting multiple devices is termed a bus.
Buses include rigid protocols for the types of messages that can be sent across the
bus and the procedures for resolving contention issues.
Buses that are commonly found in a modern PC include:
 The PCI (peripheral component interconnect ) bus connects high-speed high-
bandwidth devices to the memory subsystem ( and the CPU. )
 The expansion bus connects slower low-bandwidth devices, which typically deliver data

one character at a time ( with buffering. )


 The SCSI (small computer system interface) bus connects a number of SCSI devices to

a common SCSI controller.

BSc Information Systems – IPAM


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Interrupts
Interrupts allow devices to notify the CPU when they have data to transfer
or when an operation is complete, allowing the CPU to perform other
duties when no I/O transfers need its immediate attention.
The CPU has an interrupt-request line that is sensed after every
instruction.
A device's controller raises an interrupt by asserting a signal on the interrupt
request line.
The CPU then performs a state save, and transfers control to the interrupt
handler routine at a fixed address in memory. ( The CPU catches the
interrupt and dispatches the interrupt handler. )
The interrupt handler determines the cause of the interrupt, performs the
necessary processing, performs a state restore, and executes a return from
interrupt instruction to return control to the CPU. ( The interrupt
handler clears the interrupt by servicing the device. )

BSc Information Systems – IPAM


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Interrupts Cycle
Added to instruction cycle
Processor checks for interrupt
Indicated by an interrupt signal
If no interrupt, fetch next instruction
If interrupt pending:
Suspend execution of current program
Save context
Set PC to start address of interrupt handler routine
Process interrupt
Restore context and continue interrupted program

BSc Information Systems – IPAM


5
Software Polling
When the microprocessor receives an Interrupt Service
Request (ISR) on the interrupt line it must determine
which of the devices connected to that input sent the
request. 

Software Polling is one method by which it can do so. 


In Software Polling: 
A software routine is used to identify the device
requesting service. It does so by checking each device to
see if it was the one needing service.

BSc Information Systems – IPAM


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I/O Data Transfer Methods

Programmed I/O (PIO): Polling (For low-speed I/O)
The I/O device puts its status information in a status

register.
The processor must periodically check the status

register.
The processor is totally in control and does all the work.

Very wasteful of processor time.


Used for low-speed I/O devices (mice, keyboards etc.)


BSc Information Systems – IPAM 7


I/O Data Transfer Methods

Interrupt-Driven I/O (For medium-speed I/O):
An interrupt line from the I/O device to the CPU is used to

generate an I/O interrupt indicating that the I/O device needs


CPU attention.
The interrupting device places its identity in an interrupt vector.

Once an I/O interrupt is detected the current instruction is


completed and an I/O interrupt handling routine (by OS) is


executed to service the device.
Used for moderate speed I/O (optical drives, storage,

networks ..)
Allows overlap of CPU processing time and I/O processing time

BSc Information Systems – IPAM 8


I/O Data Transfer Methods

Direct Memory Access (DMA) (For high-speed I/O):
Implemented with a specialized controller that transfers data

between an I/O device and memory independent of the processor.


The DMA controller becomes the bus master and directs reads and

writes between itself and memory.


Interrupts are still used only on completion of the transfer or when

an error occurs.
Low CPU overhead, used in high speed I/O (storage, network

interfaces)
Allows more overlap of CPU processing time and I/O processing

time than interrupt-driven I/O.

BSc Information Systems – IPAM 9


DMA transfer step

DMA transfer steps:


The CPU sets up DMA by supplying device identity,
operation, memory address of source and destination of
data, the number of bytes to be transferred.
The DMA controller starts the operation. When the data
is available it transfers the data, including generating
memory addresses for data to be transferred.
Once the DMA transfer is complete, the controller
interrupts the processor, which determines whether the
entire operation is complete.

BSc Information Systems – IPAM 10


Device Interfaces: RS232
RS-232 (Recommended Standard 232) is a standard for serial binary
single-ended data and control signals connecting between
a DTE (data terminal equipment) and a DCE (data circuit-
terminating equipment)
It is commonly used in computer serial ports
An RS-232 serial port was once a standard feature of a personal
computer used for connections to modems, printers, mice, data
storage, uninterruptible power supplies, and other peripheral devices.
However, the low transmission speed, large voltage swing, and large
standard connectors motivated development of the Universal Serial
Bus, which has displaced RS-232 from most of its peripheral interface
roles. Many modern personal computers have no RS-232 ports and
must use an external USB-to-RS-232 converter to connect to RS-232
peripherals. RS-232 devices are still found, especially in industrial
machines, networking equipment, or scientific instruments.

BSc Information Systems – IPAM 11


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BSc Information Systems – IPAM 12

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